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Add more configuration symbols and simplify the build script #264

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Nov 17, 2022
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Add more configuration symbols and simplify the build script #264

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108 changes: 79 additions & 29 deletions esp-hal-common/build.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -12,40 +12,90 @@ fn main() {
n => panic!("Exactly 1 chip must be enabled via its Cargo feature, {n} provided"),
}

// Configuration symbol for the enabled chip
if esp32 {
println!("cargo:rustc-cfg=esp32");
// Define all required configuration symbols for the enabled chip.
//
// When adding a new device, at the bare minimum the following symbols MUST be
// defined:
// - the name of the device
// - the architecture ('riscv' or 'xtensa')
// - the core count ('single_core' or 'multi_core')
//
// Additionally, the following symbols MAY be defined if present:
// - 'dac'
// - 'gdma'
// - 'i2c1'
// - 'pdma'
// - 'rmt'
// - 'spi3'
// - 'systimer'
// - 'timg1'
// - 'uart2'
// - 'usb_otg'
// - 'usb_serial_jtag'
//
// New symbols can be added as needed, but please be sure to update both this
// comment and the required vectors below.
let symbols = if esp32 {
vec![
"esp32",
"xtensa",
"multi_core",
"dac",
"i2c1",
"pdma",
"rmt",
"spi3",
"timg1",
"uart2",
]
} else if esp32c2 {
println!("cargo:rustc-cfg=esp32c2");
vec!["esp32c2", "riscv", "single_core", "gdma", "systimer"]
} else if esp32c3 {
println!("cargo:rustc-cfg=esp32c3");
vec![
"esp32c3",
"riscv",
"single_core",
"gdma",
"rmt",
"spi3",
"systimer",
"timg1",
"usb_serial_jtag",
]
} else if esp32s2 {
println!("cargo:rustc-cfg=esp32s2");
vec![
"esp32s2",
"xtensa",
"single_core",
"dac",
"i2c1",
"pdma",
"rmt",
"spi3",
"systimer",
"timg1",
"usb_otg",
]
} else if esp32s3 {
println!("cargo:rustc-cfg=esp32s3");
}

// Configuration symbol for the architecture of the enabled chip
if esp32c2 || esp32c3 {
println!("cargo:rustc-cfg=riscv");
} else {
println!("cargo:rustc-cfg=xtensa");
}

// Inject a configuration symbol to state the core count of the enabled chip
if esp32c2 || esp32c3 || esp32s2 {
println!("cargo:rustc-cfg=single_core");
vec![
"esp32s3",
"xtensa",
"multi_core",
"gdma",
"i2c1",
"rmt",
"spi3",
"systimer",
"timg1",
"uart2",
"usb_otg",
"usb_serial_jtag",
]
} else {
println!("cargo:rustc-cfg=multi_core");
}

// Configuration symbol for the SYSTIMER peripheral
if esp32c2 || esp32c3 || esp32s2 || esp32s3 {
println!("cargo:rustc-cfg=has_systimer");
}
unreachable!(); // We've already confirmed exactly one chip was selected
};

// Configuration symbol for the USB_SERIAL_JTAG peripheral
if esp32c3 || esp32s3 {
println!("cargo:rustc-cfg=has_usb_serial_jtag");
for symbol in symbols {
println!("cargo:rustc-cfg={symbol}");
}
}
2 changes: 1 addition & 1 deletion esp-hal-common/src/analog/mod.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@
#[cfg_attr(esp32s2, path = "adc/xtensa.rs")]
#[cfg_attr(esp32s3, path = "adc/xtensa.rs")]
pub mod adc;
#[cfg(not(any(esp32c2, esp32c3, esp32s3)))]
#[cfg(dac)]
pub mod dac;

cfg_if::cfg_if! {
Expand Down
50 changes: 13 additions & 37 deletions esp-hal-common/src/dma/mod.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -4,10 +4,9 @@ use core::{marker::PhantomData, sync::atomic::compiler_fence};

use private::*;

#[cfg(any(esp32c2, esp32c3, esp32s3))]
#[cfg(gdma)]
pub mod gdma;

#[cfg(any(esp32, esp32s2))]
#[cfg(pdma)]
pub mod pdma;

/// DMA Errors
Expand All @@ -20,7 +19,7 @@ pub enum DmaError {
}

/// DMA Priorities
#[cfg(any(esp32c2, esp32c3, esp32s3))]
#[cfg(gdma)]
#[derive(Clone, Copy)]
pub enum DmaPriority {
Priority0 = 0,
Expand All @@ -37,57 +36,34 @@ pub enum DmaPriority {

/// DMA Priorities
/// The values need to match the TRM
#[cfg(any(esp32, esp32s2))]
#[cfg(pdma)]
#[derive(Clone, Copy)]
pub enum DmaPriority {
Priority0 = 0,
}

/// DMA capable peripherals
/// The values need to match the TRM
#[cfg(esp32c2)]
#[derive(Clone, Copy)]
pub enum DmaPeripheral {
Spi2 = 0,
Sha = 7,
}

/// DMA capable peripherals
/// The values need to match the TRM
#[cfg(esp32c3)]
#[derive(Clone, Copy)]
pub enum DmaPeripheral {
Spi2 = 0,
Uhci0 = 2,
I2s = 3,
Aes = 6,
Sha = 7,
Adc = 8,
}

/// DMA capable peripherals
/// The values need to match the TRM
#[cfg(any(esp32, esp32s2))]
#[derive(Clone, Copy)]
pub enum DmaPeripheral {
Spi2 = 0,
Spi3 = 1,
}

/// DMA capable peripherals
/// The values need to match the TRM
#[cfg(esp32s3)]
#[derive(Clone, Copy)]
pub enum DmaPeripheral {
Spi2 = 0,
#[cfg(any(pdma, esp32s3))]
Spi3 = 1,
#[cfg(any(esp32c3, esp32s3))]
Uhci0 = 2,
#[cfg(any(esp32c3, esp32s3))]
I2s0 = 3,
#[cfg(esp32s3)]
I2s1 = 4,
#[cfg(esp32s3)]
LcdCam = 5,
#[cfg(any(esp32c3, esp32s3))]
Aes = 6,
#[cfg(gdma)]
Sha = 7,
#[cfg(any(esp32c3, esp32s3))]
Adc = 8,
#[cfg(esp32s3)]
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not sure this way of defining DmaPeripheral will work fine in future - e.g. on C6 9 is PARLIO while on S3 it's RMT - not much of a problem now but no idea how these IDs will look like for future chips

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@jessebraham jessebraham Nov 17, 2022 •
edited
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Okay, well at least the existing chips can share a definition I think. If we need to re-introduce a #[cfg] and one or more DmaPeripherals enums in the future we can do so.

Rmt = 9,
}

Expand Down
10 changes: 2 additions & 8 deletions esp-hal-common/src/embassy.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -5,17 +5,11 @@ use embassy_time::driver::{AlarmHandle, Driver};
use crate::clock::Clocks;

#[cfg_attr(
all(
has_systimer,
feature = "embassy-time-systick",
),
all(systimer, feature = "embassy-time-systick",),
path = "embassy/time_driver_systimer.rs"
)]
#[cfg_attr(
all(
feature = "embassy-time-timg",
any(feature = "esp32", feature = "esp32s3", feature = "esp32s2")
),
all(feature = "embassy-time-timg", any(esp32, esp32s2, esp32s3)),
path = "embassy/time_driver_timg.rs"
)]
mod time_driver;
Expand Down
14 changes: 7 additions & 7 deletions esp-hal-common/src/i2c.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -310,7 +310,7 @@ fn enable_peripheral<T: Instance>(i2c: &T, peripheral_clock_control: &mut Periph
// enable peripheral
match i2c.i2c_number() {
0 => peripheral_clock_control.enable(crate::system::Peripheral::I2cExt0),
#[cfg(not(any(esp32c2, esp32c3)))]
#[cfg(i2c1)]
1 => peripheral_clock_control.enable(crate::system::Peripheral::I2cExt1),
_ => unreachable!(), // will never happen
}
Expand Down Expand Up @@ -364,7 +364,7 @@ pub trait Instance {

// Reset entire peripheral (also resets fifo)
self.reset();

Ok(())
}

Expand Down Expand Up @@ -466,8 +466,8 @@ pub trait Instance {
// In the "worst" case, we will subtract 13, make sure the result will still be
// correct

// FIXME since we always set the filter threshold to 7 we don't need conditional code here
// once that changes we need the conditional code here
// FIXME since we always set the filter threshold to 7 we don't need conditional
// code here once that changes we need the conditional code here
scl_high -= 7 + 6;

// if (filter_cfg_en) {
Expand Down Expand Up @@ -1042,11 +1042,11 @@ pub trait Instance {
.txfifo_wm_int_raw()
.bit_is_set()
{}

self.register_block()
.int_clr
.write(|w| w.txfifo_wm_int_clr().set_bit());

while !self
.register_block()
.int_raw
Expand Down Expand Up @@ -1261,7 +1261,7 @@ impl Instance for crate::pac::I2C0 {
}
}

#[cfg(not(any(esp32c2, esp32c3)))]
#[cfg(i2c1)]
impl Instance for crate::pac::I2C1 {
#[inline(always)]
fn register_block(&self) -> &RegisterBlock {
Expand Down
19 changes: 9 additions & 10 deletions esp-hal-common/src/lib.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -33,9 +33,9 @@ pub use esp32s2 as pac;
pub use esp32s3 as pac;
pub use procmacros as macros;

#[cfg(not(esp32c2))]
#[cfg(rmt)]
pub use self::pulse_control::PulseControl;
#[cfg(has_usb_serial_jtag)]
#[cfg(usb_serial_jtag)]
pub use self::usb_serial_jtag::UsbSerialJtag;
pub use self::{
delay::Delay,
Expand All @@ -52,36 +52,35 @@ pub mod analog;
pub mod clock;
pub mod delay;
pub mod dma;
#[cfg(feature = "embassy")]
pub mod embassy;
pub mod gpio;
pub mod i2c;
pub mod ledc;
#[cfg(any(esp32s2, esp32s3))]
#[cfg(usb_otg)]
pub mod otg_fs;
pub mod prelude;
#[cfg(not(esp32c2))]
#[cfg(rmt)]
pub mod pulse_control;
pub mod rng;
pub mod rom;
pub mod rtc_cntl;
pub mod serial;
pub mod spi;
pub mod system;
#[cfg(has_systimer)]
#[cfg(systimer)]
pub mod systimer;
pub mod timer;
#[cfg(has_usb_serial_jtag)]
#[cfg(usb_serial_jtag)]
pub mod usb_serial_jtag;
#[cfg(not(esp32c2))]
#[cfg(rmt)]
pub mod utils;

#[cfg_attr(esp32, path = "cpu_control/esp32.rs")]
#[cfg_attr(any(esp32c2, esp32c3, esp32s2), path = "cpu_control/none.rs")]
#[cfg_attr(esp32s3, path = "cpu_control/esp32s3.rs")]
pub mod cpu_control;

#[cfg(feature = "embassy")]
pub mod embassy;

#[cfg_attr(esp32, path = "efuse/esp32.rs")]
#[cfg_attr(esp32c2, path = "efuse/esp32c2.rs")]
#[cfg_attr(esp32c3, path = "efuse/esp32c3.rs")]
Expand Down
4 changes: 2 additions & 2 deletions esp-hal-common/src/serial.rs
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Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
//! UART driver

use self::config::Config;
#[cfg(any(esp32, esp32s3))]
#[cfg(uart2)]
use crate::pac::UART2;
use crate::{
clock::Clocks,
Expand Down Expand Up @@ -742,7 +742,7 @@ impl Instance for UART1 {
}
}

#[cfg(any(esp32, esp32s3))]
#[cfg(uart2)]
impl Instance for UART2 {
#[inline(always)]
fn register_block(&self) -> &RegisterBlock {
Expand Down
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