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RISCV vectored interrupts #118

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merged 9 commits into from
Jul 26, 2022
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MabezDev
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Specifically for the esp32c3 interrupt controller/matrix right now - we'll need to modify this later on for sure.

This PR reserves interrupts 1 through 15 for interrupt vectoring. One interrupt per possible priority. I've tried to document where possible which APIs are safe to use with vectoring and which are not. Most that APIs which can break vectoring have been made unsafe to match what we did with Xtensa interrupt vectoring.

- Adds support for vectoring peripheral interrupts to PAC handlers
- Currently supports level interrupts with priorities from 1-15
- Updated the gpio interrupt example to reflect the new changes
This is as simple as making sure we clear the CPU interrupt whenever we
receive one. This also documents further what APIs are safe to call when
the `vectored` feature is enabled.
@MabezDev MabezDev requested a review from bjoernQ July 26, 2022 10:53
@MabezDev MabezDev force-pushed the feature/riscv-vectored-interrupts branch from 8c56b6b to 7c1dfe5 Compare July 26, 2022 12:12
@MabezDev MabezDev force-pushed the feature/riscv-vectored-interrupts branch from 7c1dfe5 to 8375677 Compare July 26, 2022 12:13
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bjoernQ commented Jul 26, 2022

I got esp-wifi (BTLE and WIFI) working on top of commit 8375677 but not on the latest commit 🤔
Also I had to raise the systimer alarm (for task-switching) from 500 to 3500 - so it adds quite some latency but seems to be good enough

However I still don't get what causes the WIFI example to fail with the last commit

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Also I had to raise the systimer alarm (for task-switching) from 500 to 3500 - so it adds quite some latency but seems to be good enough

Ouch, is this in debug or release? I think I might make an enhancement issue to try profile the vectoring code (I haven't put any effort into this apart from sprinkling #[ram] everywhere :D). There is always going to be some overhead, but we should try to reduce it as much as possible.

However I still don't get what causes the WIFI example to fail with the last commit

That's quite odd, Haven't really changed much apart from the handler names! Maybe try a clean build? Perhaps cargo is doing some weird stuff with caching because they are unmangled symbols?

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bjoernQ commented Jul 26, 2022

Also even on 8375677 it now fails to connect to my mobile hotspot with Load access fault

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Could you push your branch on esp-wifi? I'll try and track it down on my end too.

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bjoernQ commented Jul 26, 2022

Could you push your branch on esp-wifi? I'll try and track it down on my end too.

Sure - here it is: https://github.com/esp-rs/esp-wifi/tree/adapt-to-esp32c3-interrupt-changes/src
You just need to add the patch section to Cargo.toml

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LGTM

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Thank you for this!

@jessebraham jessebraham merged commit 1d02bf8 into main Jul 26, 2022
jrmoulton pushed a commit to jrmoulton/esp-hal that referenced this pull request Jul 30, 2022
* RISCV interrupt vectoring

- Adds support for vectoring peripheral interrupts to PAC handlers
- Currently supports level interrupts with priorities from 1-15
- Updated the gpio interrupt example to reflect the new changes

* remove .vscode files

* Support vectored edge interrupts

This is as simple as making sure we clear the CPU interrupt whenever we
receive one. This also documents further what APIs are safe to call when
the `vectored` feature is enabled.

* fix all examples to use vectoring

* doc & cleanup

* run handlers from ram

* make xtensa::interrupt::vectored private, we rexport public items

* fix default handlers

* pass interrupt into EspDefaultHandler
@jessebraham jessebraham deleted the feature/riscv-vectored-interrupts branch October 27, 2022 19:57
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3 participants