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soc/cores/clock: initial GW5A support #1741

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merged 1 commit into from
Aug 29, 2023

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Icenowy
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@Icenowy Icenowy commented Aug 11, 2023

GW5A has a different PLL with GW1N/GW2A, with multiple individual ODIV's.

Add basic support for it.

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Phase tweaking not tested yet because I have no oscilloscope.

@Icenowy Icenowy force-pushed the gw5apll branch 3 times, most recently from 053157f to 332e05b Compare August 11, 2023 15:15
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Icenowy commented Aug 29, 2023

Force pushed to add GW5A-25 support.

GW5A has different PLLs than GW1N/GW2A, with multiple individual
ODIV's. GW5A-25 has a different PLL with GW5A[S]T-138, with lack of
dynamic control.

Add basic support for them.

Signed-off-by: Icenowy Zheng <[email protected]>
@enjoy-digital enjoy-digital merged commit c122fef into enjoy-digital:master Aug 29, 2023
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Thanks @Icenowy!

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2 participants