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tlp/packetizer: Add buffer on tlp_raw to improve timings.
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enjoy-digital committed Jul 8, 2024
1 parent 7d776d6 commit a674e38
Showing 1 changed file with 12 additions and 2 deletions.
14 changes: 12 additions & 2 deletions litepcie/tlp/packetizer.py
Original file line number Diff line number Diff line change
Expand Up @@ -1000,16 +1000,26 @@ def __init__(self, data_width, endianness, address_width=32, capabilities=["REQU
slave = tlp_raw
)

# Buffer -----------------------------------------------------------------------------------

tlp_raw_d = stream.Endpoint(tlp_raw_layout(data_width))
tlp_raw_buf = stream.Buffer(tlp_raw_layout(data_width))
self.submodules += tlp_raw_buf
self.comb += [
tlp_raw.connect(tlp_raw_buf.sink),
tlp_raw_buf.source.connect(tlp_raw_d),
]

# Insert header ----------------------------------------------------------------------------
header_inserter_cls = {
64 : LitePCIeTLPHeaderInserter64b,
128 : LitePCIeTLPHeaderInserter128b,
256 : LitePCIeTLPHeaderInserter256b,
512 : LitePCIeTLPHeaderInserter512b,
}
header_inserter = header_inserter_cls[data_width](fmt=tlp_raw.fmt)
header_inserter = header_inserter_cls[data_width](fmt=tlp_raw_d.fmt)
self.submodules += header_inserter
self.comb += tlp_raw.connect(header_inserter.sink)
self.comb += tlp_raw_d.connect(header_inserter.sink)
self.comb += header_inserter.source.connect(self.source, omit={"data", "be"})
for name in ["dat", "be"]:
self.comb += dword_endianness_swap(
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