embassy-nrf: migrate to embedded-hal 1.0, embedded-hal-async

embassy-nrf/Cargo.toml

@@ -12,6 +12,9 @@ edition = "2018"
 # There are no plans to make this stable.
 unstable-pac = []
 
+# Implement embedded-hal 1.0 alpha and embedded-hal-async traits.
+unstable-traits = ["embedded-hal-1", "embedded-hal-async"]
+
 nrf52805 = ["nrf52805-pac", "_ppi"]
 nrf52810 = ["nrf52810-pac", "_ppi"]
 nrf52811 = ["nrf52811-pac", "_ppi"]
@@ -47,11 +50,14 @@ embassy = { version = "0.1.0", path = "../embassy" }
 embassy-macros = { version = "0.1.0", path = "../embassy-macros", features = ["nrf"]}
 embassy-hal-common = {version = "0.1.0", path = "../embassy-hal-common" }
 
+embedded-hal-02 = { package = "embedded-hal", version = "0.2.6" }
+embedded-hal-1 = { package = "embedded-hal", version = "1.0.0-alpha.6", git = "https://github.com/embassy-rs/embedded-hal", branch = "embassy", optional = true}
+embedded-hal-async = { version = "0.0.1", git = "https://github.com/embassy-rs/embedded-hal", branch = "embassy", optional = true}
+
 defmt = { version = "0.3", optional = true }
 log = { version = "0.4.14", optional = true }
 cortex-m-rt = ">=0.6.15,<0.8"
 cortex-m = "0.7.3"
-embedded-hal    = "0.2.6"
 embedded-dma    = "0.1.2"
 futures     = { version = "0.3.17", default-features = false }
 critical-section = "0.2.5"

embassy-nrf/src/buffered_uarte.rs

@@ -213,9 +213,6 @@ impl<'d, U: UarteInstance, T: TimerInstance> AsyncBufRead for BufferedUarte<'d,
         cx: &mut Context<'_>,
     ) -> Poll<embassy::io::Result<&[u8]>> {
         self.inner.with(|state| {
-            // Conservative compiler fence to prevent optimizations that do not
-            // take in to account actions by DMA. The fence has been placed here,
-            // before any DMA action has started
             compiler_fence(Ordering::SeqCst);
             trace!("poll_read");
 
@@ -265,9 +262,6 @@ impl<'d, U: UarteInstance, T: TimerInstance> AsyncWrite for BufferedUarte<'d, U,
 
             trace!("poll_write: queued {:?}", n);
 
-            // Conservative compiler fence to prevent optimizations that do not
-            // take in to account actions by DMA. The fence has been placed here,
-            // before any DMA action has started
             compiler_fence(Ordering::SeqCst);
 
             Poll::Ready(Ok(n))
@@ -347,9 +341,7 @@ impl<'a, U: UarteInstance, T: TimerInstance> PeripheralState for StateInner<'a,
                         trace!("  irq_rx: buf {:?} {:?}", buf.as_ptr() as u32, buf.len());
 
                         // Start UARTE Receive transaction
-                        r.tasks_startrx.write(|w|
-                            // `1` is a valid value to write to task registers.
-                            unsafe { w.bits(1) });
+                        r.tasks_startrx.write(|w| unsafe { w.bits(1) });
                     }
                     break;
                 }
@@ -397,9 +389,7 @@ impl<'a, U: UarteInstance, T: TimerInstance> PeripheralState for StateInner<'a,
                             unsafe { w.maxcnt().bits(buf.len() as _) });
 
                         // Start UARTE Transmit transaction
-                        r.tasks_starttx.write(|w|
-                            // `1` is a valid value to write to task registers.
-                            unsafe { w.bits(1) });
+                        r.tasks_starttx.write(|w| unsafe { w.bits(1) });
                     }
                     break;
                 }