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Arm64: Implement LoadVector64x*AndUnzip and LoadVector128x*AndUnzip APIs #94128
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Note regarding the This serves as a reminder for when your PR is modifying a ref *.cs file and adding/modifying public APIs, please make sure the API implementation in the src *.cs file is documented with triple slash comments, so the PR reviewers can sign off that change. |
Tagging subscribers to this area: @dotnet/area-system-runtime-intrinsics Issue DetailsAdds LoadVector64xAndUnzip and LoadVector128xAndUnzip APIs
Contributes to #84510
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src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/AdvSimd.cs
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@dotnet/jit-contrib @kunalspathak this is ready |
@@ -9034,6 +9184,111 @@ public new abstract class Arm64 : ArmBase.Arm64 | |||
/// </summary> | |||
public static unsafe Vector128<ulong> LoadVector128(ulong* address) => LoadVector128(address); | |||
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/// <summary> | |||
/// A64: LD1 { Vn.16B, Vn+1.16B }, [Xn] |
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@tannergooding I think the noted register in this comment should be:
/// A64: LD1 { Vn.8B, Vn+1.8B }, [Xn]
as well as adjusting the other noted registers in the comments on the other LoadVector64x2/3/4*
methods for sbyte
,short
,ushort
,long
,ulong
,float
.
/// A64: LD1 { Vn.4H, Vn+1.4H }, [Xn]
/// A64: LD1 { Vn.2S, Vn+1.2S }, [Xn]
https://developer.arm.com/documentation/102159/0400/Load-and-store---data-structures
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yes, this should be half the sizes i.e. 8B, 4H, etc.
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Looks like it, yeah. I definitely might've made a mistake in documenting some of the things. Lots of APIs and lots of copy/pasting
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LGTM
@kunalspathak I'll make another PR to fix the comments for the |
Adds LoadVector64xAndUnzip and LoadVector128xAndUnzip APIs
Contributes to #84510