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Misc LSRA throughput improvements #85842

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merged 15 commits into from
May 10, 2023
Merged

Misc LSRA throughput improvements #85842

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a75a7da
Use BitOperations in few hot methods
kunalspathak May 5, 2023
46d4d3d
Do not pass RegisterType for non-arm sarchitectures
kunalspathak May 5, 2023
ade6707
Add clearAssignedInterval()
kunalspathak May 5, 2023
b9b3920
Consume clearAssignedInterval()
kunalspathak May 5, 2023
5ff83da
Do not pass RegisterType for updateInterval()
kunalspathak May 5, 2023
83436fe
Revert the change in genFindLowestBit()
kunalspathak May 5, 2023
d76f001
Revert "Use BitOperations in few hot methods"
kunalspathak May 6, 2023
20e497c
Add the missing case for clearAssignedInterval()
kunalspathak May 8, 2023
9fda672
Remove logging
kunalspathak May 8, 2023
40e49f9
jit formatting
kunalspathak May 8, 2023
0b3da21
Use popcount intrinsics
kunalspathak May 8, 2023
813cb84
Revert "Use popcount intrinsics"
kunalspathak May 9, 2023
7128104
revert unintentional change from superpmi.py
kunalspathak May 9, 2023
a79cf1e
Revert "Do not pass RegisterType for non-arm sarchitectures"
kunalspathak May 9, 2023
7dd4d46
fix the merge conflicts
kunalspathak May 9, 2023
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94 changes: 67 additions & 27 deletions src/coreclr/jit/lsra.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2945,7 +2945,8 @@ regNumber LinearScan::allocateReg(Interval* currentInterval,
}
else if (wasAssigned)
{
updatePreviousInterval(availablePhysRegRecord, assignedInterval, assignedInterval->registerType);
updatePreviousInterval(availablePhysRegRecord,
assignedInterval ARM_ARG(assignedInterval->registerType));
}
else
{
Expand Down Expand Up @@ -3284,7 +3285,7 @@ void LinearScan::checkAndAssignInterval(RegRecord* regRec, Interval* interval)
}
#endif

updateAssignedInterval(regRec, interval, interval->registerType);
updateAssignedInterval(regRec, interval ARM_ARG(interval->registerType));
}

// Assign the given physical register interval to the given interval
Expand Down Expand Up @@ -3521,7 +3522,7 @@ void LinearScan::checkAndClearInterval(RegRecord* regRec, RefPosition* spillRefP
assert(spillRefPosition->getInterval() == assignedInterval);
}

updateAssignedInterval(regRec, nullptr, assignedInterval->registerType);
clearAssignedInterval(regRec ARM_ARG(assignedInterval->registerType));
}

//------------------------------------------------------------------------
Expand Down Expand Up @@ -3780,8 +3781,8 @@ void LinearScan::unassignPhysReg(RegRecord* regRec, RefPosition* spillRefPositio
}
else
{
updateAssignedInterval(regRec, nullptr, assignedInterval->registerType);
updatePreviousInterval(regRec, nullptr, assignedInterval->registerType);
clearAssignedInterval(regRec ARM_ARG(assignedInterval->registerType));
updatePreviousInterval(regRec, nullptr ARM_ARG(assignedInterval->registerType));
}
}

Expand Down Expand Up @@ -4110,7 +4111,7 @@ void LinearScan::unassignIntervalBlockStart(RegRecord* regRecord, VarToRegMap in
else
{
// This interval is no longer assigned to this register.
updateAssignedInterval(regRecord, nullptr, assignedInterval->registerType);
clearAssignedInterval(regRecord ARM_ARG(assignedInterval->registerType));
}
}
}
Expand Down Expand Up @@ -4418,7 +4419,7 @@ void LinearScan::processBlockStartLocations(BasicBlock* currentBlock)
{
// This interval may still be active, but was in another register in an
// intervening block.
updateAssignedInterval(physRegRecord, nullptr, assignedInterval->registerType);
clearAssignedInterval(physRegRecord ARM_ARG(assignedInterval->registerType));
}

#ifdef TARGET_ARM
Expand Down Expand Up @@ -5969,6 +5970,51 @@ void LinearScan::allocateRegisters()
#endif // DEBUG
}

//-----------------------------------------------------------------------------
// clearAssignedInterval: Clear assigned interval of register.
//
// Arguments:
// reg - register to be updated
// regType - register type
//
// Return Value:
// None
//
// Note:
// For ARM32, two float registers consisting a double register are cleared
// together when "regType" is TYP_DOUBLE.
//
void LinearScan::clearAssignedInterval(RegRecord* reg ARM_ARG(RegisterType regType))
{
#ifdef TARGET_ARM
regNumber doubleReg = REG_NA;
Interval* oldAssignedInterval = reg->assignedInterval;
if (regType == TYP_DOUBLE)
{
RegRecord* anotherHalfReg = findAnotherHalfRegRec(reg);
doubleReg = genIsValidDoubleReg(reg->regNum) ? reg->regNum : anotherHalfReg->regNum;
anotherHalfReg->assignedInterval = nullptr;
}
else if ((oldAssignedInterval != nullptr) && (oldAssignedInterval->registerType == TYP_DOUBLE))
{
RegRecord* anotherHalfReg = findAnotherHalfRegRec(reg);
doubleReg = genIsValidDoubleReg(reg->regNum) ? reg->regNum : anotherHalfReg->regNum;
anotherHalfReg->assignedInterval = nullptr;
}

if (doubleReg != REG_NA)
{
clearNextIntervalRef(doubleReg, TYP_DOUBLE);
clearSpillCost(doubleReg, TYP_DOUBLE);
clearConstantReg(doubleReg, TYP_DOUBLE);
}
#endif // TARGET_ARM

reg->assignedInterval = nullptr;
clearNextIntervalRef(reg->regNum, reg->registerType);
clearSpillCost(reg->regNum, reg->registerType);
}

//-----------------------------------------------------------------------------
// updateAssignedInterval: Update assigned interval of register.
//
Expand All @@ -5984,8 +6030,10 @@ void LinearScan::allocateRegisters()
// For ARM32, two float registers consisting a double register are updated
// together when "regType" is TYP_DOUBLE.
//
void LinearScan::updateAssignedInterval(RegRecord* reg, Interval* interval, RegisterType regType)
void LinearScan::updateAssignedInterval(RegRecord* reg, Interval* interval ARM_ARG(RegisterType regType))
{
assert(interval != nullptr);

#ifdef TARGET_ARM
// Update overlapping floating point register for TYP_DOUBLE.
Interval* oldAssignedInterval = reg->assignedInterval;
Expand All @@ -6010,25 +6058,17 @@ void LinearScan::updateAssignedInterval(RegRecord* reg, Interval* interval, Regi
}
#endif
reg->assignedInterval = interval;
if (interval != nullptr)
setRegInUse(reg->regNum, interval->registerType);
if (interval->isConstant)
{
setRegInUse(reg->regNum, interval->registerType);
if (interval->isConstant)
{
setConstantReg(reg->regNum, interval->registerType);
}
else
{
clearConstantReg(reg->regNum, interval->registerType);
}
updateNextIntervalRef(reg->regNum, interval);
updateSpillCost(reg->regNum, interval);
setConstantReg(reg->regNum, interval->registerType);
}
else
{
clearNextIntervalRef(reg->regNum, reg->registerType);
clearSpillCost(reg->regNum, reg->registerType);
clearConstantReg(reg->regNum, interval->registerType);
}
updateNextIntervalRef(reg->regNum, interval);
updateSpillCost(reg->regNum, interval);
}

//-----------------------------------------------------------------------------
Expand All @@ -6050,7 +6090,7 @@ void LinearScan::updateAssignedInterval(RegRecord* reg, Interval* interval, Regi
// For ARM32, two float registers consisting a double register are updated
// together when "regType" is TYP_DOUBLE.
//
void LinearScan::updatePreviousInterval(RegRecord* reg, Interval* interval, RegisterType regType)
void LinearScan::updatePreviousInterval(RegRecord* reg, Interval* interval ARM_ARG(RegisterType regType))
{
reg->previousInterval = interval;

Expand Down Expand Up @@ -6182,7 +6222,7 @@ void LinearScan::resolveLocalRef(BasicBlock* block, GenTreeLclVar* treeNode, Ref
varDsc->SetRegNum(REG_STK);
if (interval->assignedReg != nullptr && interval->assignedReg->assignedInterval == interval)
{
updateAssignedInterval(interval->assignedReg, nullptr, interval->registerType);
clearAssignedInterval(interval->assignedReg ARM_ARG(interval->registerType));
}
interval->assignedReg = nullptr;
interval->physReg = REG_NA;
Expand Down Expand Up @@ -6215,7 +6255,7 @@ void LinearScan::resolveLocalRef(BasicBlock* block, GenTreeLclVar* treeNode, Ref
RegRecord* oldRegRecord = getRegisterRecord(oldAssignedReg);
if (oldRegRecord->assignedInterval == interval)
{
updateAssignedInterval(oldRegRecord, nullptr, interval->registerType);
clearAssignedInterval(oldRegRecord ARM_ARG(interval->registerType));
}
}
}
Expand Down Expand Up @@ -6427,14 +6467,14 @@ void LinearScan::resolveLocalRef(BasicBlock* block, GenTreeLclVar* treeNode, Ref
interval->assignedReg = nullptr;
interval->physReg = REG_NA;

updateAssignedInterval(physRegRecord, nullptr, interval->registerType);
clearAssignedInterval(physRegRecord ARM_ARG(interval->registerType));
}
else
{
interval->isActive = true;
interval->assignedReg = physRegRecord;

updateAssignedInterval(physRegRecord, interval, interval->registerType);
updateAssignedInterval(physRegRecord, interval ARM_ARG(interval->registerType));
}
}

Expand Down
8 changes: 4 additions & 4 deletions src/coreclr/jit/lsra.h
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Original file line number Diff line number Diff line change
Expand Up @@ -1016,8 +1016,9 @@ class LinearScan : public LinearScanInterface
bool canSpillDoubleReg(RegRecord* physRegRecord, LsraLocation refLocation);
void unassignDoublePhysReg(RegRecord* doubleRegRecord);
#endif
void updateAssignedInterval(RegRecord* reg, Interval* interval, RegisterType regType);
void updatePreviousInterval(RegRecord* reg, Interval* interval, RegisterType regType);
void clearAssignedInterval(RegRecord* reg ARM_ARG(RegisterType regType));
void updateAssignedInterval(RegRecord* reg, Interval* interval ARM_ARG(RegisterType regType));
void updatePreviousInterval(RegRecord* reg, Interval* interval ARM_ARG(RegisterType regType));
bool canRestorePreviousInterval(RegRecord* regRec, Interval* assignedInterval);
bool isAssignedToInterval(Interval* interval, RegRecord* regRec);
bool isRefPositionActive(RefPosition* refPosition, LsraLocation refLocation);
Expand Down Expand Up @@ -1551,8 +1552,7 @@ class LinearScan : public LinearScanInterface
#endif // !TRACK_LSRA_STATS

private:
Compiler* compiler;

Compiler* compiler;
CompAllocator getAllocator(Compiler* comp)
{
return comp->getAllocator(CMK_LSRA);
Expand Down