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[JIT] Fixed improper peephole zero-extension removal when cdq/cwde instructions are involved #82733
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5f12506
Fixed improper peephole zero-extension removal when cdq/cdqe/cwde ins…
TIHan cf0bdf2
Update regression test
TIHan 697dfdc
Formatting
TIHan f78c28d
Handle cdq differently
TIHan b6467cb
Handle cdq differently
TIHan 334fc46
Handle cdq differently
TIHan ef8688b
Take into account cmpxchg
TIHan 2184607
Take into account cmpxchg
TIHan 25ac969
Feedback
TIHan cef781f
Added emitIsInstrWritingToReg. Removed the previously added function.
TIHan fa40979
Remove function from header
TIHan f868fa0
Quick fix
TIHan 13c9981
Added comment
TIHan e6305be
Formatting
TIHan 1248810
Feedback
TIHan aab0faf
Fix build
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Original file line number | Diff line number | Diff line change |
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// Licensed to the .NET Foundation under one or more agreements. | ||
// The .NET Foundation licenses this file to you under the MIT license. | ||
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// Generated by Fuzzlyn v1.5 on 2023-02-26 16:54:59 | ||
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// Run on X64 Linux | ||
// Seed: 15812590312404596729 | ||
public class C0 | ||
{ | ||
public ulong F2; | ||
public C0(ulong f2) | ||
{ | ||
F2 = f2; | ||
} | ||
} | ||
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public class Program | ||
{ | ||
public static ushort s_2; | ||
public static C0 s_7; | ||
public static int Main() | ||
{ | ||
ulong result = 1234; | ||
for (int vr0 = 0; vr0 < 2; vr0++) | ||
{ | ||
s_7 = M5(); | ||
ulong vr1 = s_7.F2; | ||
result = vr1; | ||
} | ||
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if (result != 18446744069414584320) | ||
return 0; | ||
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return 100; | ||
} | ||
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public static C0 M5() | ||
{ | ||
return new C0(~(ulong)(4294967295U & (-(1 % (s_2-- | 1))))); | ||
} | ||
} |
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,12 @@ | ||
<Project Sdk="Microsoft.NET.Sdk"> | ||
<PropertyGroup> | ||
<OutputType>Exe</OutputType> | ||
</PropertyGroup> | ||
<PropertyGroup> | ||
<DebugType>None</DebugType> | ||
<Optimize>True</Optimize> | ||
</PropertyGroup> | ||
<ItemGroup> | ||
<Compile Include="$(MSBuildProjectName).cs" /> | ||
</ItemGroup> | ||
</Project> |
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notably:
cwd
isAX -> DX:AX
cdq
isEAX -> EDX:EAX
cqo
isRAX -> RDX:RAX
There are also a few other instructions that implicitly write specific outputs (typically
edx
andeax
) or which take implicit inputs (oftenedx
,eax
,ecx
,esi
, oredi
)Wonder if they should be more generally modeled or tracked?
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They probably should be.
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Will need to check
cdq
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cmpxchg16b
also can writeRDX:RAX
(and readsRCX:RBX
)div
,idiv
,imul
, andmul
writesRDX:RAX
(and generally, but not always, reads the same)Might be others that I'm forgetting.
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I don't think we emit
cmpxchg16b
or evencmpxchg8b
AFAIK. But I did need to check forcmpxchg
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I am wondering if there is a good way to track such instructions or generalize the process with adequate asserts so we can catch the issues earlier? Tracking these issues with bad code gen are really hard to investigate.
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All I can think of is to make it more table-driven, otherwise a function that asks the question should be adequate.
Given we are only doing these checks here, we probably could create a function that simply asks "Did the instruction write to this register?" and the result is either 'true' or 'false', and if 'true' we can also provide if it zero-extended or not.
I think I'm going to have to do this anyway for #82733 because I need to re-use the checks of whether or not a register was written to.
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I am more worried if we miss an entry of one of the instructions that we support, we might have similar bug. Is there a manual that we can refer and put all those instructions in the table or whatever data structure we have and also post the link of the manual so someone looking at the code in future can know where it is coming from?
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The Intel and AMD architecture manuals are the relevant resource.
The ones I listed are the ones that write two registers. There are others, like
cmpxchg
, which may write a single dedicated register.It's likely just going to require someone going through the instructions and checking for cases that use a fixed/non-specified register (for input and/or output)