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JIT: Handle edge cases around BlendVariableMask rewrite #126062

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Merged
tannergooding merged 6 commits into from
Apr 24, 2026
Merged

JIT: Handle edge cases around BlendVariableMask rewrite #126062

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f8fae7f
rewrite BlendVariableMask when mask is created from vector
saucecontrol Mar 24, 2026
a934fad
Merge branch 'main' into less-mask
tannergooding Apr 20, 2026
f7c1788
fix 127260
saucecontrol Apr 23, 2026
17130ab
allow re-typing the blend
saucecontrol Apr 23, 2026
ae2c431
early return
saucecontrol Apr 23, 2026
902ef7b
formatting
saucecontrol Apr 23, 2026
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24 changes: 15 additions & 9 deletions src/coreclr/jit/rationalize.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -638,7 +638,8 @@ void Rationalizer::RewriteHWIntrinsicBlendv(GenTree** use, Compiler::GenTreeStac
return;
}

GenTree* op2 = node->Op(2);
GenTree* op2 = node->Op(2);
GenTree*& op3 = node->Op(3);

// We're in the post-order visit and are traversing in execution order, so
// everything between op2 and node will have already been rewritten to LIR
Expand All @@ -655,20 +656,25 @@ void Rationalizer::RewriteHWIntrinsicBlendv(GenTree** use, Compiler::GenTreeStac

if (op2->isEmbeddedMaskingCompatible(m_compiler, tgtMaskSize, tgtSimdBaseType))
{
// We are going to utilize the embedded mask, so we don't need to rewrite. However,
// we want to fixup the simdBaseType here since it simplifies lowering and allows
// both embedded broadcast and the mask to be live simultaneously.
// Make sure we had a mask to begin with. We don't want to create a mask
// solely for the purpose of embedding it.
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if (tgtSimdBaseType != TYP_UNDEF)
if (!op3->OperIsHWIntrinsic() ||
(op3->AsHWIntrinsic()->GetHWIntrinsicId() != NI_AVX512_ConvertVectorToMask))
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{
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op2->AsHWIntrinsic()->SetSimdBaseType(tgtSimdBaseType);
// We are going to utilize the embedded mask, so we don't need to rewrite. However,
// we want to fixup the simdBaseType here since it simplifies lowering and allows
// both embedded broadcast and the mask to be live simultaneously.

if (tgtSimdBaseType != TYP_UNDEF)
{
op2->AsHWIntrinsic()->SetSimdBaseType(tgtSimdBaseType);
}
return;
}
return;
}
}

GenTree*& op3 = node->Op(3);

if (!ShouldRewriteToNonMaskHWIntrinsic(op3))
{
return;
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