[RISC-V] Enhance the utilization of shXadd instructions #122088
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* Prevent the addressing mode nodes(GT_CAST, GT_LSH and GT_MUL) being moved by the CSE in RISCV64. * Previously the nodes [GT_CAST + GT_LSH(or MUL) + GT_ADD] were lowered into [slli(.uw) + add]. Now it is emitted with a single shXadd(.uw).
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Pull request overview
This PR enhances the RISC-V JIT compiler to better utilize shXadd instructions from the Zba extension by preventing Common Subexpression Elimination (CSE) from optimizing away addressing mode nodes that are candidates for these specialized instructions.
Key Changes
- Modified
gtMarkAddrModeto prevent CSE on GT_CAST nodes within addressing mode patterns when targeting RISC-V64 with Zba extension support - This allows the lowering phase to recognize and emit
shXadd.uwinstructions instead of less efficientslli.uw+addsequences - Fixed a typo in a comment ("sccale" → "scale")
Reviewed changes
Copilot reviewed 2 out of 2 changed files in this pull request and generated 2 comments.
| File | Description |
|---|---|
| src/coreclr/jit/gentree.cpp | Added RISC-V64-specific logic to set GTF_DONT_CSE flag on GT_CAST nodes in addressing modes to enable shXadd instruction generation |
| src/coreclr/jit/emitriscv64.cpp | Fixed typo in comment: "sccale" to "scale" |
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Author
|
Some regressions are caused by disabling CSE for some nodes, which calculate addresses for indirections. Actually, the observed addressing mode Diffs are based on 127,090 contexts (105,109 MinOpts, 21,981 FullOpts). Overall (-366 bytes)
MinOpts (+0 bytes)
FullOpts (-366 bytes)
Example diffsbenchmark.mch-12 (-3.45%) : 799.dasm - System.Text.Ascii:ChangeCase[ushort,ushort,System.Text.Ascii+ToLowerConversion](ptr,ptr,nuint):nuint (FullOpts)@@ -11,13 +11,13 @@
; V00 arg0 [V00,T06] ( 5, 10 ) long -> a0 single-def
; V01 arg1 [V01,T04] ( 5, 14 ) long -> a1 single-def
; V02 arg2 [V02,T03] ( 6, 16 ) long -> a2 single-def
-;* V03 loc0 [V03,T14] ( 0, 0 ) ubyte -> zero-ref
-;* V04 loc1 [V04,T15] ( 0, 0 ) ubyte -> zero-ref
-;* V05 loc2 [V05,T16] ( 0, 0 ) ubyte -> zero-ref
-;* V06 loc3 [V06,T17] ( 0, 0 ) ubyte -> zero-ref
-;* V07 loc4 [V07,T18] ( 0, 0 ) ubyte -> zero-ref
+;* V03 loc0 [V03,T11] ( 0, 0 ) ubyte -> zero-ref
+;* V04 loc1 [V04,T12] ( 0, 0 ) ubyte -> zero-ref
+;* V05 loc2 [V05,T13] ( 0, 0 ) ubyte -> zero-ref
+;* V06 loc3 [V06,T14] ( 0, 0 ) ubyte -> zero-ref
+;* V07 loc4 [V07,T15] ( 0, 0 ) ubyte -> zero-ref
;* V08 loc5 [V08 ] ( 0, 0 ) int -> zero-ref
-; V09 loc6 [V09,T00] ( 15, 47.25) long -> a3
+; V09 loc6 [V09,T00] ( 18, 59.25) long -> a3
;* V10 loc7 [V10 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V11 loc8 [V11 ] ( 0, 0 ) ushort -> zero-ref
;* V12 loc9 [V12 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ushort]>
@@ -25,26 +25,26 @@
;* V14 loc11 [V14 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V15 loc12 [V15 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V16 loc13 [V16 ] ( 0, 0 ) int -> zero-ref
-; V17 loc14 [V17,T01] ( 7, 24 ) long -> a5
+; V17 loc14 [V17,T01] ( 7, 24 ) long -> a4
;* V18 loc15 [V18 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ulong]>
;* V19 loc16 [V19 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[uint]>
-; V20 loc17 [V20,T02] ( 7, 24 ) int -> a5
+; V20 loc17 [V20,T02] ( 7, 24 ) int -> a4
;* V21 loc18 [V21 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[uint]>
;* V22 loc19 [V22 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ulong]>
;* V23 loc20 [V23 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ushort]>
-; V24 loc21 [V24,T05] ( 5, 16 ) int -> a6
+; V24 loc21 [V24,T05] ( 5, 16 ) int -> a5
;# V25 OutArgs [V25 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
;* V26 tmp1 [V26 ] ( 0, 0 ) int -> zero-ref
;* V27 tmp2 [V27 ] ( 0, 0 ) int -> zero-ref
;* V28 tmp3 [V28 ] ( 0, 0 ) int -> zero-ref
-;* V29 tmp4 [V29,T19] ( 0, 0 ) int -> zero-ref
-; V30 tmp5 [V30,T11] ( 2, 8 ) int -> a5
+;* V29 tmp4 [V29,T16] ( 0, 0 ) int -> zero-ref
+; V30 tmp5 [V30,T08] ( 2, 8 ) int -> a4
;* V31 tmp6 [V31 ] ( 0, 0 ) struct (16) zero-ref "dup spill" <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V32 tmp7 [V32 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.Runtime.Intrinsics.Vector128`1[byte]>
;* V33 tmp8 [V33 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.Runtime.Intrinsics.Vector128`1[byte]>
;* V34 tmp9 [V34 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V35 tmp10 [V35 ] ( 0, 0 ) int -> zero-ref
-; V36 tmp11 [V36,T12] ( 2, 8 ) long -> a5
+; V36 tmp11 [V36,T09] ( 2, 8 ) long -> a4
;* V37 tmp12 [V37 ] ( 0, 0 ) struct (16) zero-ref "dup spill" <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V38 tmp13 [V38 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.Runtime.Intrinsics.Vector128`1[byte]>
;* V39 tmp14 [V39 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.Runtime.Intrinsics.Vector128`1[byte]>
@@ -220,11 +220,11 @@
;* V209 tmp184 [V209 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V210 tmp185 [V210 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V211 tmp186 [V211 ] ( 0, 0 ) ushort -> zero-ref "Inlining Arg"
-; V212 tmp187 [V212,T08] ( 3, 10 ) int -> a5 ld-addr-op "Inline ldloca(s) first use temp"
+; V212 tmp187 [V212,T07] ( 3, 10 ) int -> a4 ld-addr-op "Inline ldloca(s) first use temp"
;* V213 tmp188 [V213 ] ( 0, 0 ) ubyte -> zero-ref "Inline return value spill temp"
;* V214 tmp189 [V214 ] ( 0, 0 ) ushort -> zero-ref "Inline stloc first use temp"
;* V215 tmp190 [V215 ] ( 0, 0 ) ubyte -> zero-ref "Inline return value spill temp"
-; V216 tmp191 [V216,T13] ( 2, 8 ) ushort -> a5 ld-addr-op "Inline ldloca(s) first use temp"
+; V216 tmp191 [V216,T10] ( 2, 8 ) ushort -> a4 ld-addr-op "Inline ldloca(s) first use temp"
;* V217 tmp192 [V217 ] ( 0, 0 ) ubyte -> zero-ref "Inline return value spill temp"
;* V218 tmp193 [V218 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V219 tmp194 [V219 ] ( 0, 0 ) ubyte -> zero-ref "Inline return value spill temp"
@@ -305,9 +305,6 @@
;* V294 tmp269 [V294 ] ( 0, 0 ) long -> zero-ref "field V207._lower (fldOffset=0x0)" P-INDEP
;* V295 tmp270 [V295 ] ( 0, 0 ) long -> zero-ref "field V207._upper (fldOffset=0x8)" P-INDEP
;* V296 tmp271 [V296 ] ( 0, 0 ) byref -> zero-ref "BlockOp address local"
-; V297 cse0 [V297,T09] ( 3, 8 ) long -> a4 "CSE #01: moderate"
-; V298 cse1 [V298,T10] ( 3, 8 ) long -> a4 "CSE #04: moderate"
-; V299 cse2 [V299,T07] ( 3, 12 ) long -> a4 "CSE #07: moderate"
;
; Lcl frame size = 0
Frame info. #outsz=0; #framesz=16; lcl=0
@@ -323,23 +320,23 @@ G_M31524_IG02: ; bbWeight=0.25, gcrefRegs=0000 {}, byrefRegs=0000 {}, byr
j G_M31524_IG04
;; size=8 bbWeight=0.25 PerfScore 0.50
G_M31524_IG03: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
+ auipc a5, 0xD1FFAB1E
+ ld a5, 0xD1FFAB1E(a5)
+ add a5, a4, a5
auipc a6, 0xD1FFAB1E
ld a6, 0xD1FFAB1E(a6)
- add a6, a5, a6
- auipc a7, 0xD1FFAB1E
- ld a7, 0xD1FFAB1E(a7)
- add a7, a5, a7
- xor a6, a6, a7
- lui a7, 0xD1FFAB1E
- slli a7, a7, 12
- addi a7, a7, 0xD1FFAB1E
- slli a7, a7, 13
- addi a7, a7, 0xD1FFAB1E
- and a6, a6, a7
- srli a6, a6, 2
- xor a5, a6, a5
- add t6, a1, a4
- sd a5, 0xD1FFAB1E(t6)
+ add a6, a4, a6
+ xor a5, a5, a6
+ lui a6, 0xD1FFAB1E
+ slli a6, a6, 12
+ addi a6, a6, 0xD1FFAB1E
+ slli a6, a6, 13
+ addi a6, a6, 0xD1FFAB1E
+ and a5, a5, a6
+ srli a5, a5, 2
+ xor a4, a5, a4
+ sh1add a5, a3, a1
+ sd a4, 0xD1FFAB1E(a5)
addi a3, a3, 0xD1FFAB1E
;; size=72 bbWeight=4 PerfScore 68.00
G_M31524_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
@@ -348,33 +345,32 @@ G_M31524_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
bltu a4, a5, G_M31524_IG07
;; size=12 bbWeight=4 PerfScore 18.00
G_M31524_IG05: ; bbWeight=2, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
- slli a4, a3, 1
- add t6, a0, a4
- ld a5, 0xD1FFAB1E(t6)
- auipc a6, 0xD1FFAB1E
- ld a6, 0xD1FFAB1E(a6)
- and a6, a5, a6
- bnez a6, G_M31524_IG07
+ sh1add a4, a3, a0
+ ld a4, 0xD1FFAB1E(a4)
+ auipc a5, 0xD1FFAB1E
+ ld a5, 0xD1FFAB1E(a5)
+ and a5, a4, a5
+ bnez a5, G_M31524_IG07
j G_M31524_IG03
- ;; size=32 bbWeight=2 PerfScore 21.00
+ ;; size=28 bbWeight=2 PerfScore 20.00
G_M31524_IG06: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
+ lui a5, 0xD1FFAB1E
+ addiw a5, a5, 0xD1FFAB1E
+ addw a5, a4, a5
lui a6, 0xD1FFAB1E
addiw a6, a6, 0xD1FFAB1E
- addw a6, a5, a6
- lui a7, 0xD1FFAB1E
- addiw a7, a7, 0xD1FFAB1E
- addw a7, a5, a7
- xor a6, a6, a7
- sext.w a6, a6
- lui a7, 0xD1FFAB1E
- addiw a7, a7, 0xD1FFAB1E
- and a6, a6, a7
- sext.w a6, a6
- srliw a6, a6, 2
- xor a5, a6, a5
+ addw a6, a4, a6
+ xor a5, a5, a6
sext.w a5, a5
- add t6, a1, a4
- sw a5, 0xD1FFAB1E(t6)
+ lui a6, 0xD1FFAB1E
+ addiw a6, a6, 0xD1FFAB1E
+ and a5, a5, a6
+ sext.w a5, a5
+ srliw a5, a5, 2
+ xor a4, a5, a4
+ sext.w a4, a4
+ sh1add a5, a3, a1
+ sw a4, 0xD1FFAB1E(a5)
addi a3, a3, 0xD1FFAB1E
;; size=72 bbWeight=4 PerfScore 62.00
G_M31524_IG07: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
@@ -383,38 +379,36 @@ G_M31524_IG07: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
bltu a4, a5, G_M31524_IG09
;; size=12 bbWeight=4 PerfScore 18.00
G_M31524_IG08: ; bbWeight=2, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
- slli a4, a3, 1
- add t6, a0, a4
- lw a5, 0xD1FFAB1E(t6)
- lui a6, 0xD1FFAB1E
- addiw a6, a6, 0xD1FFAB1E
- and a6, a5, a6
- sext.w a6, a6
- sext.w a6, a6
- beqz a6, G_M31524_IG06
- ;; size=36 bbWeight=2 PerfScore 20.00
+ sh1add a4, a3, a0
+ lw a4, 0xD1FFAB1E(a4)
+ lui a5, 0xD1FFAB1E
+ addiw a5, a5, 0xD1FFAB1E
+ and a5, a4, a5
+ sext.w a5, a5
+ sext.w a5, a5
+ beqz a5, G_M31524_IG06
+ ;; size=32 bbWeight=2 PerfScore 19.00
G_M31524_IG09: ; bbWeight=2, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
bgeu a3, a2, G_M31524_IG13
;; size=4 bbWeight=2 PerfScore 7.00
G_M31524_IG10: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
- slli a4, a3, 1
- add t6, a0, a4
- lhu a5, 0xD1FFAB1E(t6)
+ sh1add a4, a3, a0
+ lhu a4, 0xD1FFAB1E(a4)
+ sext.w a5, a4
sext.w a6, a5
- sext.w a7, a6
- addi t0, zero, 0xD1FFAB1E
- bltu t0, a7, G_M31524_IG13
- ;; size=28 bbWeight=4 PerfScore 36.00
+ addi a7, zero, 0xD1FFAB1E
+ bltu a7, a6, G_M31524_IG13
+ ;; size=24 bbWeight=4 PerfScore 34.00
G_M31524_IG11: ; bbWeight=2, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
- addiw a7, a6, 0xD1FFAB1E
- addi t0, zero, 0xD1FFAB1E
- bltu t0, a7, G_M31524_IG12
addiw a6, a5, 0xD1FFAB1E
+ addi a7, zero, 0xD1FFAB1E
+ bltu a7, a6, G_M31524_IG12
+ addiw a5, a4, 0xD1FFAB1E
;; size=16 bbWeight=2 PerfScore 10.00
G_M31524_IG12: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
- zext.h a5, a6
- add t6, a1, a4
- sh a5, 0xD1FFAB1E(t6)
+ zext.h a4, a5
+ sh1add a5, a3, a1
+ sh a4, 0xD1FFAB1E(a5)
addi a3, a3, 0xD1FFAB1E
bltu a3, a2, G_M31524_IG10
;; size=20 bbWeight=4 PerfScore 36.00
@@ -431,7 +425,7 @@ RWD08 dq 0025002500250025h
RWD16 dq FF80FF80FF80FF80h
-; Total bytes of code 348, prolog size 16, PerfScore 306.75, instruction count 76, allocated bytes for code 348 (MethodHash=91c584db) for method System.Text.Ascii:ChangeCase[ushort,ushort,System.Text.Ascii+ToLowerConversion](ptr,ptr,nuint):nuint (FullOpts)
+; Total bytes of code 336, prolog size 16, PerfScore 302.75, instruction count 73, allocated bytes for code 336 (MethodHash=91c584db) for method System.Text.Ascii:ChangeCase[ushort,ushort,System.Text.Ascii+ToLowerConversion](ptr,ptr,nuint):nuint (FullOpts)
; ============================================================
Unwind Info:
@@ -442,7 +436,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 174 (0x000ae) Actual length = 348 (0x00015c)
+ Function Length : 168 (0x000a8) Actual length = 336 (0x000150)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)-14 (-3.33%) : 814.dasm - System.SpanHelpers:SequenceCompareTo(byref,int,byref,int):int (FullOpts)@@ -9,26 +9,23 @@
; Final local variable assignments
;
; V00 arg0 [V00,T01] ( 6, 11.50) byref -> s1 single-def
-; V01 arg1 [V01,T07] ( 6, 5 ) int -> s3 single-def
+; V01 arg1 [V01,T05] ( 6, 5 ) int -> s3 single-def
; V02 arg2 [V02,T02] ( 6, 11.50) byref -> s2 single-def
-; V03 arg3 [V03,T08] ( 6, 5 ) int -> s4 single-def
-; V04 loc0 [V04,T12] ( 2, 1.50) int -> a0
-; V05 loc1 [V05,T05] ( 6, 10.50) long -> a1
-; V06 loc2 [V06,T00] ( 13, 35 ) long -> a2
+; V03 arg3 [V03,T06] ( 6, 5 ) int -> s4 single-def
+; V04 loc0 [V04,T09] ( 2, 1.50) int -> a0
+; V05 loc1 [V05,T03] ( 6, 10.50) long -> a1
+; V06 loc2 [V06,T00] ( 16, 43.50) long -> a2
;* V07 loc3 [V07 ] ( 0, 0 ) long -> zero-ref
-; V08 loc4 [V08,T06] ( 3, 8.50) int -> a3
+; V08 loc4 [V08,T04] ( 3, 8.50) int -> a3
;# V09 OutArgs [V09 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
-; V10 tmp1 [V10,T09] ( 3, 1.50) int -> s3
+; V10 tmp1 [V10,T07] ( 3, 1.50) int -> s3
;* V11 tmp2 [V11 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V12 tmp3 [V12 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V13 tmp4 [V13 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V14 tmp5 [V14 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V15 tmp6 [V15 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V16 tmp7 [V16 ] ( 0, 0 ) ushort -> zero-ref "Inlining Arg"
-; V17 cse0 [V17,T03] ( 3, 12 ) long -> a3 "CSE #01: aggressive"
-; V18 cse1 [V18,T04] ( 3, 12 ) long -> a3 "CSE #04: aggressive"
-; V19 cse2 [V19,T10] ( 3, 1.50) long -> a4 "CSE #02: moderate"
-; V20 cse3 [V20,T11] ( 3, 1.50) long -> a3 "CSE #03: moderate"
+; V17 cse0 [V17,T08] ( 3, 1.50) long -> a3 "CSE #01: moderate"
;
; Lcl frame size = 0
Frame info. #outsz=0; #framesz=48; lcl=0
@@ -113,51 +110,55 @@ G_M65109_IG09: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=40200 {s1 s2
bltu a1, a3, G_M65109_IG11
;; size=16 bbWeight=0.50 PerfScore 2.50
G_M65109_IG10: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=40200 {s1 s2}, byref, isz
- slli a3, a2, 1
- add t6, s1, a3
- ; byrRegs +[t6]
- ld a4, 0xD1FFAB1E(t6)
- add t6, s2, a3
- ld a3, 0xD1FFAB1E(t6)
- bne a4, a3, G_M65109_IG11
+ sh1add a3, a2, s1
+ ; byrRegs +[a3]
+ ld a3, 0xD1FFAB1E(a3)
+ ; byrRegs -[a3]
+ sh1add a4, a2, s2
+ ; byrRegs +[a4]
+ ld a4, 0xD1FFAB1E(a4)
+ ; byrRegs -[a4]
+ bne a3, a4, G_M65109_IG11
addi a2, a2, 0xD1FFAB1E
addi a3, a2, 0xD1FFAB1E
bgeu a1, a3, G_M65109_IG10
- ;; size=36 bbWeight=4 PerfScore 54.00
+ ;; size=32 bbWeight=4 PerfScore 52.00
G_M65109_IG11: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=40200 {s1 s2}, byref, isz
- ; byrRegs -[t6]
addi a3, a2, 0xD1FFAB1E
bltu a1, a3, G_M65109_IG12
- slli a4, a2, 1
- add t6, s1, a4
- ; byrRegs +[t6]
- lw a5, 0xD1FFAB1E(t6)
- sext.w a5, a5
- add t6, s2, a4
- lw a4, 0xD1FFAB1E(t6)
+ sh1add a4, a2, s1
+ ; byrRegs +[a4]
+ lw a4, 0xD1FFAB1E(a4)
+ ; byrRegs -[a4]
sext.w a4, a4
- bne a5, a4, G_M65109_IG12
+ sh1add a5, a2, s2
+ ; byrRegs +[a5]
+ lw a5, 0xD1FFAB1E(a5)
+ ; byrRegs -[a5]
+ sext.w a5, a5
+ bne a4, a5, G_M65109_IG12
mv a2, a3
- ;; size=44 bbWeight=0.50 PerfScore 7.25
+ ;; size=40 bbWeight=0.50 PerfScore 7.00
G_M65109_IG12: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=40200 {s1 s2}, byref, isz
- ; byrRegs -[t6]
bgeu a2, a1, G_M65109_IG14
;; size=4 bbWeight=1 PerfScore 3.50
G_M65109_IG13: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=40200 {s1 s2}, byref, isz
- slli a3, a2, 1
- add t6, s1, a3
- ; byrRegs +[t6]
- lhu a4, 0xD1FFAB1E(t6)
- add t6, s2, a3
- lhu a3, 0xD1FFAB1E(t6)
- subw a3, a4, a3
+ sh1add a3, a2, s1
+ ; byrRegs +[a3]
+ lhu a3, 0xD1FFAB1E(a3)
+ ; byrRegs -[a3]
+ sh1add a4, a2, s2
+ ; byrRegs +[a4]
+ lhu a4, 0xD1FFAB1E(a4)
+ ; byrRegs -[a4]
+ subw a3, a3, a4
sext.w a4, a3
bnez a4, G_M65109_IG15
addi a2, a2, 0xD1FFAB1E
bltu a2, a1, G_M65109_IG13
- ;; size=40 bbWeight=4 PerfScore 64.00
+ ;; size=34 bbWeight=4 PerfScore 62.00
G_M65109_IG14: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, epilog, nogc
- ; byrRegs -[s1 s2 t6]
+ ; byrRegs -[s1 s2]
ld s4, 40(sp)
ld s3, 32(sp)
ld s2, 24(sp)
@@ -179,7 +180,7 @@ G_M65109_IG16: ; bbWeight=0.50, epilog, nogc, extend
addi sp, sp, 48
ret ;; size=32 bbWeight=0.50 PerfScore 7.75
-; Total bytes of code 420, prolog size 48, PerfScore 207.25, instruction count 85, allocated bytes for code 420 (MethodHash=bda601aa) for method System.SpanHelpers:SequenceCompareTo(byref,int,byref,int):int (FullOpts)
+; Total bytes of code 406, prolog size 48, PerfScore 203.00, instruction count 82, allocated bytes for code 406 (MethodHash=bda601aa) for method System.SpanHelpers:SequenceCompareTo(byref,int,byref,int):int (FullOpts)
; ============================================================
Unwind Info:
@@ -190,7 +191,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 210 (0x000d2) Actual length = 420 (0x0001a4)
+ Function Length : 203 (0x000cb) Actual length = 406 (0x000196)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)-20 (-3.06%) : 200.dasm - System.Globalization.IcuLocaleData:SearchCultureName(System.String):int (FullOpts)@@ -8,14 +8,14 @@
; 0 inlinees with PGO data; 10 single block inlinees; 6 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T07] ( 4, 6.96) ref -> s1 class-hnd single-def <System.String>
+; V00 arg0 [V00,T06] ( 4, 6.96) ref -> s1 class-hnd single-def <System.String>
;* V01 loc0 [V01 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[byte]>
;* V02 loc1 [V02 ] ( 0, 0 ) struct (16) zero-ref <System.ReadOnlySpan`1[byte]>
; V03 loc2 [V03,T02] ( 6, 15 ) int -> s1
-; V04 loc3 [V04,T06] ( 4, 10.50) int -> s2
-; V05 loc4 [V05,T17] ( 3, 1.50) int -> s3
-; V06 loc5 [V06,T00] ( 5, 16.34) int -> s5
-; V07 loc6 [V07,T01] ( 5, 15.84) ushort -> s7
+; V04 loc3 [V04,T05] ( 4, 10.50) int -> s2
+; V05 loc4 [V05,T16] ( 3, 1.50) int -> s3
+; V06 loc5 [V06,T00] ( 6, 20.30) int -> s5
+; V07 loc6 [V07,T01] ( 5, 15.84) ushort -> s6
;* V08 loc7 [V08 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.ReadOnlySpan`1[byte]>
; V09 loc8 [V09,T03] ( 5, 12.50) int -> s5
; V10 loc9 [V10,T04] ( 3, 12 ) int -> a0
@@ -23,10 +23,10 @@
;* V12 tmp1 [V12 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp" <System.Span`1[byte]>
;* V13 tmp2 [V13 ] ( 0, 0 ) byref -> zero-ref "impAppendStmt"
;* V14 tmp3 [V14 ] ( 0, 0 ) byref -> zero-ref
-; V15 tmp4 [V15,T09] ( 2, 7.92) byref -> a0
-; V16 tmp5 [V16,T08] ( 3, 7.92) int -> a1
+; V15 tmp4 [V15,T08] ( 2, 7.92) byref -> a0
+; V16 tmp5 [V16,T07] ( 3, 7.92) int -> a1
;* V17 tmp6 [V17 ] ( 0, 0 ) struct (16) zero-ref multireg-ret "spilled call-like call argument" <System.ReadOnlySpan`1[byte]>
-; V18 tmp7 [V18,T16] ( 2, 2 ) long -> s4 "Inlining Arg"
+; V18 tmp7 [V18,T15] ( 2, 2 ) long -> s4 "Inlining Arg"
;* V19 tmp8 [V19 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V20 tmp9 [V20 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V21 tmp10 [V21 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg" <System.Span`1[byte]>
@@ -44,13 +44,13 @@
;* V33 tmp22 [V33 ] ( 0, 0 ) int -> zero-ref "impAppendStmt"
;* V34 tmp23 [V34 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg" <System.ReadOnlySpan`1[byte]>
;* V35 tmp24 [V35 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg" <System.ReadOnlySpan`1[byte]>
-; V36 tmp25 [V36,T13] ( 3, 4.96) byref -> s4 single-def "field V01._reference (fldOffset=0x0)" P-INDEP
-; V37 tmp26 [V37,T19] ( 2, 1 ) int -> s3 "field V01._length (fldOffset=0x8)" P-INDEP
-; V38 tmp27 [V38,T14] ( 2, 4.50) byref -> s4 single-def "field V02._reference (fldOffset=0x0)" P-INDEP
-; V39 tmp28 [V39,T15] ( 2, 4.50) int -> s3 "field V02._length (fldOffset=0x8)" P-INDEP
+; V36 tmp25 [V36,T12] ( 3, 4.96) byref -> s4 single-def "field V01._reference (fldOffset=0x0)" P-INDEP
+; V37 tmp26 [V37,T18] ( 2, 1 ) int -> s3 "field V01._length (fldOffset=0x8)" P-INDEP
+; V38 tmp27 [V38,T13] ( 2, 4.50) byref -> s4 single-def "field V02._reference (fldOffset=0x0)" P-INDEP
+; V39 tmp28 [V39,T14] ( 2, 4.50) int -> s3 "field V02._length (fldOffset=0x8)" P-INDEP
;* V40 tmp29 [V40 ] ( 0, 0 ) byref -> zero-ref "field V08._reference (fldOffset=0x0)" P-INDEP
;* V41 tmp30 [V41 ] ( 0, 0 ) int -> zero-ref "field V08._length (fldOffset=0x8)" P-INDEP
-; V42 tmp31 [V42,T18] ( 2, 1 ) byref -> s4 single-def "field V12._reference (fldOffset=0x0)" P-INDEP
+; V42 tmp31 [V42,T17] ( 2, 1 ) byref -> s4 single-def "field V12._reference (fldOffset=0x0)" P-INDEP
;* V43 tmp32 [V43 ] ( 0, 0 ) int -> zero-ref "field V12._length (fldOffset=0x8)" P-INDEP
;* V44 tmp33 [V44 ] ( 0, 0 ) byref -> zero-ref "field V17._reference (fldOffset=0x0)" P-INDEP
;* V45 tmp34 [V45 ] ( 0, 0 ) int -> zero-ref "field V17._length (fldOffset=0x8)" P-INDEP
@@ -60,8 +60,8 @@
;* V49 tmp38 [V49 ] ( 0, 0 ) int -> zero-ref "field V22._length (fldOffset=0x8)" P-INDEP
;* V50 tmp39 [V50 ] ( 0, 0 ) byref -> zero-ref single-def "field V27._reference (fldOffset=0x0)" P-INDEP
;* V51 tmp40 [V51 ] ( 0, 0 ) int -> zero-ref "field V27._length (fldOffset=0x8)" P-INDEP
-; V52 tmp41 [V52,T10] ( 2, 8 ) byref -> a0 "field V30._reference (fldOffset=0x0)" P-INDEP
-; V53 tmp42 [V53,T11] ( 2, 8 ) int -> a1 "field V30._length (fldOffset=0x8)" P-INDEP
+; V52 tmp41 [V52,T09] ( 2, 8 ) byref -> a0 "field V30._reference (fldOffset=0x0)" P-INDEP
+; V53 tmp42 [V53,T10] ( 2, 8 ) int -> a1 "field V30._length (fldOffset=0x8)" P-INDEP
;* V54 tmp43 [V54 ] ( 0, 0 ) byref -> zero-ref "field V31._reference (fldOffset=0x0)" P-INDEP
;* V55 tmp44 [V55 ] ( 0, 0 ) int -> zero-ref "field V31._length (fldOffset=0x8)" P-INDEP
;* V56 tmp45 [V56 ] ( 0, 0 ) byref -> zero-ref "field V34._reference (fldOffset=0x0)" P-INDEP
@@ -69,24 +69,22 @@
;* V58 tmp47 [V58 ] ( 0, 0 ) byref -> zero-ref "field V35._reference (fldOffset=0x0)" P-INDEP
;* V59 tmp48 [V59 ] ( 0, 0 ) int -> zero-ref "field V35._length (fldOffset=0x8)" P-INDEP
; V60 GsCookie [V60 ] ( 1, 1 ) long -> [fp-0x08] do-not-enreg[X] addr-exposed "GSSecurityCookie"
-; V61 cse0 [V61,T12] ( 5, 6.96) int -> s2 "CSE #01: aggressive"
-; V62 cse1 [V62,T05] ( 3, 11.88) long -> s6 "CSE #02: aggressive"
+; V61 cse0 [V61,T11] ( 5, 6.96) int -> s2 "CSE #01: aggressive"
;
-; Lcl frame size = 8
-Frame info. #outsz=0; #framesz=80; lcl=8
+; Lcl frame size = 16
+Frame info. #outsz=0; #framesz=80; lcl=16
G_M6900_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
addi sp, sp, -80
- sd fp, 8(sp)
- sd ra, 16(sp)
- sd s1, 24(sp)
- sd s2, 32(sp)
- sd s3, 40(sp)
- sd s4, 48(sp)
- sd s5, 56(sp)
- sd s6, 64(sp)
- sd s7, 72(sp)
- addi fp, sp, 8
+ sd fp, 16(sp)
+ sd ra, 24(sp)
+ sd s1, 32(sp)
+ sd s2, 40(sp)
+ sd s3, 48(sp)
+ sd s4, 56(sp)
+ sd s5, 64(sp)
+ sd s6, 72(sp)
+ addi fp, sp, 16
lui t0, 0xD1FFAB1E
addiw t0, t0, 0xD1FFAB1E
slli t0, t0, 14
@@ -98,7 +96,7 @@ G_M6900_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
sd t0, -8(fp)
mv s1, a0
; gcrRegs +[s1]
- ;; size=84 bbWeight=1 PerfScore 49.50
+ ;; size=80 bbWeight=1 PerfScore 45.50
G_M6900_IG02: ; bbWeight=1, gcrefRegs=0200 {s1}, byrefRegs=0000 {}, byref, isz
lw s2, 0xD1FFAB1E(s1)
sext.w a0, s2
@@ -132,16 +130,14 @@ G_M6900_IG05: ; bbWeight=0.50, gcrefRegs=0200 {s1}, byrefRegs=0000 {}, by
;; size=12 bbWeight=0.50 PerfScore 2.25
G_M6900_IG06: ; bbWeight=3.96, gcrefRegs=0200 {s1}, byrefRegs=100000 {s4}, byref, isz
; byrRegs +[s4]
- zext.w s6, s5
- slli a0, s6, 1
- add a0, s1, a0
+ sh1add.uw a0, s5, s1
; byrRegs +[a0]
- lhu s7, 0xD1FFAB1E(a0)
- sext.w a0, s7
+ lhu s6, 0xD1FFAB1E(a0)
+ sext.w a0, s6
; byrRegs -[a0]
addi a1, zero, 0xD1FFAB1E
bge a1, a0, G_M6900_IG08
- ;; size=28 bbWeight=3.96 PerfScore 35.64
+ ;; size=20 bbWeight=3.96 PerfScore 31.68
G_M6900_IG07: ; bbWeight=1.98, gcrefRegs=0200 {s1}, byrefRegs=100000 {s4}, byref
lui a0, 0xD1FFAB1E
addiw a0, a0, 0xD1FFAB1E
@@ -161,19 +157,20 @@ G_M6900_IG07: ; bbWeight=1.98, gcrefRegs=0200 {s1}, byrefRegs=100000 {s4}
; gcr arg pop 0
;; size=60 bbWeight=1.98 PerfScore 35.64
G_M6900_IG08: ; bbWeight=3.96, gcrefRegs=0200 {s1}, byrefRegs=100000 {s4}, byref, isz
- add a0, s4, s6
+ zext.w a0, s5
+ add a0, s4, a0
; byrRegs +[a0]
- addiw a1, s7, 0xD1FFAB1E
+ addiw a1, s6, 0xD1FFAB1E
addi a2, zero, 0xD1FFAB1E
bltu a2, a1, G_M6900_IG10
- ;; size=16 bbWeight=3.96 PerfScore 19.80
+ ;; size=20 bbWeight=3.96 PerfScore 21.78
G_M6900_IG09: ; bbWeight=1.98, gcrefRegs=0200 {s1}, byrefRegs=100400 {a0 s4}, byref, isz
- ori a1, s7, 32
+ ori a1, s6, 32
andi a1, a1, 255
j G_M6900_IG11
;; size=12 bbWeight=1.98 PerfScore 4.95
G_M6900_IG10: ; bbWeight=1.98, gcrefRegs=0200 {s1}, byrefRegs=100400 {a0 s4}, byref
- andi a1, s7, 255
+ andi a1, s6, 255
;; size=4 bbWeight=1.98 PerfScore 0.99
G_M6900_IG11: ; bbWeight=3.96, gcrefRegs=0200 {s1}, byrefRegs=100400 {a0 s4}, byref, isz
sb a1, 0xD1FFAB1E(a0)
@@ -238,18 +235,17 @@ G_M6900_IG17: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byre
jalr ra // CORINFO_HELP_FAIL_FAST
;; size=28 bbWeight=0.50 PerfScore 6.00
G_M6900_IG18: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, epilog, nogc
- addi sp, fp, -8
- ld s7, 72(sp)
- ld s6, 64(sp)
- ld s5, 56(sp)
- ld s4, 48(sp)
- ld s3, 40(sp)
- ld s2, 32(sp)
- ld s1, 24(sp)
- ld ra, 16(sp)
- ld fp, 8(sp)
+ addi sp, fp, -16
+ ld s6, 72(sp)
+ ld s5, 64(sp)
+ ld s4, 56(sp)
+ ld s3, 48(sp)
+ ld s2, 40(sp)
+ ld s1, 32(sp)
+ ld ra, 24(sp)
+ ld fp, 16(sp)
addi sp, sp, 80
- ret ;; size=48 bbWeight=0.50 PerfScore 11.00
+ ret ;; size=44 bbWeight=0.50 PerfScore 10.00
G_M6900_IG19: ; bbWeight=0.50, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref, isz
sext.w a0, s5
auipc t0, 0xD1FFAB1E
@@ -260,18 +256,17 @@ G_M6900_IG19: ; bbWeight=0.50, gcVars=0000000000000000 {}, gcrefRegs=0000
jalr ra // CORINFO_HELP_FAIL_FAST
;; size=28 bbWeight=0.50 PerfScore 6.00
G_M6900_IG20: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, epilog, nogc
- addi sp, fp, -8
- ld s7, 72(sp)
- ld s6, 64(sp)
- ld s5, 56(sp)
- ld s4, 48(sp)
- ld s3, 40(sp)
- ld s2, 32(sp)
- ld s1, 24(sp)
- ld ra, 16(sp)
- ld fp, 8(sp)
+ addi sp, fp, -16
+ ld s6, 72(sp)
+ ld s5, 64(sp)
+ ld s4, 56(sp)
+ ld s3, 48(sp)
+ ld s2, 40(sp)
+ ld s1, 32(sp)
+ ld ra, 24(sp)
+ ld fp, 16(sp)
addi sp, sp, 80
- ret ;; size=48 bbWeight=0.50 PerfScore 11.00
+ ret ;; size=44 bbWeight=0.50 PerfScore 10.00
G_M6900_IG21: ; bbWeight=0.50, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref, isz
addi a0, zero, 0xD1FFAB1E
auipc t0, 0xD1FFAB1E
@@ -282,67 +277,66 @@ G_M6900_IG21: ; bbWeight=0.50, gcVars=0000000000000000 {}, gcrefRegs=0000
jalr ra // CORINFO_HELP_FAIL_FAST
;; size=28 bbWeight=0.50 PerfScore 6.00
G_M6900_IG22: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, epilog, nogc
- addi sp, fp, -8
- ld s7, 72(sp)
- ld s6, 64(sp)
- ld s5, 56(sp)
- ld s4, 48(sp)
- ld s3, 40(sp)
- ld s2, 32(sp)
- ld s1, 24(sp)
- ld ra, 16(sp)
- ld fp, 8(sp)
+ addi sp, fp, -16
+ ld s6, 72(sp)
+ ld s5, 64(sp)
+ ld s4, 56(sp)
+ ld s3, 48(sp)
+ ld s2, 40(sp)
+ ld s1, 32(sp)
+ ld ra, 24(sp)
+ ld fp, 16(sp)
addi sp, sp, 80
- ret ;; size=48 bbWeight=0.50 PerfScore 11.00
+ ret ;; size=44 bbWeight=0.50 PerfScore 10.00
RWD00 dq 9ABCDEF012345678h
-; Total bytes of code 654, prolog size 84, PerfScore 381.16, instruction count 137, allocated bytes for code 654 (MethodHash=09fae50b) for method System.Globalization.IcuLocaleData:SearchCultureName(System.String):int (FullOpts)
+; Total bytes of code 634, prolog size 80, PerfScore 372.18, instruction count 132, allocated bytes for code 634 (MethodHash=09fae50b) for method System.Globalization.IcuLocaleData:SearchCultureName(System.String):int (FullOpts)
; ============================================================
Unwind Info:
>> Start offset : 0x000000 (not in unwind data)
...+20 (+3.11%) : 1775.dasm - System.Number+BigInteger:HeuristicDivide(byref,byref):uint (FullOpts)@@ -8,32 +8,32 @@
; 0 inlinees with PGO data; 40 single block inlinees; 10 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T24] ( 7, 5 ) byref -> s1 single-def
-; V01 arg1 [V01,T25] ( 5, 4 ) byref -> a1 single-def
+; V00 arg0 [V00,T22] ( 7, 5 ) byref -> s1 single-def
+; V01 arg1 [V01,T23] ( 5, 4 ) byref -> a1 single-def
; V02 loc0 [V02,T00] ( 15, 36 ) int -> s2
-; V03 loc1 [V03,T29] ( 3, 1.50) int -> a0
-; V04 loc2 [V04,T27] ( 6, 3 ) int -> s5
+; V03 loc1 [V03,T26] ( 4, 2 ) int -> a0
+; V04 loc2 [V04,T25] ( 6, 3 ) int -> s5
;* V05 loc3 [V05 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V06 loc4 [V06 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
-; V07 loc5 [V07,T02] ( 6, 20.50) int -> a0
-; V08 loc6 [V08,T13] ( 3, 8.50) long -> a2
-; V09 loc7 [V09,T14] ( 3, 8.50) long -> a3
-; V10 loc8 [V10,T09] ( 3, 12 ) long -> a5
-; V11 loc9 [V11,T10] ( 3, 12 ) long -> a5
+; V07 loc5 [V07,T01] ( 8, 28.50) int -> a0
+; V08 loc6 [V08,T11] ( 3, 8.50) long -> a2
+; V09 loc7 [V09,T12] ( 3, 8.50) long -> a3
+; V10 loc8 [V10,T07] ( 3, 12 ) long -> a5
+; V11 loc9 [V11,T08] ( 3, 12 ) long -> a5
;* V12 loc10 [V12 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V13 loc11 [V13 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V14 loc12 [V14 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V15 loc13 [V15 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
-; V16 loc14 [V16,T03] ( 6, 20.50) int -> a0
-; V17 loc15 [V17,T15] ( 3, 8.50) long -> a1
-; V18 loc16 [V18,T11] ( 3, 12 ) long -> a2
+; V16 loc14 [V16,T02] ( 8, 28.50) int -> a0
+; V17 loc15 [V17,T13] ( 3, 8.50) long -> a1
+; V18 loc16 [V18,T09] ( 3, 12 ) long -> a2
;* V19 loc17 [V19 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V20 loc18 [V20 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V21 loc19 [V21 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V22 loc20 [V22 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;# V23 OutArgs [V23 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
-; V24 tmp1 [V24,T28] ( 2, 2 ) int -> a2 "impAppendStmt"
-; V25 tmp2 [V25,T08] ( 2, 16 ) long -> a2 "impAppendStmt"
+; V24 tmp1 [V24,T27] ( 2, 2 ) int -> a2 "impAppendStmt"
+; V25 tmp2 [V25,T06] ( 2, 16 ) long -> a2 "impAppendStmt"
;* V26 tmp3 [V26 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V27 tmp4 [V27 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp" <System.Span`1[uint]>
;* V28 tmp5 [V28 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
@@ -74,34 +74,31 @@
;* V63 tmp40 [V63 ] ( 0, 0 ) int -> zero-ref "field V21._length (fldOffset=0x8)" P-INDEP
;* V64 tmp41 [V64 ] ( 0, 0 ) byref -> zero-ref "field V22._reference (fldOffset=0x0)" P-INDEP
;* V65 tmp42 [V65 ] ( 0, 0 ) int -> zero-ref "field V22._length (fldOffset=0x8)" P-INDEP
-; V66 tmp43 [V66,T31] ( 2, 1 ) byref -> a2 single-def "field V27._reference (fldOffset=0x0)" P-INDEP
+; V66 tmp43 [V66,T28] ( 2, 1 ) byref -> a2 single-def "field V27._reference (fldOffset=0x0)" P-INDEP
;* V67 tmp44 [V67 ] ( 0, 0 ) int -> zero-ref "field V27._length (fldOffset=0x8)" P-INDEP
-; V68 tmp45 [V68,T32] ( 2, 1 ) byref -> a3 single-def "field V29._reference (fldOffset=0x0)" P-INDEP
+; V68 tmp45 [V68,T29] ( 2, 1 ) byref -> a3 single-def "field V29._reference (fldOffset=0x0)" P-INDEP
;* V69 tmp46 [V69 ] ( 0, 0 ) int -> zero-ref "field V29._length (fldOffset=0x8)" P-INDEP
-; V70 tmp47 [V70,T16] ( 2, 8 ) byref -> a5 "field V31._reference (fldOffset=0x0)" P-INDEP
+; V70 tmp47 [V70,T14] ( 2, 8 ) byref -> a5 "field V31._reference (fldOffset=0x0)" P-INDEP
;* V71 tmp48 [V71 ] ( 0, 0 ) int -> zero-ref "field V31._length (fldOffset=0x8)" P-INDEP
-; V72 tmp49 [V72,T17] ( 2, 8 ) byref -> a7 "field V33._reference (fldOffset=0x0)" P-INDEP
+; V72 tmp49 [V72,T15] ( 2, 8 ) byref -> a6 "field V33._reference (fldOffset=0x0)" P-INDEP
;* V73 tmp50 [V73 ] ( 0, 0 ) int -> zero-ref "field V33._length (fldOffset=0x8)" P-INDEP
-; V74 tmp51 [V74,T18] ( 2, 8 ) byref -> a7 "field V35._reference (fldOffset=0x0)" P-INDEP
+; V74 tmp51 [V74,T16] ( 2, 8 ) byref -> a6 "field V35._reference (fldOffset=0x0)" P-INDEP
;* V75 tmp52 [V75 ] ( 0, 0 ) int -> zero-ref "field V35._length (fldOffset=0x8)" P-INDEP
-; V76 tmp53 [V76,T19] ( 2, 8 ) byref -> a0 "field V37._reference (fldOffset=0x0)" P-INDEP
+; V76 tmp53 [V76,T17] ( 2, 8 ) byref -> a0 "field V37._reference (fldOffset=0x0)" P-INDEP
;* V77 tmp54 [V77 ] ( 0, 0 ) int -> zero-ref "field V37._length (fldOffset=0x8)" P-INDEP
-; V78 tmp55 [V78,T20] ( 2, 8 ) byref -> a2 "field V39._reference (fldOffset=0x0)" P-INDEP
+; V78 tmp55 [V78,T18] ( 2, 8 ) byref -> a2 "field V39._reference (fldOffset=0x0)" P-INDEP
;* V79 tmp56 [V79 ] ( 0, 0 ) int -> zero-ref "field V39._length (fldOffset=0x8)" P-INDEP
-; V80 tmp57 [V80,T21] ( 2, 8 ) byref -> a4 "field V41._reference (fldOffset=0x0)" P-INDEP
+; V80 tmp57 [V80,T19] ( 2, 8 ) byref -> a3 "field V41._reference (fldOffset=0x0)" P-INDEP
;* V81 tmp58 [V81 ] ( 0, 0 ) int -> zero-ref "field V41._length (fldOffset=0x8)" P-INDEP
-; V82 tmp59 [V82,T22] ( 2, 8 ) byref -> a4 "field V43._reference (fldOffset=0x0)" P-INDEP
+; V82 tmp59 [V82,T20] ( 2, 8 ) byref -> a3 "field V43._reference (fldOffset=0x0)" P-INDEP
;* V83 tmp60 [V83 ] ( 0, 0 ) int -> zero-ref "field V43._length (fldOffset=0x8)" P-INDEP
-; V84 tmp61 [V84,T23] ( 2, 8 ) byref -> a0 "field V45._reference (fldOffset=0x0)" P-INDEP
+; V84 tmp61 [V84,T21] ( 2, 8 ) byref -> a0 "field V45._reference (fldOffset=0x0)" P-INDEP
;* V85 tmp62 [V85 ] ( 0, 0 ) int -> zero-ref "field V45._length (fldOffset=0x8)" P-INDEP
-; V86 cse0 [V86,T30] ( 3, 1.50) long -> a0 "CSE #02: moderate"
-; V87 cse1 [V87,T04] ( 4, 16 ) long -> a6 "CSE #07: aggressive"
-; V88 cse2 [V88,T05] ( 4, 16 ) long -> a3 "CSE #10: aggressive"
-; V89 cse3 [V89,T01] ( 8, 25 ) byref -> s3 "CSE #05: aggressive"
-; V90 cse4 [V90,T12] ( 4, 9 ) byref -> s4 "CSE #03: moderate"
-; V91 cse5 [V91,T06] ( 4, 16 ) int -> a2 "CSE #08: aggressive"
-; V92 cse6 [V92,T07] ( 4, 16 ) int -> a1 "CSE #11: aggressive"
-; V93 cse7 [V93,T26] ( 2, 4.50) long -> a4 hoist "CSE #04: moderate"
+; V86 cse0 [V86,T03] ( 8, 25 ) byref -> s3 "CSE #03: aggressive"
+; V87 cse1 [V87,T10] ( 4, 9 ) byref -> s4 "CSE #01: moderate"
+; V88 cse2 [V88,T04] ( 4, 16 ) int -> a2 "CSE #04: aggressive"
+; V89 cse3 [V89,T05] ( 4, 16 ) int -> a1 "CSE #05: aggressive"
+; V90 cse4 [V90,T24] ( 2, 4.50) long -> a4 hoist "CSE #02: moderate"
;
; Lcl frame size = 8
Frame info. #outsz=0; #framesz=64; lcl=8
@@ -137,8 +134,8 @@ G_M38309_IG03: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0A00 {s1 a1}
sext.w a4, a3
sext.w a5, a0
bgeu a5, a4, G_M38309_IG17
- slli.uw a0, a0, 2
- add t6, a2, a0
+ slli.uw a3, a0, 2
+ add t6, a2, a3
; byrRegs +[t6]
lw a2, 0xD1FFAB1E(t6)
; byrRegs -[a2]
@@ -146,6 +143,7 @@ G_M38309_IG03: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0A00 {s1 a1}
; byrRegs +[s4]
mv a3, s4
; byrRegs +[a3]
+ slli.uw a0, a0, 2
add t6, a3, a0
lw a0, 0xD1FFAB1E(t6)
addiw a0, a0, 0xD1FFAB1E
@@ -158,7 +156,7 @@ G_M38309_IG03: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0A00 {s1 a1}
mv a3, zero
; byrRegs -[a3]
zext.w a4, s5
- ;; size=92 bbWeight=0.50 PerfScore 22.00
+ ;; size=96 bbWeight=0.50 PerfScore 22.25
G_M38309_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=180A00 {s1 a1 s3 s4}, byref, isz
; byrRegs -[t6]
mv a5, s4
@@ -176,28 +174,31 @@ G_M38309_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=180A00 {s1 a1 s
mul a5, a5, a4
add a5, a5, a3
srli a3, a5, 32
- mv a7, s3
- ; byrRegs +[a7]
- add t6, a7, a6
- lw a7, 0xD1FFAB1E(t6)
- ; byrRegs -[a7]
- zext.w a7, a7
+ mv a6, s3
+ ; byrRegs +[a6]
+ slli.uw a7, a0, 2
+ add t6, a6, a7
+ lw a6, 0xD1FFAB1E(t6)
+ ; byrRegs -[a6]
+ zext.w a6, a6
zext.w a5, a5
- sub a5, a7, a5
+ sub a5, a6, a5
sub a5, a5, a2
srli a2, a5, 32
andi a2, a2, 1
- mv a7, s3
- ; byrRegs +[a7]
- add t6, a7, a6
+ mv a6, s3
+ ; byrRegs +[a6]
+ slli.uw a7, a0, 2
+ add t6, a6, a7
sw a5, 0xD1FFAB1E(t6)
addiw a0, a0, 0xD1FFAB1E
sext.w a5, a0
sext.w a6, s2
+ ; byrRegs -[a6]
blt a5, a6, G_M38309_IG04
- ;; size=108 bbWeight=4 PerfScore 112.00
+ ;; size=116 bbWeight=4 PerfScore 116.00
G_M38309_IG05: ; bbWeight=0.25, gcrefRegs=0000 {}, byrefRegs=180A00 {s1 a1 s3 s4}, byref, isz
- ; byrRegs -[a7 t6]
+ ; byrRegs -[t6]
sext.w a0, s2
bge zero, a0, G_M38309_IG07
;; size=8 bbWeight=0.25 PerfScore 1.00
@@ -255,27 +256,30 @@ G_M38309_IG09: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=180200 {s1 s3 s
lw a2, 0xD1FFAB1E(t6)
; byrRegs -[a2]
zext.w a2, a2
- mv a4, s4
- ; byrRegs +[a4]
- add t6, a4, a3
- lw a4, 0xD1FFAB1E(t6)
- ; byrRegs -[a4]
- zext.w a4, a4
- sub a2, a2, a4
+ mv a3, s4
+ ; byrRegs +[a3]
+ slli.uw a4, a0, 2
+ add t6, a3, a4
+ lw a3, 0xD1FFAB1E(t6)
+ ; byrRegs -[a3]
+ zext.w a3, a3
+ sub a2, a2, a3
sub a2, a2, a1
srli a1, a2, 32
andi a1, a1, 1
- mv a4, s3
- ; byrRegs +[a4]
- add t6, a4, a3
+ mv a3, s3
+ ; byrRegs +[a3]
+ slli.uw a4, a0, 2
+ add t6, a3, a4
sw a2, 0xD1FFAB1E(t6)
addiw a0, a0, 0xD1FFAB1E
sext.w a2, a0
sext.w a3, s2
+ ; byrRegs -[a3]
blt a2, a3, G_M38309_IG09
- ;; size=92 bbWeight=4 PerfScore 98.00
+ ;; size=100 bbWeight=4 PerfScore 102.00
G_M38309_IG10: ; bbWeight=0.25, gcrefRegs=0000 {}, byrefRegs=80200 {s1 s3}, byref, isz
- ; byrRegs -[a4 s4 t6]
+ ; byrRegs -[s4 t6]
sext.w a0, s2
bge zero, a0, G_M38309_IG12
;; size=8 bbWeight=0.25 PerfScore 1.00
@@ -342,7 +346,7 @@ G_M38309_IG18: ; bbWeight=0, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
ebreak
;; size=12 bbWeight=0 PerfScore 0.00
-; Total bytes of code 644, prolog size 40, PerfScore 442.00, instruction count 157, allocated bytes for code 644 (MethodHash=daac6a5a) for method System.Number+BigInteger:HeuristicDivide(byref,byref):uint (FullOpts)
+; Total bytes of code 664, prolog size 40, PerfScore 450.25, instruction count 162, allocated bytes for code 664 (MethodHash=daac6a5a) for method System.Number+BigInteger:HeuristicDivide(byref,byref):uint (FullOpts)
; ============================================================
Unwind Info:
@@ -353,7 +357,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 322 (0x00142) Actual length = 644 (0x000284)
+ Function Length : 332 (0x0014c) Actual length = 664 (0x000298)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)+4 (+1.44%) : 1776.dasm - System.Number+BigInteger:Multiply10():this (FullOpts)@@ -8,10 +8,10 @@
; 0 inlinees with PGO data; 15 single block inlinees; 4 inlinees without PGO data
; Final local variable assignments
;
-; V00 this [V00,T05] ( 6, 8 ) byref -> s1 this single-def
-; V01 loc0 [V01,T00] ( 8, 21.50) int -> a1
-; V02 loc1 [V02,T09] ( 4, 5.50) int -> a0
-; V03 loc2 [V03,T06] ( 5, 9.50) long -> a2
+; V00 this [V00,T04] ( 6, 8 ) byref -> s1 this single-def
+; V01 loc0 [V01,T00] ( 9, 25.50) int -> a1
+; V02 loc1 [V02,T08] ( 4, 5.50) int -> a0
+; V03 loc2 [V03,T05] ( 5, 9.50) long -> a2
; V04 loc3 [V04,T02] ( 3, 12 ) long -> a4
; V05 loc4 [V05,T03] ( 3, 12 ) long -> a4
;* V06 loc5 [V06 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
@@ -32,15 +32,14 @@
;* V21 tmp12 [V21 ] ( 0, 0 ) int -> zero-ref "field V07._length (fldOffset=0x8)" P-INDEP
;* V22 tmp13 [V22 ] ( 0, 0 ) byref -> zero-ref single-def "field V08._reference (fldOffset=0x0)" P-INDEP
;* V23 tmp14 [V23 ] ( 0, 0 ) int -> zero-ref "field V08._length (fldOffset=0x8)" P-INDEP
-; V24 tmp15 [V24,T07] ( 2, 8 ) byref -> a4 "field V11._reference (fldOffset=0x0)" P-INDEP
+; V24 tmp15 [V24,T06] ( 2, 8 ) byref -> a4 "field V11._reference (fldOffset=0x0)" P-INDEP
;* V25 tmp16 [V25 ] ( 0, 0 ) int -> zero-ref "field V11._length (fldOffset=0x8)" P-INDEP
-; V26 tmp17 [V26,T08] ( 2, 8 ) byref -> a6 "field V13._reference (fldOffset=0x0)" P-INDEP
+; V26 tmp17 [V26,T07] ( 2, 8 ) byref -> a5 "field V13._reference (fldOffset=0x0)" P-INDEP
;* V27 tmp18 [V27 ] ( 0, 0 ) int -> zero-ref "field V13._length (fldOffset=0x8)" P-INDEP
-; V28 tmp19 [V28,T11] ( 2, 1 ) byref -> a3 single-def "field V17._reference (fldOffset=0x0)" P-INDEP
+; V28 tmp19 [V28,T10] ( 2, 1 ) byref -> a3 single-def "field V17._reference (fldOffset=0x0)" P-INDEP
;* V29 tmp20 [V29 ] ( 0, 0 ) int -> zero-ref "field V17._length (fldOffset=0x8)" P-INDEP
-; V30 cse0 [V30,T04] ( 3, 12 ) long -> a5 "CSE #04: aggressive"
-; V31 cse1 [V31,T01] ( 4, 12.50) byref -> a3 "CSE #02: aggressive"
-; V32 cse2 [V32,T10] ( 3, 2.50) int -> a0 "CSE #01: aggressive"
+; V30 cse0 [V30,T01] ( 4, 12.50) byref -> a3 "CSE #02: aggressive"
+; V31 cse1 [V31,T09] ( 3, 2.50) int -> a0 "CSE #01: aggressive"
;
; Lcl frame size = 8
Frame info. #outsz=0; #framesz=32; lcl=8
@@ -78,21 +77,23 @@ G_M24569_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0200 {s1}, byre
lw a4, 0xD1FFAB1E(t6)
; byrRegs -[a4]
zext.w a4, a4
- slli a6, a4, 1
- sh3add a4, a4, a6
+ slli a5, a4, 1
+ sh3add a4, a4, a5
add a4, a4, a2
srli a2, a4, 32
- mv a6, a3
- ; byrRegs +[a6]
- add t6, a6, a5
+ mv a5, a3
+ ; byrRegs +[a5]
+ slli.uw a6, a1, 2
+ add t6, a5, a6
sw a4, 0xD1FFAB1E(t6)
addiw a1, a1, 0xD1FFAB1E
sext.w a4, a1
sext.w a5, a0
+ ; byrRegs -[a5]
blt a4, a5, G_M24569_IG04
- ;; size=82 bbWeight=4 PerfScore 86.00
+ ;; size=86 bbWeight=4 PerfScore 88.00
G_M24569_IG05: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=2200 {s1 a3}, byref, isz
- ; byrRegs -[a6 t6]
+ ; byrRegs -[t6]
beqz a2, G_M24569_IG07
sext.w a4, a0
addi a5, zero, 0xD1FFAB1E
@@ -143,7 +144,7 @@ G_M24569_IG08: ; bbWeight=0, gcVars=0000000000000000 {}, gcrefRegs=0000 {
ebreak
;; size=12 bbWeight=0 PerfScore 0.00
-; Total bytes of code 278, prolog size 24, PerfScore 138.50, instruction count 59, allocated bytes for code 278 (MethodHash=90daa006) for method System.Number+BigInteger:Multiply10():this (FullOpts)
+; Total bytes of code 282, prolog size 24, PerfScore 140.50, instruction count 60, allocated bytes for code 282 (MethodHash=90daa006) for method System.Number+BigInteger:Multiply10():this (FullOpts)
; ============================================================
Unwind Info:
@@ -154,7 +155,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 139 (0x0008b) Actual length = 278 (0x000116)
+ Function Length : 141 (0x0008d) Actual length = 282 (0x00011a)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)+4 (+0.83%) : 1773.dasm - System.Number+BigInteger:Multiply(byref,uint,byref) (FullOpts)@@ -8,26 +8,26 @@
; 0 inlinees with PGO data; 23 single block inlinees; 8 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T04] ( 6, 8 ) byref -> a0 single-def
-; V01 arg1 [V01,T08] ( 6, 4 ) int -> a1 single-def
+; V00 arg0 [V00,T03] ( 6, 8 ) byref -> a0 single-def
+; V01 arg1 [V01,T07] ( 6, 4 ) int -> a1 single-def
; V02 arg2 [V02,T01] ( 14, 15 ) byref -> s1 single-def
-; V03 loc0 [V03,T09] ( 5, 6 ) int -> s2
-; V04 loc1 [V04,T00] ( 8, 21.50) int -> a2
-; V05 loc2 [V05,T05] ( 5, 9.50) int -> a3
-; V06 loc3 [V06,T14] ( 3, 1.50) int -> a0
+; V03 loc0 [V03,T08] ( 5, 6 ) int -> s2
+; V04 loc1 [V04,T00] ( 9, 25.50) int -> a2
+; V05 loc2 [V05,T04] ( 5, 9.50) int -> a3
+; V06 loc3 [V06,T13] ( 3, 1.50) int -> a0
; V07 loc4 [V07,T02] ( 3, 12 ) long -> a1
;* V08 loc5 [V08 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V09 loc6 [V09 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V10 loc7 [V10 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;# V11 OutArgs [V11 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
-; V12 tmp1 [V12,T15] ( 3, 1.50) int -> a2 "Inline return value spill temp"
+; V12 tmp1 [V12,T14] ( 3, 1.50) int -> a2 "Inline return value spill temp"
;* V13 tmp2 [V13 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
-; V14 tmp3 [V14,T11] ( 4, 4 ) long -> a0 "Inlining Arg"
-; V15 tmp4 [V15,T13] ( 3, 3 ) int -> a0 "Inlining Arg"
+; V14 tmp3 [V14,T10] ( 4, 4 ) long -> a0 "Inlining Arg"
+; V15 tmp4 [V15,T12] ( 3, 3 ) int -> a0 "Inlining Arg"
;* V16 tmp5 [V16 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V17 tmp6 [V17 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V18 tmp7 [V18 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
-; V19 tmp8 [V19,T16] ( 3, 1.50) int -> a2 "Inline stloc first use temp"
+; V19 tmp8 [V19,T15] ( 3, 1.50) int -> a2 "Inline stloc first use temp"
;* V20 tmp9 [V20 ] ( 0, 0 ) byref -> zero-ref "impAppendStmt"
;* V21 tmp10 [V21 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V22 tmp11 [V22 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
@@ -46,16 +46,15 @@
;* V35 tmp24 [V35 ] ( 0, 0 ) int -> zero-ref "field V09._length (fldOffset=0x8)" P-INDEP
;* V36 tmp25 [V36 ] ( 0, 0 ) byref -> zero-ref single-def "field V10._reference (fldOffset=0x0)" P-INDEP
;* V37 tmp26 [V37 ] ( 0, 0 ) int -> zero-ref "field V10._length (fldOffset=0x8)" P-INDEP
-; V38 tmp27 [V38,T06] ( 2, 8 ) byref -> a1 "field V25._reference (fldOffset=0x0)" P-INDEP
+; V38 tmp27 [V38,T05] ( 2, 8 ) byref -> a1 "field V25._reference (fldOffset=0x0)" P-INDEP
;* V39 tmp28 [V39 ] ( 0, 0 ) int -> zero-ref "field V25._length (fldOffset=0x8)" P-INDEP
-; V40 tmp29 [V40,T07] ( 2, 8 ) byref -> a3 "field V27._reference (fldOffset=0x0)" P-INDEP
+; V40 tmp29 [V40,T06] ( 2, 8 ) byref -> a3 "field V27._reference (fldOffset=0x0)" P-INDEP
;* V41 tmp30 [V41 ] ( 0, 0 ) int -> zero-ref "field V27._length (fldOffset=0x8)" P-INDEP
-; V42 tmp31 [V42,T18] ( 2, 1 ) byref -> a0 single-def "field V31._reference (fldOffset=0x0)" P-INDEP
+; V42 tmp31 [V42,T17] ( 2, 1 ) byref -> a0 single-def "field V31._reference (fldOffset=0x0)" P-INDEP
;* V43 tmp32 [V43 ] ( 0, 0 ) int -> zero-ref "field V31._length (fldOffset=0x8)" P-INDEP
-; V44 cse0 [V44,T03] ( 3, 12 ) long -> a4 "CSE #07: aggressive"
-; V45 cse1 [V45,T12] ( 5, 3.50) int -> s2 "CSE #01: moderate"
-; V46 cse2 [V46,T17] ( 3, 1.50) long -> a1 "CSE #02: moderate"
-; V47 cse3 [V47,T10] ( 4, 5.50) long -> s3 hoist multi-def "CSE #03: aggressive"
+; V44 cse0 [V44,T11] ( 5, 3.50) int -> s2 "CSE #01: moderate"
+; V45 cse1 [V45,T16] ( 3, 1.50) long -> a1 "CSE #02: moderate"
+; V46 cse2 [V46,T09] ( 4, 5.50) long -> s3 hoist multi-def "CSE #03: aggressive"
;
; Lcl frame size = 8
Frame info. #outsz=0; #framesz=48; lcl=8
@@ -105,6 +104,7 @@ G_M6434_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0600 {s1 a0}, by
lb zero, 0xD1FFAB1E(s1)
addi a3, s1, 0xD1FFAB1E
; byrRegs +[a3]
+ slli.uw a4, a2, 2
add t6, a3, a4
sw a1, 0xD1FFAB1E(t6)
srli a1, a1, 32
@@ -114,7 +114,7 @@ G_M6434_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0600 {s1 a0}, by
sext.w a1, a2
sext.w a4, s2
blt a1, a4, G_M6434_IG04
- ;; size=86 bbWeight=4 PerfScore 104.00
+ ;; size=90 bbWeight=4 PerfScore 106.00
G_M6434_IG05: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0200 {s1}, byref, isz
; byrRegs -[a0 t6]
sext.w a0, s2
@@ -232,7 +232,7 @@ G_M6434_IG15: ; bbWeight=0, gcVars=0000000000000000 {}, gcrefRegs=0000 {}
ebreak
;; size=12 bbWeight=0 PerfScore 0.00
-; Total bytes of code 482, prolog size 32, PerfScore 205.00, instruction count 106, allocated bytes for code 482 (MethodHash=71b0e6dd) for method System.Number+BigInteger:Multiply(byref,uint,byref) (FullOpts)
+; Total bytes of code 486, prolog size 32, PerfScore 207.00, instruction count 107, allocated bytes for code 486 (MethodHash=71b0e6dd) for method System.Number+BigInteger:Multiply(byref,uint,byref) (FullOpts)
; ============================================================
Unwind Info:
@@ -243,7 +243,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 241 (0x000f1) Actual length = 482 (0x0001e2)
+ Function Length : 243 (0x000f3) Actual length = 486 (0x0001e6)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)JIT.opt.mch-24 (-7.41%) : 21252.dasm - Runtime_61040_2:Problem(StructWithHoles,StructWithHoles,int[]):int (FullOpts)@@ -9,50 +9,47 @@
;
;* V00 arg0 [V00 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SA] multireg-arg single-def <StructWithHoles>
;* V01 arg1 [V01 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SA] multireg-arg single-def <StructWithHoles>
-; V02 arg2 [V02,T01] ( 4, 11 ) ref -> s1 class-hnd single-def <int[]>
+; V02 arg2 [V02,T02] ( 4, 11 ) ref -> s1 class-hnd single-def <int[]>
;* V03 loc0 [V03 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SF] ld-addr-op <StructWithHoles>
;* V04 loc1 [V04 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[S] <StructWithHoles>
-; V05 loc2 [V05,T08] ( 2, 0 ) int -> [fp-0x04] EH-live single-def
+; V05 loc2 [V05,T07] ( 2, 0 ) int -> [fp-0x04] EH-live single-def
;# V06 OutArgs [V06 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
;* V07 tmp1 [V07 ] ( 0, 0 ) ref -> zero-ref class-hnd "impSpillSpecialSideEff" <<unknown class>>
-; V08 tmp2 [V08,T00] ( 2, 16 ) int -> a0 "V03.[000..004)"
+; V08 tmp2 [V08,T01] ( 2, 16 ) int -> a0 "V03.[000..004)"
;* V09 tmp3 [V09 ] ( 0, 0 ) int -> zero-ref single-def "V00.[000..004)"
-; V10 tmp4 [V10,T02] ( 4, 11 ) int -> s2 single-def "V04.[000..004)"
-; V11 tmp5 [V11,T07] ( 2, 2 ) int -> s2 single-def "V01.[000..004)"
-; V12 cse0 [V12,T03] ( 2, 9 ) long -> s4 hoist "CSE #03: aggressive"
-; V13 cse1 [V13,T04] ( 2, 9 ) int -> s3 hoist "CSE #01: aggressive"
-; V14 cse2 [V14,T05] ( 2, 9 ) int -> s5 hoist "CSE #04: aggressive"
-; V15 rat0 [V15,T06] ( 3, 3 ) long -> a2 "V01.a2"
+; V10 tmp4 [V10,T00] ( 4, 18 ) int -> s2 single-def "V04.[000..004)"
+; V11 tmp5 [V11,T06] ( 2, 2 ) int -> s2 single-def "V01.[000..004)"
+; V12 cse0 [V12,T03] ( 2, 9 ) int -> s3 hoist "CSE #01: aggressive"
+; V13 cse1 [V13,T04] ( 2, 9 ) int -> s4 hoist "CSE #02: aggressive"
+; V14 rat0 [V14,T05] ( 3, 3 ) long -> a2 "V01.a2"
;
-; Lcl frame size = 8
-Frame info. #outsz=0; #framesz=64; lcl=8
+; Lcl frame size = 16
+Frame info. #outsz=0; #framesz=64; lcl=16
G_M52587_IG01: ; bbWeight=1, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref, nogc <-- Prolog IG
addi sp, sp, -64
- sd fp, 8(sp)
- sd ra, 16(sp)
- sd s1, 24(sp)
- sd s2, 32(sp)
- sd s3, 40(sp)
- sd s4, 48(sp)
- sd s5, 56(sp)
- addi fp, sp, 8
+ sd fp, 16(sp)
+ sd ra, 24(sp)
+ sd s1, 32(sp)
+ sd s2, 40(sp)
+ sd s3, 48(sp)
+ sd s4, 56(sp)
+ addi fp, sp, 16
mv s1, a4
; gcrRegs +[s1]
- ;; size=40 bbWeight=1 PerfScore 29.50
+ ;; size=36 bbWeight=1 PerfScore 25.50
G_M52587_IG02: ; bbWeight=1, gcrefRegs=0200 {s1}, byrefRegs=0000 {}, byref
sext.w s2, a2
;; size=4 bbWeight=1 PerfScore 0.50
G_M52587_IG03: ; bbWeight=1, gcrefRegs=0200 {s1}, byrefRegs=0000 {}, byref
lw s3, 0xD1FFAB1E(s1)
- slli.uw s4, s2, 2
- addiw s5, s2, 0xD1FFAB1E
- ;; size=12 bbWeight=1 PerfScore 3.00
+ addiw s4, s2, 0xD1FFAB1E
+ ;; size=8 bbWeight=1 PerfScore 2.50
G_M52587_IG04: ; bbWeight=8, gcrefRegs=0200 {s1}, byrefRegs=0000 {}, byref, isz
sext.w a0, s3
sext.w a1, s2
bgeu a1, a0, G_M52587_IG05
- add a0, s1, s4
+ sh2add.uw a0, s2, s1
; byrRegs +[a0]
lw a0, 0xD1FFAB1E(a0)
; byrRegs -[a0]
@@ -64,7 +61,7 @@ G_M52587_IG04: ; bbWeight=8, gcrefRegs=0200 {s1}, byrefRegs=0000 {}, byre
ld a1, 0xD1FFAB1E(t6)
jalr a1 // <unknown method>
; gcr arg pop 0
- sext.w a0, s5
+ sext.w a0, s4
sext.w a0, a0
addi a1, zero, 0xD1FFAB1E
blt a0, a1, G_M52587_IG04
@@ -81,28 +78,26 @@ G_M52587_IG06: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
addi a0, zero, 0xD1FFAB1E
;; size=4 bbWeight=1 PerfScore 0.50
G_M52587_IG07: ; bbWeight=1, epilog, nogc, extend
- ld s5, 56(sp)
- ld s4, 48(sp)
- ld s3, 40(sp)
- ld s2, 32(sp)
- ld s1, 24(sp)
- ld ra, 16(sp)
- ld fp, 8(sp)
+ ld s4, 56(sp)
+ ld s3, 48(sp)
+ ld s2, 40(sp)
+ ld s1, 32(sp)
+ ld ra, 24(sp)
+ ld fp, 16(sp)
addi sp, sp, 64
- ret ;; size=36 bbWeight=1 PerfScore 17.50
+ ret ;; size=32 bbWeight=1 PerfScore 15.50
G_M52587_IG08: ; bbWeight=0, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
lw a0, -4(fp)
;; size=4 bbWeight=0 PerfScore 0.00
G_M52587_IG09: ; bbWeight=0, epilog, nogc, extend
- ld s5, 56(sp)
- ld s4, 48(sp)
- ld s3, 40(sp)
- ld s2, 32(sp)
- ld s1, 24(sp)
- ld ra, 16(sp)
- ld fp, 8(sp)
+ ld s4, 56(sp)
+ ld s3, 48(sp)
+ ld s2, 40(sp)
+ ld s1, 32(sp)
+ ld ra, 24(sp)
+ ld fp, 16(sp)
addi sp, sp, 64
- ret ;; size=36 bbWeight=0 PerfScore 0.00
+ ret ;; size=32 bbWeight=0 PerfScore 0.00
G_M52587_IG10: ; bbWeight=0, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, funclet prolog, nogc
addi sp, sp, -64
sd fp, 0(sp)
@@ -111,8 +106,7 @@ G_M52587_IG10: ; bbWeight=0, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
sd s2, 24(sp)
sd s3, 32(sp)
sd s4, 40(sp)
- sd s5, 48(sp)
- ;; size=32 bbWeight=0 PerfScore 0.00
+ ;; size=28 bbWeight=0 PerfScore 0.00
G_M52587_IG11: ; bbWeight=0, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
lui t6, 0xD1FFAB1E
addiw t6, t6, 0xD1FFAB1E
@@ -126,7 +120,6 @@ G_M52587_IG11: ; bbWeight=0, gcVars=0000000000000000 {}, gcrefRegs=0000 {
addi a0, a0, 0xD1FFAB1E
;; size=40 bbWeight=0 PerfScore 0.00
G_M52587_IG12: ; bbWeight=0, funclet epilog, nogc, extend
- ld s5, 48(sp)
ld s4, 40(sp)
ld s3, 32(sp)
ld s2, 24(sp)
@@ -134,20 +127,20 @@ G_M52587_IG12: ; bbWeight=0, funclet epilog, nogc, extend
ld ra, 8(sp)
ld fp, 0(sp)
addi sp, sp, 64
- ret ;; size=36 bbWeight=0 PerfScore 0.00
+ ret ;; size=32 bbWeight=0 PerfScore 0.00
-; Total bytes of code 324, prolog size 40, PerfScore 239.00, instruction count 71, allocated bytes for code 324 (MethodHash=f6ef3294) for method Runtime_61040_2:Problem(StructWithHoles,StructWithHoles,int[]):int (FullOpts)
+; Total bytes of code 300, prolog size 36, PerfScore 232.50, instruction count 65, allocated bytes for code 300 (MethodHash=f6ef3294) for method Runtime_61040_2:Problem(StructWithHoles,StructWithHoles,int[]):int (FullOpts)
; ============================================================
Unwind Info:
>> Start offset : 0x000000 (not in unwind data)
>> End offset : 0xd1ffab1e (not in unwind data)
- Code Words : 7
+ Code Words : 6
Epilog Count : 2
E bit : 0
X bit : 0
Vers : 0
- Function Length : 108 (0x0006c) Actual length = 216 (0x0000d8)
+ Function Length : 100 (0x00064) Actual length = 200 (0x0000c8)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)
@@ -156,33 +149,30 @@ Unwind Info:
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)
Epilog Start Index : 3 (0x03)
---- Unwind codes ----
- E2 00 01 add_fp 1 (0x01); addi fp, sp, #8
+ E2 00 02 add_fp 2 (0x02); addi fp, sp, #16
---- Epilog start at index 3 ----
- D0 14 07 save_reg X#20 Z#7 (0x07); sd s5, sp, 56
- D0 13 06 save_reg X#19 Z#6 (0x06); sd s4, sp, 48
- D0 12 05 save_reg X#18 Z#5 (0x05); sd s3, sp, 40
- D0 11 04 save_reg X#17 Z#4 (0x04); sd s2, sp, 32
- D0 08 03 save_reg X#8 Z#3 (0x03); sd s1, sp, 24
- D0 00 02 save_reg X#0 Z#2 (0x02); sd ra, sp, 16
- D0 07 01 save_reg X#7 Z#1 (0x01); sd fp, sp, 8
+ D0 13 07 save_reg X#19 Z#7 (0x07); sd s4, sp, 56
+ D0 12 06 save_reg X#18 Z#6 (0x06); sd s3, sp, 48
+ D0 11 05 save_reg X#17 Z#5 (0x05); sd s2, sp, 40
+ D0 08 04 save_reg X#8 Z#4 (0x04); sd s1, sp, 32
+ D0 00 03 save_reg X#0 Z#3 (0x03); sd ra, sp, 24
+ D0 07 02 save_reg X#7 Z#2 (0x02); sd fp, sp, 16
04 alloc_s #4 (0x04); addi sp, sp, -64 (0x040)
E4 end
E4 end
- E4 end
Unwind Info:
>> Start offset : 0xd1ffab1e (not in unwind data)
>> End offset : 0xd1ffab1e (not in unwind data)
- Code Words : 6
+ Code Words : 5
Epilog Count : 0
E bit : 1
X bit : 0
Vers : 0
- Function Length : 54 (0x00036) Actual length = 108 (0x00006c)
+ Function Length : 50 (0x00032) Actual length = 100 (0x000064)
--- One epilog, unwind codes at 0
---- Unwind codes ----
---- Epilog start at index 0 ----
- D0 14 06 save_reg X#20 Z#6 (0x06); sd s5, sp, 48
D0 13 05 save_reg X#19 Z#5 (0x05); sd s4, sp, 40
D0 12 04 save_reg X#18 Z#4 (0x04); sd s3, sp, 32
D0 11 03 save_reg X#17 Z#3 (0x03); sd s2, sp, 24
@@ -191,7 +181,6 @@ Unwind Info:
D0 07 00 save_reg X#7 Z#0 (0x00); sd fp, sp, 0
04 alloc_s #4 (0x04); addi sp, sp, -64 (0x040)
E4 end
- E4 end
*************** EH table for Runtime_61040_2:Problem(StructWithHoles,StructWithHoles,int[]):int
1 EH table entries-16 (-4.12%) : 20676.dasm - System.RuntimeTypeHandle:CopyRuntimeTypeHandles(System.Type[],byref):nint[] (FullOpts)@@ -8,41 +8,39 @@
; 0 inlinees with PGO data; 0 single block inlinees; 1 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T05] ( 6, 7.50) ref -> s1 class-hnd single-def <System.Type[]>
-; V01 arg1 [V01,T08] ( 4, 3 ) byref -> s2 single-def
-; V02 loc0 [V02,T06] ( 7, 6.04) ref -> s4 class-hnd exact single-def <nint[]>
-; V03 loc1 [V03,T01] ( 11, 16.58) int -> s5
+; V00 arg0 [V00,T04] ( 6, 7.50) ref -> s1 class-hnd single-def <System.Type[]>
+; V01 arg1 [V01,T07] ( 4, 3 ) byref -> s2 single-def
+; V02 loc0 [V02,T05] ( 7, 6.04) ref -> s4 class-hnd exact single-def <nint[]>
+; V03 loc1 [V03,T01] ( 12, 20.54) int -> s5
;* V04 loc2 [V04 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op <System.RuntimeTypeHandle>
;# V05 OutArgs [V05 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
;* V06 tmp1 [V06 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewArr temp" <nint[]>
-; V07 tmp2 [V07,T02] ( 6, 16 ) long -> s7 "Strict ordering of exceptions for Array store"
+; V07 tmp2 [V07,T02] ( 6, 16 ) long -> s6 "Strict ordering of exceptions for Array store"
;* V08 tmp3 [V08 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "dup spill" <System.RuntimeType>
;* V09 tmp4 [V09 ] ( 0, 0 ) ref -> zero-ref
-; V10 tmp5 [V10,T04] ( 6, 10 ) ref -> a0 "field V04.m_type (fldOffset=0x0)" P-INDEP
+; V10 tmp5 [V10,T03] ( 6, 10 ) ref -> a0 "field V04.m_type (fldOffset=0x0)" P-INDEP
; V11 tmp6 [V11,T00] ( 6, 24 ) ref -> a0 "argument with side effect"
-; V12 cse0 [V12,T03] ( 3, 11.88) long -> s6 "CSE #03: aggressive"
-; V13 cse1 [V13,T07] ( 6, 6 ) int -> s3 "CSE #01: aggressive"
+; V12 cse0 [V12,T06] ( 6, 6 ) int -> s3 "CSE #01: aggressive"
;
-; Lcl frame size = 8
-Frame info. #outsz=0; #framesz=80; lcl=8
+; Lcl frame size = 0
+Frame info. #outsz=0; #framesz=64; lcl=0
G_M5038_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- addi sp, sp, -80
- sd fp, 8(sp)
- sd ra, 16(sp)
- sd s1, 24(sp)
- sd s2, 32(sp)
- sd s3, 40(sp)
- sd s4, 48(sp)
- sd s5, 56(sp)
- sd s6, 64(sp)
- sd s7, 72(sp)
- addi fp, sp, 8
+ addi sp, sp, -64
+ sd fp, 0(sp)
+ sd ra, 8(sp)
+ sd s1, 16(sp)
+ sd s2, 24(sp)
+ sd s3, 32(sp)
+ sd s4, 40(sp)
+ sd s5, 48(sp)
+ sd s6, 56(sp)
+ mv fp, sp
mv s1, a0
; gcrRegs +[s1]
mv s2, a1
; byrRegs +[s2]
- ;; size=52 bbWeight=1 PerfScore 38.00
+ ;; size=48 bbWeight=1 PerfScore 34.00
G_M5038_IG02: ; bbWeight=1, gcrefRegs=0200 {s1}, byrefRegs=40000 {s2}, byref, isz
beqz s1, G_M5038_IG14
;; size=4 bbWeight=1 PerfScore 3.50
@@ -68,8 +66,7 @@ G_M5038_IG03: ; bbWeight=0.50, gcrefRegs=0200 {s1}, byrefRegs=40000 {s2},
blt a0, a1, G_M5038_IG12
;; size=64 bbWeight=0.50 PerfScore 11.00
G_M5038_IG04: ; bbWeight=3.96, gcrefRegs=100200 {s1 s4}, byrefRegs=40000 {s2}, byref, isz
- slli.uw s6, s5, 3
- add a0, s1, s6
+ sh3add.uw a0, s5, s1
; byrRegs +[a0]
ld a0, 0xD1FFAB1E(a0)
; gcrRegs +[a0]
@@ -79,19 +76,19 @@ G_M5038_IG04: ; bbWeight=3.96, gcrefRegs=100200 {s1 s4}, byrefRegs=40000
ld a1, 0xD1FFAB1E(a1)
jalr a1 // <unknown method>
beqz a0, G_M5038_IG06
- ;; size=32 bbWeight=3.96 PerfScore 61.38
+ ;; size=28 bbWeight=3.96 PerfScore 59.40
G_M5038_IG05: ; bbWeight=1.98, gcrefRegs=100600 {s1 a0 s4}, byrefRegs=40000 {s2}, byref, isz
- ld s7, 0xD1FFAB1E(a0)
+ ld s6, 0xD1FFAB1E(a0)
j G_M5038_IG07
;; size=8 bbWeight=1.98 PerfScore 6.93
G_M5038_IG06: ; bbWeight=1.98, gcrefRegs=100200 {s1 s4}, byrefRegs=40000 {s2}, byref
; gcrRegs -[a0]
- mv s7, zero
+ mv s6, zero
;; size=4 bbWeight=1.98 PerfScore 0.99
G_M5038_IG07: ; bbWeight=3.96, gcrefRegs=100200 {s1 s4}, byrefRegs=40000 {s2}, byref, isz
- add a0, s4, s6
+ sh3add.uw a0, s5, s4
; byrRegs +[a0]
- sd s7, 0xD1FFAB1E(a0)
+ sd s6, 0xD1FFAB1E(a0)
addiw s5, s5, 0xD1FFAB1E
sext.w a0, s3
; byrRegs -[a0]
@@ -106,20 +103,19 @@ G_M5038_IG08: ; bbWeight=0.50, gcrefRegs=100000 {s4}, byrefRegs=40000 {s2
; gcrRegs +[a0]
;; size=12 bbWeight=0.50 PerfScore 3.25
G_M5038_IG09: ; bbWeight=0.50, epilog, nogc, extend
- ld s7, 72(sp)
- ld s6, 64(sp)
- ld s5, 56(sp)
- ld s4, 48(sp)
- ld s3, 40(sp)
- ld s2, 32(sp)
- ld s1, 24(sp)
- ld ra, 16(sp)
- ld fp, 8(sp)
- addi sp, sp, 80
- ret ;; size=44 bbWeight=0.50 PerfScore 10.75
+ ld s6, 56(sp)
+ ld s5, 48(sp)
+ ld s4, 40(sp)
+ ld s3, 32(sp)
+ ld s2, 24(sp)
+ ld s1, 16(sp)
+ ld ra, 8(sp)
+ ld fp, 0(sp)
+ addi sp, sp, 64
+ ret ;; size=40 bbWeight=0.50 PerfScore 9.75
G_M5038_IG10: ; bbWeight=0.02, gcVars=0000000000000000 {}, gcrefRegs=100200 {s1 s4}, byrefRegs=40000 {s2}, gcvars, byref
; gcrRegs -[a0] +[s1]
- mv s7, zero
+ mv s6, zero
;; size=4 bbWeight=0.02 PerfScore 0.01
G_M5038_IG11: ; bbWeight=0.04, gcrefRegs=100200 {s1 s4}, byrefRegs=40000 {s2}, byref, isz
lw a0, 0xD1FFAB1E(s4)
@@ -128,7 +124,7 @@ G_M5038_IG11: ; bbWeight=0.04, gcrefRegs=100200 {s1 s4}, byrefRegs=40000
bgeu a2, a1, G_M5038_IG16
sh3add.uw a0, s5, s4
; byrRegs +[a0]
- sd s7, 0xD1FFAB1E(a0)
+ sd s6, 0xD1FFAB1E(a0)
addiw s5, s5, 0xD1FFAB1E
sext.w a0, s3
; byrRegs -[a0]
@@ -148,7 +144,7 @@ G_M5038_IG12: ; bbWeight=0.04, gcrefRegs=100200 {s1 s4}, byrefRegs=40000
beqz a0, G_M5038_IG10
;; size=28 bbWeight=0.04 PerfScore 0.60
G_M5038_IG13: ; bbWeight=0.02, gcrefRegs=100600 {s1 a0 s4}, byrefRegs=40000 {s2}, byref, isz
- ld s7, 0xD1FFAB1E(a0)
+ ld s6, 0xD1FFAB1E(a0)
j G_M5038_IG11
;; size=8 bbWeight=0.02 PerfScore 0.07
G_M5038_IG14: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=40000 {s2}, byref
@@ -157,17 +153,16 @@ G_M5038_IG14: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=40000 {s2}, b
mv a0, zero
;; size=8 bbWeight=0.50 PerfScore 2.25
G_M5038_IG15: ; bbWeight=0.50, epilog, nogc, extend
- ld s7, 72(sp)
- ld s6, 64(sp)
- ld s5, 56(sp)
- ld s4, 48(sp)
- ld s3, 40(sp)
- ld s2, 32(sp)
- ld s1, 24(sp)
- ld ra, 16(sp)
- ld fp, 8(sp)
- addi sp, sp, 80
- ret ;; size=44 bbWeight=0.50 PerfScore 10.75
+ ld s6, 56(sp)
+ ld s5, 48(sp)
+ ld s4, 40(sp)
+ ld s3, 32(sp)
+ ld s2, 24(sp)
+ ld s1, 16(sp)
+ ld ra, 8(sp)
+ ld fp, 0(sp)
+ addi sp, sp, 64
+ ret ;; size=40 bbWeight=0.50 PerfScore 9.75
G_M5038_IG16: ; bbWeight=0, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
; byrRegs -[s2]
auipc ra, 0xD1FFAB1E
@@ -175,37 +170,37 @@ G_M5038_IG16: ; bbWeight=0, gcVars=0000000000000000 {}, gcrefRegs=0000 {}
ebreak
;; size=12 bbWeight=0 PerfScore 0.00
-; Total bytes of code 388, prolog size 44, PerfScore 187.74, instruction count 92, allocated bytes for code 388 (MethodHash=fc39ec51) for method System.RuntimeTypeHandle:CopyRuntimeTypeHandles(System.Type[],byref):nint[] (FullOpts)
+; Total bytes of code 372, prolog size 40, PerfScore 179.76, instruction count 88, allocated bytes for code 372 (MethodHash=fc39ec51) for method System.RuntimeTypeHandle:CopyRuntimeTypeHandles(System.Type[],byref):nint[] (FullOpts)
; ============================================================
Unwind Info:
>> Start offset : 0x000000 (not in unwind data)
>> End offset : 0xd1ffab1e (not in unwind data)
- Code Words : 8
+ Code Words : 7
Epilog Count : 2
E bit : 0
X bit : 0
Vers : 0
- Function Length : 194 (0x000c2) Actual length = 388 (0x000184)
+ Function Length : 186 (0x000ba) Actual length = 372 (0x000174)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)
- Epilog Start Index : 3 (0x03)
+ Epilog Start Index : 1 (0x01)
---- Scope 1
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)
- Epilog Start Index : 3 (0x03)
+ Epilog Start Index : 1 (0x01)
---- Unwind codes ----
- E2 00 01 add_fp 1 (0x01); addi fp, sp, #8
- ---- Epilog start at index 3 ----
- D0 16 09 save_reg X#22 Z#9 (0x09); sd s7, sp, 72
- D0 15 08 save_reg X#21 Z#8 (0x08); sd s6, sp, 64
- D0 14 07 save_reg X#20 Z#7 (0x07); sd s5, sp, 56
- D0 13 06 save_reg X#19 Z#6 (0x06); sd s4, sp, 48
- D0 12 05 save_reg X#18 Z#5 (0x05); sd s3, sp, 40
- D0 11 04 save_reg X#17 Z#4 (0x04); sd s2, sp, 32
- D0 08 03 save_reg X#8 Z#3 (0x03); sd s1, sp, 24
- D0 00 02 save_reg X#0 Z#2 (0x02); sd ra, sp, 16
- D0 07 01 save_reg X#7 Z#1 (0x01); sd fp, sp, 8
- 05 alloc_s #5 (0x05); addi sp, sp, -80 (0x050)
+ E1 set_fp; move fp, sp
+ ---- Epilog start at index 1 ----
+ D0 15 07 save_reg X#21 Z#7 (0x07); sd s6, sp, 56
+ D0 14 06 save_reg X#20 Z#6 (0x06); sd s5, sp, 48
+ D0 13 05 save_reg X#19 Z#5 (0x05); sd s4, sp, 40
+ D0 12 04 save_reg X#18 Z#4 (0x04); sd s3, sp, 32
+ D0 11 03 save_reg X#17 Z#3 (0x03); sd s2, sp, 24
+ D0 08 02 save_reg X#8 Z#2 (0x02); sd s1, sp, 16
+ D0 00 01 save_reg X#0 Z#1 (0x01); sd ra, sp, 8
+ D0 07 00 save_reg X#7 Z#0 (0x00); sd fp, sp, 0
+ 04 alloc_s #4 (0x04); addi sp, sp, -64 (0x040)
+ E4 end
E4 end
-12 (-3.45%) : 799.dasm - System.Text.Ascii:ChangeCase[ushort,ushort,System.Text.Ascii+ToLowerConversion](ptr,ptr,nuint):nuint (FullOpts)@@ -11,13 +11,13 @@
; V00 arg0 [V00,T06] ( 5, 10 ) long -> a0 single-def
; V01 arg1 [V01,T04] ( 5, 14 ) long -> a1 single-def
; V02 arg2 [V02,T03] ( 6, 16 ) long -> a2 single-def
-;* V03 loc0 [V03,T14] ( 0, 0 ) ubyte -> zero-ref
-;* V04 loc1 [V04,T15] ( 0, 0 ) ubyte -> zero-ref
-;* V05 loc2 [V05,T16] ( 0, 0 ) ubyte -> zero-ref
-;* V06 loc3 [V06,T17] ( 0, 0 ) ubyte -> zero-ref
-;* V07 loc4 [V07,T18] ( 0, 0 ) ubyte -> zero-ref
+;* V03 loc0 [V03,T11] ( 0, 0 ) ubyte -> zero-ref
+;* V04 loc1 [V04,T12] ( 0, 0 ) ubyte -> zero-ref
+;* V05 loc2 [V05,T13] ( 0, 0 ) ubyte -> zero-ref
+;* V06 loc3 [V06,T14] ( 0, 0 ) ubyte -> zero-ref
+;* V07 loc4 [V07,T15] ( 0, 0 ) ubyte -> zero-ref
;* V08 loc5 [V08 ] ( 0, 0 ) int -> zero-ref
-; V09 loc6 [V09,T00] ( 15, 47.25) long -> a3
+; V09 loc6 [V09,T00] ( 18, 59.25) long -> a3
;* V10 loc7 [V10 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V11 loc8 [V11 ] ( 0, 0 ) ushort -> zero-ref
;* V12 loc9 [V12 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ushort]>
@@ -25,26 +25,26 @@
;* V14 loc11 [V14 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V15 loc12 [V15 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V16 loc13 [V16 ] ( 0, 0 ) int -> zero-ref
-; V17 loc14 [V17,T01] ( 7, 24 ) long -> a5
+; V17 loc14 [V17,T01] ( 7, 24 ) long -> a4
;* V18 loc15 [V18 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ulong]>
;* V19 loc16 [V19 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[uint]>
-; V20 loc17 [V20,T02] ( 7, 24 ) int -> a5
+; V20 loc17 [V20,T02] ( 7, 24 ) int -> a4
;* V21 loc18 [V21 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[uint]>
;* V22 loc19 [V22 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ulong]>
;* V23 loc20 [V23 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ushort]>
-; V24 loc21 [V24,T05] ( 5, 16 ) int -> a6
+; V24 loc21 [V24,T05] ( 5, 16 ) int -> a5
;# V25 OutArgs [V25 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
;* V26 tmp1 [V26 ] ( 0, 0 ) int -> zero-ref
;* V27 tmp2 [V27 ] ( 0, 0 ) int -> zero-ref
;* V28 tmp3 [V28 ] ( 0, 0 ) int -> zero-ref
-;* V29 tmp4 [V29,T19] ( 0, 0 ) int -> zero-ref
-; V30 tmp5 [V30,T11] ( 2, 8 ) int -> a5
+;* V29 tmp4 [V29,T16] ( 0, 0 ) int -> zero-ref
+; V30 tmp5 [V30,T08] ( 2, 8 ) int -> a4
;* V31 tmp6 [V31 ] ( 0, 0 ) struct (16) zero-ref "dup spill" <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V32 tmp7 [V32 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.Runtime.Intrinsics.Vector128`1[byte]>
;* V33 tmp8 [V33 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.Runtime.Intrinsics.Vector128`1[byte]>
;* V34 tmp9 [V34 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V35 tmp10 [V35 ] ( 0, 0 ) int -> zero-ref
-; V36 tmp11 [V36,T12] ( 2, 8 ) long -> a5
+; V36 tmp11 [V36,T09] ( 2, 8 ) long -> a4
;* V37 tmp12 [V37 ] ( 0, 0 ) struct (16) zero-ref "dup spill" <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V38 tmp13 [V38 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.Runtime.Intrinsics.Vector128`1[byte]>
;* V39 tmp14 [V39 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.Runtime.Intrinsics.Vector128`1[byte]>
@@ -220,11 +220,11 @@
;* V209 tmp184 [V209 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V210 tmp185 [V210 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V211 tmp186 [V211 ] ( 0, 0 ) ushort -> zero-ref "Inlining Arg"
-; V212 tmp187 [V212,T08] ( 3, 10 ) int -> a5 ld-addr-op "Inline ldloca(s) first use temp"
+; V212 tmp187 [V212,T07] ( 3, 10 ) int -> a4 ld-addr-op "Inline ldloca(s) first use temp"
;* V213 tmp188 [V213 ] ( 0, 0 ) ubyte -> zero-ref "Inline return value spill temp"
;* V214 tmp189 [V214 ] ( 0, 0 ) ushort -> zero-ref "Inline stloc first use temp"
;* V215 tmp190 [V215 ] ( 0, 0 ) ubyte -> zero-ref "Inline return value spill temp"
-; V216 tmp191 [V216,T13] ( 2, 8 ) ushort -> a5 ld-addr-op "Inline ldloca(s) first use temp"
+; V216 tmp191 [V216,T10] ( 2, 8 ) ushort -> a4 ld-addr-op "Inline ldloca(s) first use temp"
;* V217 tmp192 [V217 ] ( 0, 0 ) ubyte -> zero-ref "Inline return value spill temp"
;* V218 tmp193 [V218 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V219 tmp194 [V219 ] ( 0, 0 ) ubyte -> zero-ref "Inline return value spill temp"
@@ -305,9 +305,6 @@
;* V294 tmp269 [V294 ] ( 0, 0 ) long -> zero-ref "field V207._lower (fldOffset=0x0)" P-INDEP
;* V295 tmp270 [V295 ] ( 0, 0 ) long -> zero-ref "field V207._upper (fldOffset=0x8)" P-INDEP
;* V296 tmp271 [V296 ] ( 0, 0 ) byref -> zero-ref "BlockOp address local"
-; V297 cse0 [V297,T09] ( 3, 8 ) long -> a4 "CSE #01: moderate"
-; V298 cse1 [V298,T10] ( 3, 8 ) long -> a4 "CSE #04: moderate"
-; V299 cse2 [V299,T07] ( 3, 12 ) long -> a4 "CSE #07: moderate"
;
; Lcl frame size = 0
Frame info. #outsz=0; #framesz=16; lcl=0
@@ -323,23 +320,23 @@ G_M31524_IG02: ; bbWeight=0.25, gcrefRegs=0000 {}, byrefRegs=0000 {}, byr
j G_M31524_IG04
;; size=8 bbWeight=0.25 PerfScore 0.50
G_M31524_IG03: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
+ auipc a5, 0xD1FFAB1E
+ ld a5, 0xD1FFAB1E(a5)
+ add a5, a4, a5
auipc a6, 0xD1FFAB1E
ld a6, 0xD1FFAB1E(a6)
- add a6, a5, a6
- auipc a7, 0xD1FFAB1E
- ld a7, 0xD1FFAB1E(a7)
- add a7, a5, a7
- xor a6, a6, a7
- lui a7, 0xD1FFAB1E
- slli a7, a7, 12
- addi a7, a7, 0xD1FFAB1E
- slli a7, a7, 13
- addi a7, a7, 0xD1FFAB1E
- and a6, a6, a7
- srli a6, a6, 2
- xor a5, a6, a5
- add t6, a1, a4
- sd a5, 0xD1FFAB1E(t6)
+ add a6, a4, a6
+ xor a5, a5, a6
+ lui a6, 0xD1FFAB1E
+ slli a6, a6, 12
+ addi a6, a6, 0xD1FFAB1E
+ slli a6, a6, 13
+ addi a6, a6, 0xD1FFAB1E
+ and a5, a5, a6
+ srli a5, a5, 2
+ xor a4, a5, a4
+ sh1add a5, a3, a1
+ sd a4, 0xD1FFAB1E(a5)
addi a3, a3, 0xD1FFAB1E
;; size=72 bbWeight=4 PerfScore 68.00
G_M31524_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
@@ -348,33 +345,32 @@ G_M31524_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
bltu a4, a5, G_M31524_IG07
;; size=12 bbWeight=4 PerfScore 18.00
G_M31524_IG05: ; bbWeight=2, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
- slli a4, a3, 1
- add t6, a0, a4
- ld a5, 0xD1FFAB1E(t6)
- auipc a6, 0xD1FFAB1E
- ld a6, 0xD1FFAB1E(a6)
- and a6, a5, a6
- bnez a6, G_M31524_IG07
+ sh1add a4, a3, a0
+ ld a4, 0xD1FFAB1E(a4)
+ auipc a5, 0xD1FFAB1E
+ ld a5, 0xD1FFAB1E(a5)
+ and a5, a4, a5
+ bnez a5, G_M31524_IG07
j G_M31524_IG03
- ;; size=32 bbWeight=2 PerfScore 21.00
+ ;; size=28 bbWeight=2 PerfScore 20.00
G_M31524_IG06: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
+ lui a5, 0xD1FFAB1E
+ addiw a5, a5, 0xD1FFAB1E
+ addw a5, a4, a5
lui a6, 0xD1FFAB1E
addiw a6, a6, 0xD1FFAB1E
- addw a6, a5, a6
- lui a7, 0xD1FFAB1E
- addiw a7, a7, 0xD1FFAB1E
- addw a7, a5, a7
- xor a6, a6, a7
- sext.w a6, a6
- lui a7, 0xD1FFAB1E
- addiw a7, a7, 0xD1FFAB1E
- and a6, a6, a7
- sext.w a6, a6
- srliw a6, a6, 2
- xor a5, a6, a5
+ addw a6, a4, a6
+ xor a5, a5, a6
sext.w a5, a5
- add t6, a1, a4
- sw a5, 0xD1FFAB1E(t6)
+ lui a6, 0xD1FFAB1E
+ addiw a6, a6, 0xD1FFAB1E
+ and a5, a5, a6
+ sext.w a5, a5
+ srliw a5, a5, 2
+ xor a4, a5, a4
+ sext.w a4, a4
+ sh1add a5, a3, a1
+ sw a4, 0xD1FFAB1E(a5)
addi a3, a3, 0xD1FFAB1E
;; size=72 bbWeight=4 PerfScore 62.00
G_M31524_IG07: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
@@ -383,38 +379,36 @@ G_M31524_IG07: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
bltu a4, a5, G_M31524_IG09
;; size=12 bbWeight=4 PerfScore 18.00
G_M31524_IG08: ; bbWeight=2, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
- slli a4, a3, 1
- add t6, a0, a4
- lw a5, 0xD1FFAB1E(t6)
- lui a6, 0xD1FFAB1E
- addiw a6, a6, 0xD1FFAB1E
- and a6, a5, a6
- sext.w a6, a6
- sext.w a6, a6
- beqz a6, G_M31524_IG06
- ;; size=36 bbWeight=2 PerfScore 20.00
+ sh1add a4, a3, a0
+ lw a4, 0xD1FFAB1E(a4)
+ lui a5, 0xD1FFAB1E
+ addiw a5, a5, 0xD1FFAB1E
+ and a5, a4, a5
+ sext.w a5, a5
+ sext.w a5, a5
+ beqz a5, G_M31524_IG06
+ ;; size=32 bbWeight=2 PerfScore 19.00
G_M31524_IG09: ; bbWeight=2, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
bgeu a3, a2, G_M31524_IG13
;; size=4 bbWeight=2 PerfScore 7.00
G_M31524_IG10: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
- slli a4, a3, 1
- add t6, a0, a4
- lhu a5, 0xD1FFAB1E(t6)
+ sh1add a4, a3, a0
+ lhu a4, 0xD1FFAB1E(a4)
+ sext.w a5, a4
sext.w a6, a5
- sext.w a7, a6
- addi t0, zero, 0xD1FFAB1E
- bltu t0, a7, G_M31524_IG13
- ;; size=28 bbWeight=4 PerfScore 36.00
+ addi a7, zero, 0xD1FFAB1E
+ bltu a7, a6, G_M31524_IG13
+ ;; size=24 bbWeight=4 PerfScore 34.00
G_M31524_IG11: ; bbWeight=2, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
- addiw a7, a6, 0xD1FFAB1E
- addi t0, zero, 0xD1FFAB1E
- bltu t0, a7, G_M31524_IG12
addiw a6, a5, 0xD1FFAB1E
+ addi a7, zero, 0xD1FFAB1E
+ bltu a7, a6, G_M31524_IG12
+ addiw a5, a4, 0xD1FFAB1E
;; size=16 bbWeight=2 PerfScore 10.00
G_M31524_IG12: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
- zext.h a5, a6
- add t6, a1, a4
- sh a5, 0xD1FFAB1E(t6)
+ zext.h a4, a5
+ sh1add a5, a3, a1
+ sh a4, 0xD1FFAB1E(a5)
addi a3, a3, 0xD1FFAB1E
bltu a3, a2, G_M31524_IG10
;; size=20 bbWeight=4 PerfScore 36.00
@@ -431,7 +425,7 @@ RWD08 dq 0025002500250025h
RWD16 dq FF80FF80FF80FF80h
-; Total bytes of code 348, prolog size 16, PerfScore 306.75, instruction count 76, allocated bytes for code 348 (MethodHash=91c584db) for method System.Text.Ascii:ChangeCase[ushort,ushort,System.Text.Ascii+ToLowerConversion](ptr,ptr,nuint):nuint (FullOpts)
+; Total bytes of code 336, prolog size 16, PerfScore 302.75, instruction count 73, allocated bytes for code 336 (MethodHash=91c584db) for method System.Text.Ascii:ChangeCase[ushort,ushort,System.Text.Ascii+ToLowerConversion](ptr,ptr,nuint):nuint (FullOpts)
; ============================================================
Unwind Info:
@@ -442,7 +436,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 174 (0x000ae) Actual length = 348 (0x00015c)
+ Function Length : 168 (0x000a8) Actual length = 336 (0x000150)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)+20 (+3.11%) : 6032.dasm - System.Number+BigInteger:HeuristicDivide(byref,byref):uint (FullOpts)@@ -8,32 +8,32 @@
; 0 inlinees with PGO data; 40 single block inlinees; 10 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T24] ( 7, 5 ) byref -> s1 single-def
-; V01 arg1 [V01,T25] ( 5, 4 ) byref -> a1 single-def
+; V00 arg0 [V00,T22] ( 7, 5 ) byref -> s1 single-def
+; V01 arg1 [V01,T23] ( 5, 4 ) byref -> a1 single-def
; V02 loc0 [V02,T00] ( 15, 36 ) int -> s2
-; V03 loc1 [V03,T29] ( 3, 1.50) int -> a0
-; V04 loc2 [V04,T27] ( 6, 3 ) int -> s5
+; V03 loc1 [V03,T26] ( 4, 2 ) int -> a0
+; V04 loc2 [V04,T25] ( 6, 3 ) int -> s5
;* V05 loc3 [V05 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V06 loc4 [V06 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
-; V07 loc5 [V07,T02] ( 6, 20.50) int -> a0
-; V08 loc6 [V08,T13] ( 3, 8.50) long -> a2
-; V09 loc7 [V09,T14] ( 3, 8.50) long -> a3
-; V10 loc8 [V10,T09] ( 3, 12 ) long -> a5
-; V11 loc9 [V11,T10] ( 3, 12 ) long -> a5
+; V07 loc5 [V07,T01] ( 8, 28.50) int -> a0
+; V08 loc6 [V08,T11] ( 3, 8.50) long -> a2
+; V09 loc7 [V09,T12] ( 3, 8.50) long -> a3
+; V10 loc8 [V10,T07] ( 3, 12 ) long -> a5
+; V11 loc9 [V11,T08] ( 3, 12 ) long -> a5
;* V12 loc10 [V12 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V13 loc11 [V13 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V14 loc12 [V14 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V15 loc13 [V15 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
-; V16 loc14 [V16,T03] ( 6, 20.50) int -> a0
-; V17 loc15 [V17,T15] ( 3, 8.50) long -> a1
-; V18 loc16 [V18,T11] ( 3, 12 ) long -> a2
+; V16 loc14 [V16,T02] ( 8, 28.50) int -> a0
+; V17 loc15 [V17,T13] ( 3, 8.50) long -> a1
+; V18 loc16 [V18,T09] ( 3, 12 ) long -> a2
;* V19 loc17 [V19 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V20 loc18 [V20 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V21 loc19 [V21 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V22 loc20 [V22 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;# V23 OutArgs [V23 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
-; V24 tmp1 [V24,T28] ( 2, 2 ) int -> a2 "impAppendStmt"
-; V25 tmp2 [V25,T08] ( 2, 16 ) long -> a2 "impAppendStmt"
+; V24 tmp1 [V24,T27] ( 2, 2 ) int -> a2 "impAppendStmt"
+; V25 tmp2 [V25,T06] ( 2, 16 ) long -> a2 "impAppendStmt"
;* V26 tmp3 [V26 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V27 tmp4 [V27 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp" <System.Span`1[uint]>
;* V28 tmp5 [V28 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
@@ -74,34 +74,31 @@
;* V63 tmp40 [V63 ] ( 0, 0 ) int -> zero-ref "field V21._length (fldOffset=0x8)" P-INDEP
;* V64 tmp41 [V64 ] ( 0, 0 ) byref -> zero-ref "field V22._reference (fldOffset=0x0)" P-INDEP
;* V65 tmp42 [V65 ] ( 0, 0 ) int -> zero-ref "field V22._length (fldOffset=0x8)" P-INDEP
-; V66 tmp43 [V66,T31] ( 2, 1 ) byref -> a2 single-def "field V27._reference (fldOffset=0x0)" P-INDEP
+; V66 tmp43 [V66,T28] ( 2, 1 ) byref -> a2 single-def "field V27._reference (fldOffset=0x0)" P-INDEP
;* V67 tmp44 [V67 ] ( 0, 0 ) int -> zero-ref "field V27._length (fldOffset=0x8)" P-INDEP
-; V68 tmp45 [V68,T32] ( 2, 1 ) byref -> a3 single-def "field V29._reference (fldOffset=0x0)" P-INDEP
+; V68 tmp45 [V68,T29] ( 2, 1 ) byref -> a3 single-def "field V29._reference (fldOffset=0x0)" P-INDEP
;* V69 tmp46 [V69 ] ( 0, 0 ) int -> zero-ref "field V29._length (fldOffset=0x8)" P-INDEP
-; V70 tmp47 [V70,T16] ( 2, 8 ) byref -> a5 "field V31._reference (fldOffset=0x0)" P-INDEP
+; V70 tmp47 [V70,T14] ( 2, 8 ) byref -> a5 "field V31._reference (fldOffset=0x0)" P-INDEP
;* V71 tmp48 [V71 ] ( 0, 0 ) int -> zero-ref "field V31._length (fldOffset=0x8)" P-INDEP
-; V72 tmp49 [V72,T17] ( 2, 8 ) byref -> a7 "field V33._reference (fldOffset=0x0)" P-INDEP
+; V72 tmp49 [V72,T15] ( 2, 8 ) byref -> a6 "field V33._reference (fldOffset=0x0)" P-INDEP
;* V73 tmp50 [V73 ] ( 0, 0 ) int -> zero-ref "field V33._length (fldOffset=0x8)" P-INDEP
-; V74 tmp51 [V74,T18] ( 2, 8 ) byref -> a7 "field V35._reference (fldOffset=0x0)" P-INDEP
+; V74 tmp51 [V74,T16] ( 2, 8 ) byref -> a6 "field V35._reference (fldOffset=0x0)" P-INDEP
;* V75 tmp52 [V75 ] ( 0, 0 ) int -> zero-ref "field V35._length (fldOffset=0x8)" P-INDEP
-; V76 tmp53 [V76,T19] ( 2, 8 ) byref -> a0 "field V37._reference (fldOffset=0x0)" P-INDEP
+; V76 tmp53 [V76,T17] ( 2, 8 ) byref -> a0 "field V37._reference (fldOffset=0x0)" P-INDEP
;* V77 tmp54 [V77 ] ( 0, 0 ) int -> zero-ref "field V37._length (fldOffset=0x8)" P-INDEP
-; V78 tmp55 [V78,T20] ( 2, 8 ) byref -> a2 "field V39._reference (fldOffset=0x0)" P-INDEP
+; V78 tmp55 [V78,T18] ( 2, 8 ) byref -> a2 "field V39._reference (fldOffset=0x0)" P-INDEP
;* V79 tmp56 [V79 ] ( 0, 0 ) int -> zero-ref "field V39._length (fldOffset=0x8)" P-INDEP
-; V80 tmp57 [V80,T21] ( 2, 8 ) byref -> a4 "field V41._reference (fldOffset=0x0)" P-INDEP
+; V80 tmp57 [V80,T19] ( 2, 8 ) byref -> a3 "field V41._reference (fldOffset=0x0)" P-INDEP
;* V81 tmp58 [V81 ] ( 0, 0 ) int -> zero-ref "field V41._length (fldOffset=0x8)" P-INDEP
-; V82 tmp59 [V82,T22] ( 2, 8 ) byref -> a4 "field V43._reference (fldOffset=0x0)" P-INDEP
+; V82 tmp59 [V82,T20] ( 2, 8 ) byref -> a3 "field V43._reference (fldOffset=0x0)" P-INDEP
;* V83 tmp60 [V83 ] ( 0, 0 ) int -> zero-ref "field V43._length (fldOffset=0x8)" P-INDEP
-; V84 tmp61 [V84,T23] ( 2, 8 ) byref -> a0 "field V45._reference (fldOffset=0x0)" P-INDEP
+; V84 tmp61 [V84,T21] ( 2, 8 ) byref -> a0 "field V45._reference (fldOffset=0x0)" P-INDEP
;* V85 tmp62 [V85 ] ( 0, 0 ) int -> zero-ref "field V45._length (fldOffset=0x8)" P-INDEP
-; V86 cse0 [V86,T30] ( 3, 1.50) long -> a0 "CSE #02: moderate"
-; V87 cse1 [V87,T04] ( 4, 16 ) long -> a6 "CSE #07: aggressive"
-; V88 cse2 [V88,T05] ( 4, 16 ) long -> a3 "CSE #10: aggressive"
-; V89 cse3 [V89,T01] ( 8, 25 ) byref -> s3 "CSE #05: aggressive"
-; V90 cse4 [V90,T12] ( 4, 9 ) byref -> s4 "CSE #03: moderate"
-; V91 cse5 [V91,T06] ( 4, 16 ) int -> a2 "CSE #08: aggressive"
-; V92 cse6 [V92,T07] ( 4, 16 ) int -> a1 "CSE #11: aggressive"
-; V93 cse7 [V93,T26] ( 2, 4.50) long -> a4 hoist "CSE #04: moderate"
+; V86 cse0 [V86,T03] ( 8, 25 ) byref -> s3 "CSE #03: aggressive"
+; V87 cse1 [V87,T10] ( 4, 9 ) byref -> s4 "CSE #01: moderate"
+; V88 cse2 [V88,T04] ( 4, 16 ) int -> a2 "CSE #04: aggressive"
+; V89 cse3 [V89,T05] ( 4, 16 ) int -> a1 "CSE #05: aggressive"
+; V90 cse4 [V90,T24] ( 2, 4.50) long -> a4 hoist "CSE #02: moderate"
;
; Lcl frame size = 8
Frame info. #outsz=0; #framesz=64; lcl=8
@@ -137,8 +134,8 @@ G_M38309_IG03: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0A00 {s1 a1}
sext.w a4, a3
sext.w a5, a0
bgeu a5, a4, G_M38309_IG17
- slli.uw a0, a0, 2
- add t6, a2, a0
+ slli.uw a3, a0, 2
+ add t6, a2, a3
; byrRegs +[t6]
lw a2, 0xD1FFAB1E(t6)
; byrRegs -[a2]
@@ -146,6 +143,7 @@ G_M38309_IG03: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0A00 {s1 a1}
; byrRegs +[s4]
mv a3, s4
; byrRegs +[a3]
+ slli.uw a0, a0, 2
add t6, a3, a0
lw a0, 0xD1FFAB1E(t6)
addiw a0, a0, 0xD1FFAB1E
@@ -158,7 +156,7 @@ G_M38309_IG03: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0A00 {s1 a1}
mv a3, zero
; byrRegs -[a3]
zext.w a4, s5
- ;; size=92 bbWeight=0.50 PerfScore 22.00
+ ;; size=96 bbWeight=0.50 PerfScore 22.25
G_M38309_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=180A00 {s1 a1 s3 s4}, byref, isz
; byrRegs -[t6]
mv a5, s4
@@ -176,28 +174,31 @@ G_M38309_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=180A00 {s1 a1 s
mul a5, a5, a4
add a5, a5, a3
srli a3, a5, 32
- mv a7, s3
- ; byrRegs +[a7]
- add t6, a7, a6
- lw a7, 0xD1FFAB1E(t6)
- ; byrRegs -[a7]
- zext.w a7, a7
+ mv a6, s3
+ ; byrRegs +[a6]
+ slli.uw a7, a0, 2
+ add t6, a6, a7
+ lw a6, 0xD1FFAB1E(t6)
+ ; byrRegs -[a6]
+ zext.w a6, a6
zext.w a5, a5
- sub a5, a7, a5
+ sub a5, a6, a5
sub a5, a5, a2
srli a2, a5, 32
andi a2, a2, 1
- mv a7, s3
- ; byrRegs +[a7]
- add t6, a7, a6
+ mv a6, s3
+ ; byrRegs +[a6]
+ slli.uw a7, a0, 2
+ add t6, a6, a7
sw a5, 0xD1FFAB1E(t6)
addiw a0, a0, 0xD1FFAB1E
sext.w a5, a0
sext.w a6, s2
+ ; byrRegs -[a6]
blt a5, a6, G_M38309_IG04
- ;; size=108 bbWeight=4 PerfScore 112.00
+ ;; size=116 bbWeight=4 PerfScore 116.00
G_M38309_IG05: ; bbWeight=0.25, gcrefRegs=0000 {}, byrefRegs=180A00 {s1 a1 s3 s4}, byref, isz
- ; byrRegs -[a7 t6]
+ ; byrRegs -[t6]
sext.w a0, s2
bge zero, a0, G_M38309_IG07
;; size=8 bbWeight=0.25 PerfScore 1.00
@@ -255,27 +256,30 @@ G_M38309_IG09: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=180200 {s1 s3 s
lw a2, 0xD1FFAB1E(t6)
; byrRegs -[a2]
zext.w a2, a2
- mv a4, s4
- ; byrRegs +[a4]
- add t6, a4, a3
- lw a4, 0xD1FFAB1E(t6)
- ; byrRegs -[a4]
- zext.w a4, a4
- sub a2, a2, a4
+ mv a3, s4
+ ; byrRegs +[a3]
+ slli.uw a4, a0, 2
+ add t6, a3, a4
+ lw a3, 0xD1FFAB1E(t6)
+ ; byrRegs -[a3]
+ zext.w a3, a3
+ sub a2, a2, a3
sub a2, a2, a1
srli a1, a2, 32
andi a1, a1, 1
- mv a4, s3
- ; byrRegs +[a4]
- add t6, a4, a3
+ mv a3, s3
+ ; byrRegs +[a3]
+ slli.uw a4, a0, 2
+ add t6, a3, a4
sw a2, 0xD1FFAB1E(t6)
addiw a0, a0, 0xD1FFAB1E
sext.w a2, a0
sext.w a3, s2
+ ; byrRegs -[a3]
blt a2, a3, G_M38309_IG09
- ;; size=92 bbWeight=4 PerfScore 98.00
+ ;; size=100 bbWeight=4 PerfScore 102.00
G_M38309_IG10: ; bbWeight=0.25, gcrefRegs=0000 {}, byrefRegs=80200 {s1 s3}, byref, isz
- ; byrRegs -[a4 s4 t6]
+ ; byrRegs -[s4 t6]
sext.w a0, s2
bge zero, a0, G_M38309_IG12
;; size=8 bbWeight=0.25 PerfScore 1.00
@@ -342,7 +346,7 @@ G_M38309_IG18: ; bbWeight=0, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
ebreak
;; size=12 bbWeight=0 PerfScore 0.00
-; Total bytes of code 644, prolog size 40, PerfScore 442.00, instruction count 157, allocated bytes for code 644 (MethodHash=daac6a5a) for method System.Number+BigInteger:HeuristicDivide(byref,byref):uint (FullOpts)
+; Total bytes of code 664, prolog size 40, PerfScore 450.25, instruction count 162, allocated bytes for code 664 (MethodHash=daac6a5a) for method System.Number+BigInteger:HeuristicDivide(byref,byref):uint (FullOpts)
; ============================================================
Unwind Info:
@@ -353,7 +357,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 322 (0x00142) Actual length = 644 (0x000284)
+ Function Length : 332 (0x0014c) Actual length = 664 (0x000298)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)+4 (+1.44%) : 6031.dasm - System.Number+BigInteger:Multiply10():this (FullOpts)@@ -8,10 +8,10 @@
; 0 inlinees with PGO data; 15 single block inlinees; 4 inlinees without PGO data
; Final local variable assignments
;
-; V00 this [V00,T05] ( 6, 8 ) byref -> s1 this single-def
-; V01 loc0 [V01,T00] ( 8, 21.50) int -> a1
-; V02 loc1 [V02,T09] ( 4, 5.50) int -> a0
-; V03 loc2 [V03,T06] ( 5, 9.50) long -> a2
+; V00 this [V00,T04] ( 6, 8 ) byref -> s1 this single-def
+; V01 loc0 [V01,T00] ( 9, 25.50) int -> a1
+; V02 loc1 [V02,T08] ( 4, 5.50) int -> a0
+; V03 loc2 [V03,T05] ( 5, 9.50) long -> a2
; V04 loc3 [V04,T02] ( 3, 12 ) long -> a4
; V05 loc4 [V05,T03] ( 3, 12 ) long -> a4
;* V06 loc5 [V06 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
@@ -32,15 +32,14 @@
;* V21 tmp12 [V21 ] ( 0, 0 ) int -> zero-ref "field V07._length (fldOffset=0x8)" P-INDEP
;* V22 tmp13 [V22 ] ( 0, 0 ) byref -> zero-ref single-def "field V08._reference (fldOffset=0x0)" P-INDEP
;* V23 tmp14 [V23 ] ( 0, 0 ) int -> zero-ref "field V08._length (fldOffset=0x8)" P-INDEP
-; V24 tmp15 [V24,T07] ( 2, 8 ) byref -> a4 "field V11._reference (fldOffset=0x0)" P-INDEP
+; V24 tmp15 [V24,T06] ( 2, 8 ) byref -> a4 "field V11._reference (fldOffset=0x0)" P-INDEP
;* V25 tmp16 [V25 ] ( 0, 0 ) int -> zero-ref "field V11._length (fldOffset=0x8)" P-INDEP
-; V26 tmp17 [V26,T08] ( 2, 8 ) byref -> a6 "field V13._reference (fldOffset=0x0)" P-INDEP
+; V26 tmp17 [V26,T07] ( 2, 8 ) byref -> a5 "field V13._reference (fldOffset=0x0)" P-INDEP
;* V27 tmp18 [V27 ] ( 0, 0 ) int -> zero-ref "field V13._length (fldOffset=0x8)" P-INDEP
-; V28 tmp19 [V28,T11] ( 2, 1 ) byref -> a3 single-def "field V17._reference (fldOffset=0x0)" P-INDEP
+; V28 tmp19 [V28,T10] ( 2, 1 ) byref -> a3 single-def "field V17._reference (fldOffset=0x0)" P-INDEP
;* V29 tmp20 [V29 ] ( 0, 0 ) int -> zero-ref "field V17._length (fldOffset=0x8)" P-INDEP
-; V30 cse0 [V30,T04] ( 3, 12 ) long -> a5 "CSE #04: aggressive"
-; V31 cse1 [V31,T01] ( 4, 12.50) byref -> a3 "CSE #02: aggressive"
-; V32 cse2 [V32,T10] ( 3, 2.50) int -> a0 "CSE #01: aggressive"
+; V30 cse0 [V30,T01] ( 4, 12.50) byref -> a3 "CSE #02: aggressive"
+; V31 cse1 [V31,T09] ( 3, 2.50) int -> a0 "CSE #01: aggressive"
;
; Lcl frame size = 8
Frame info. #outsz=0; #framesz=32; lcl=8
@@ -78,21 +77,23 @@ G_M24569_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0200 {s1}, byre
lw a4, 0xD1FFAB1E(t6)
; byrRegs -[a4]
zext.w a4, a4
- slli a6, a4, 1
- sh3add a4, a4, a6
+ slli a5, a4, 1
+ sh3add a4, a4, a5
add a4, a4, a2
srli a2, a4, 32
- mv a6, a3
- ; byrRegs +[a6]
- add t6, a6, a5
+ mv a5, a3
+ ; byrRegs +[a5]
+ slli.uw a6, a1, 2
+ add t6, a5, a6
sw a4, 0xD1FFAB1E(t6)
addiw a1, a1, 0xD1FFAB1E
sext.w a4, a1
sext.w a5, a0
+ ; byrRegs -[a5]
blt a4, a5, G_M24569_IG04
- ;; size=82 bbWeight=4 PerfScore 86.00
+ ;; size=86 bbWeight=4 PerfScore 88.00
G_M24569_IG05: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=2200 {s1 a3}, byref, isz
- ; byrRegs -[a6 t6]
+ ; byrRegs -[t6]
beqz a2, G_M24569_IG07
sext.w a4, a0
addi a5, zero, 0xD1FFAB1E
@@ -143,7 +144,7 @@ G_M24569_IG08: ; bbWeight=0, gcVars=0000000000000000 {}, gcrefRegs=0000 {
ebreak
;; size=12 bbWeight=0 PerfScore 0.00
-; Total bytes of code 278, prolog size 24, PerfScore 138.50, instruction count 59, allocated bytes for code 278 (MethodHash=90daa006) for method System.Number+BigInteger:Multiply10():this (FullOpts)
+; Total bytes of code 282, prolog size 24, PerfScore 140.50, instruction count 60, allocated bytes for code 282 (MethodHash=90daa006) for method System.Number+BigInteger:Multiply10():this (FullOpts)
; ============================================================
Unwind Info:
@@ -154,7 +155,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 139 (0x0008b) Actual length = 278 (0x000116)
+ Function Length : 141 (0x0008d) Actual length = 282 (0x00011a)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)+4 (+0.83%) : 6029.dasm - System.Number+BigInteger:Multiply(byref,uint,byref) (FullOpts)@@ -8,26 +8,26 @@
; 0 inlinees with PGO data; 23 single block inlinees; 8 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T04] ( 6, 8 ) byref -> a0 single-def
-; V01 arg1 [V01,T08] ( 6, 4 ) int -> a1 single-def
+; V00 arg0 [V00,T03] ( 6, 8 ) byref -> a0 single-def
+; V01 arg1 [V01,T07] ( 6, 4 ) int -> a1 single-def
; V02 arg2 [V02,T01] ( 14, 15 ) byref -> s1 single-def
-; V03 loc0 [V03,T09] ( 5, 6 ) int -> s2
-; V04 loc1 [V04,T00] ( 8, 21.50) int -> a2
-; V05 loc2 [V05,T05] ( 5, 9.50) int -> a3
-; V06 loc3 [V06,T14] ( 3, 1.50) int -> a0
+; V03 loc0 [V03,T08] ( 5, 6 ) int -> s2
+; V04 loc1 [V04,T00] ( 9, 25.50) int -> a2
+; V05 loc2 [V05,T04] ( 5, 9.50) int -> a3
+; V06 loc3 [V06,T13] ( 3, 1.50) int -> a0
; V07 loc4 [V07,T02] ( 3, 12 ) long -> a1
;* V08 loc5 [V08 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V09 loc6 [V09 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V10 loc7 [V10 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;# V11 OutArgs [V11 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
-; V12 tmp1 [V12,T15] ( 3, 1.50) int -> a2 "Inline return value spill temp"
+; V12 tmp1 [V12,T14] ( 3, 1.50) int -> a2 "Inline return value spill temp"
;* V13 tmp2 [V13 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
-; V14 tmp3 [V14,T11] ( 4, 4 ) long -> a0 "Inlining Arg"
-; V15 tmp4 [V15,T13] ( 3, 3 ) int -> a0 "Inlining Arg"
+; V14 tmp3 [V14,T10] ( 4, 4 ) long -> a0 "Inlining Arg"
+; V15 tmp4 [V15,T12] ( 3, 3 ) int -> a0 "Inlining Arg"
;* V16 tmp5 [V16 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V17 tmp6 [V17 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V18 tmp7 [V18 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
-; V19 tmp8 [V19,T16] ( 3, 1.50) int -> a2 "Inline stloc first use temp"
+; V19 tmp8 [V19,T15] ( 3, 1.50) int -> a2 "Inline stloc first use temp"
;* V20 tmp9 [V20 ] ( 0, 0 ) byref -> zero-ref "impAppendStmt"
;* V21 tmp10 [V21 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V22 tmp11 [V22 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
@@ -46,16 +46,15 @@
;* V35 tmp24 [V35 ] ( 0, 0 ) int -> zero-ref "field V09._length (fldOffset=0x8)" P-INDEP
;* V36 tmp25 [V36 ] ( 0, 0 ) byref -> zero-ref single-def "field V10._reference (fldOffset=0x0)" P-INDEP
;* V37 tmp26 [V37 ] ( 0, 0 ) int -> zero-ref "field V10._length (fldOffset=0x8)" P-INDEP
-; V38 tmp27 [V38,T06] ( 2, 8 ) byref -> a1 "field V25._reference (fldOffset=0x0)" P-INDEP
+; V38 tmp27 [V38,T05] ( 2, 8 ) byref -> a1 "field V25._reference (fldOffset=0x0)" P-INDEP
;* V39 tmp28 [V39 ] ( 0, 0 ) int -> zero-ref "field V25._length (fldOffset=0x8)" P-INDEP
-; V40 tmp29 [V40,T07] ( 2, 8 ) byref -> a3 "field V27._reference (fldOffset=0x0)" P-INDEP
+; V40 tmp29 [V40,T06] ( 2, 8 ) byref -> a3 "field V27._reference (fldOffset=0x0)" P-INDEP
;* V41 tmp30 [V41 ] ( 0, 0 ) int -> zero-ref "field V27._length (fldOffset=0x8)" P-INDEP
-; V42 tmp31 [V42,T18] ( 2, 1 ) byref -> a0 single-def "field V31._reference (fldOffset=0x0)" P-INDEP
+; V42 tmp31 [V42,T17] ( 2, 1 ) byref -> a0 single-def "field V31._reference (fldOffset=0x0)" P-INDEP
;* V43 tmp32 [V43 ] ( 0, 0 ) int -> zero-ref "field V31._length (fldOffset=0x8)" P-INDEP
-; V44 cse0 [V44,T03] ( 3, 12 ) long -> a4 "CSE #07: aggressive"
-; V45 cse1 [V45,T12] ( 5, 3.50) int -> s2 "CSE #01: moderate"
-; V46 cse2 [V46,T17] ( 3, 1.50) long -> a1 "CSE #02: moderate"
-; V47 cse3 [V47,T10] ( 4, 5.50) long -> s3 hoist multi-def "CSE #03: aggressive"
+; V44 cse0 [V44,T11] ( 5, 3.50) int -> s2 "CSE #01: moderate"
+; V45 cse1 [V45,T16] ( 3, 1.50) long -> a1 "CSE #02: moderate"
+; V46 cse2 [V46,T09] ( 4, 5.50) long -> s3 hoist multi-def "CSE #03: aggressive"
;
; Lcl frame size = 8
Frame info. #outsz=0; #framesz=48; lcl=8
@@ -105,6 +104,7 @@ G_M6434_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0600 {s1 a0}, by
lb zero, 0xD1FFAB1E(s1)
addi a3, s1, 0xD1FFAB1E
; byrRegs +[a3]
+ slli.uw a4, a2, 2
add t6, a3, a4
sw a1, 0xD1FFAB1E(t6)
srli a1, a1, 32
@@ -114,7 +114,7 @@ G_M6434_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0600 {s1 a0}, by
sext.w a1, a2
sext.w a4, s2
blt a1, a4, G_M6434_IG04
- ;; size=86 bbWeight=4 PerfScore 104.00
+ ;; size=90 bbWeight=4 PerfScore 106.00
G_M6434_IG05: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0200 {s1}, byref, isz
; byrRegs -[a0 t6]
sext.w a0, s2
@@ -232,7 +232,7 @@ G_M6434_IG15: ; bbWeight=0, gcVars=0000000000000000 {}, gcrefRegs=0000 {}
ebreak
;; size=12 bbWeight=0 PerfScore 0.00
-; Total bytes of code 482, prolog size 32, PerfScore 205.00, instruction count 106, allocated bytes for code 482 (MethodHash=71b0e6dd) for method System.Number+BigInteger:Multiply(byref,uint,byref) (FullOpts)
+; Total bytes of code 486, prolog size 32, PerfScore 207.00, instruction count 107, allocated bytes for code 486 (MethodHash=71b0e6dd) for method System.Number+BigInteger:Multiply(byref,uint,byref) (FullOpts)
; ============================================================
Unwind Info:
@@ -243,7 +243,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 241 (0x000f1) Actual length = 482 (0x0001e2)
+ Function Length : 243 (0x000f3) Actual length = 486 (0x0001e6)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)System.mch-16 (-4.12%) : 4056.dasm - System.RuntimeTypeHandle:CopyRuntimeTypeHandles(System.Type[],byref):nint[] (FullOpts)@@ -8,41 +8,39 @@
; 0 inlinees with PGO data; 0 single block inlinees; 1 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T05] ( 6, 7.50) ref -> s1 class-hnd single-def <System.Type[]>
-; V01 arg1 [V01,T08] ( 4, 3 ) byref -> s2 single-def
-; V02 loc0 [V02,T06] ( 7, 6.04) ref -> s4 class-hnd exact single-def <nint[]>
-; V03 loc1 [V03,T01] ( 11, 16.58) int -> s5
+; V00 arg0 [V00,T04] ( 6, 7.50) ref -> s1 class-hnd single-def <System.Type[]>
+; V01 arg1 [V01,T07] ( 4, 3 ) byref -> s2 single-def
+; V02 loc0 [V02,T05] ( 7, 6.04) ref -> s4 class-hnd exact single-def <nint[]>
+; V03 loc1 [V03,T01] ( 12, 20.54) int -> s5
;* V04 loc2 [V04 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op <System.RuntimeTypeHandle>
;# V05 OutArgs [V05 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
;* V06 tmp1 [V06 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewArr temp" <nint[]>
-; V07 tmp2 [V07,T02] ( 6, 16 ) long -> s7 "Strict ordering of exceptions for Array store"
+; V07 tmp2 [V07,T02] ( 6, 16 ) long -> s6 "Strict ordering of exceptions for Array store"
;* V08 tmp3 [V08 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "dup spill" <System.RuntimeType>
;* V09 tmp4 [V09 ] ( 0, 0 ) ref -> zero-ref
-; V10 tmp5 [V10,T04] ( 6, 10 ) ref -> a0 "field V04.m_type (fldOffset=0x0)" P-INDEP
+; V10 tmp5 [V10,T03] ( 6, 10 ) ref -> a0 "field V04.m_type (fldOffset=0x0)" P-INDEP
; V11 tmp6 [V11,T00] ( 6, 24 ) ref -> a0 "argument with side effect"
-; V12 cse0 [V12,T03] ( 3, 11.88) long -> s6 "CSE #03: aggressive"
-; V13 cse1 [V13,T07] ( 6, 6 ) int -> s3 "CSE #01: aggressive"
+; V12 cse0 [V12,T06] ( 6, 6 ) int -> s3 "CSE #01: aggressive"
;
-; Lcl frame size = 8
-Frame info. #outsz=0; #framesz=80; lcl=8
+; Lcl frame size = 0
+Frame info. #outsz=0; #framesz=64; lcl=0
G_M5038_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- addi sp, sp, -80
- sd fp, 8(sp)
- sd ra, 16(sp)
- sd s1, 24(sp)
- sd s2, 32(sp)
- sd s3, 40(sp)
- sd s4, 48(sp)
- sd s5, 56(sp)
- sd s6, 64(sp)
- sd s7, 72(sp)
- addi fp, sp, 8
+ addi sp, sp, -64
+ sd fp, 0(sp)
+ sd ra, 8(sp)
+ sd s1, 16(sp)
+ sd s2, 24(sp)
+ sd s3, 32(sp)
+ sd s4, 40(sp)
+ sd s5, 48(sp)
+ sd s6, 56(sp)
+ mv fp, sp
mv s1, a0
; gcrRegs +[s1]
mv s2, a1
; byrRegs +[s2]
- ;; size=52 bbWeight=1 PerfScore 38.00
+ ;; size=48 bbWeight=1 PerfScore 34.00
G_M5038_IG02: ; bbWeight=1, gcrefRegs=0200 {s1}, byrefRegs=40000 {s2}, byref, isz
beqz s1, G_M5038_IG14
;; size=4 bbWeight=1 PerfScore 3.50
@@ -68,8 +66,7 @@ G_M5038_IG03: ; bbWeight=0.50, gcrefRegs=0200 {s1}, byrefRegs=40000 {s2},
blt a0, a1, G_M5038_IG12
;; size=64 bbWeight=0.50 PerfScore 11.00
G_M5038_IG04: ; bbWeight=3.96, gcrefRegs=100200 {s1 s4}, byrefRegs=40000 {s2}, byref, isz
- slli.uw s6, s5, 3
- add a0, s1, s6
+ sh3add.uw a0, s5, s1
; byrRegs +[a0]
ld a0, 0xD1FFAB1E(a0)
; gcrRegs +[a0]
@@ -79,19 +76,19 @@ G_M5038_IG04: ; bbWeight=3.96, gcrefRegs=100200 {s1 s4}, byrefRegs=40000
ld a1, 0xD1FFAB1E(a1)
jalr a1 // <unknown method>
beqz a0, G_M5038_IG06
- ;; size=32 bbWeight=3.96 PerfScore 61.38
+ ;; size=28 bbWeight=3.96 PerfScore 59.40
G_M5038_IG05: ; bbWeight=1.98, gcrefRegs=100600 {s1 a0 s4}, byrefRegs=40000 {s2}, byref, isz
- ld s7, 0xD1FFAB1E(a0)
+ ld s6, 0xD1FFAB1E(a0)
j G_M5038_IG07
;; size=8 bbWeight=1.98 PerfScore 6.93
G_M5038_IG06: ; bbWeight=1.98, gcrefRegs=100200 {s1 s4}, byrefRegs=40000 {s2}, byref
; gcrRegs -[a0]
- mv s7, zero
+ mv s6, zero
;; size=4 bbWeight=1.98 PerfScore 0.99
G_M5038_IG07: ; bbWeight=3.96, gcrefRegs=100200 {s1 s4}, byrefRegs=40000 {s2}, byref, isz
- add a0, s4, s6
+ sh3add.uw a0, s5, s4
; byrRegs +[a0]
- sd s7, 0xD1FFAB1E(a0)
+ sd s6, 0xD1FFAB1E(a0)
addiw s5, s5, 0xD1FFAB1E
sext.w a0, s3
; byrRegs -[a0]
@@ -106,20 +103,19 @@ G_M5038_IG08: ; bbWeight=0.50, gcrefRegs=100000 {s4}, byrefRegs=40000 {s2
; gcrRegs +[a0]
;; size=12 bbWeight=0.50 PerfScore 3.25
G_M5038_IG09: ; bbWeight=0.50, epilog, nogc, extend
- ld s7, 72(sp)
- ld s6, 64(sp)
- ld s5, 56(sp)
- ld s4, 48(sp)
- ld s3, 40(sp)
- ld s2, 32(sp)
- ld s1, 24(sp)
- ld ra, 16(sp)
- ld fp, 8(sp)
- addi sp, sp, 80
- ret ;; size=44 bbWeight=0.50 PerfScore 10.75
+ ld s6, 56(sp)
+ ld s5, 48(sp)
+ ld s4, 40(sp)
+ ld s3, 32(sp)
+ ld s2, 24(sp)
+ ld s1, 16(sp)
+ ld ra, 8(sp)
+ ld fp, 0(sp)
+ addi sp, sp, 64
+ ret ;; size=40 bbWeight=0.50 PerfScore 9.75
G_M5038_IG10: ; bbWeight=0.02, gcVars=0000000000000000 {}, gcrefRegs=100200 {s1 s4}, byrefRegs=40000 {s2}, gcvars, byref
; gcrRegs -[a0] +[s1]
- mv s7, zero
+ mv s6, zero
;; size=4 bbWeight=0.02 PerfScore 0.01
G_M5038_IG11: ; bbWeight=0.04, gcrefRegs=100200 {s1 s4}, byrefRegs=40000 {s2}, byref, isz
lw a0, 0xD1FFAB1E(s4)
@@ -128,7 +124,7 @@ G_M5038_IG11: ; bbWeight=0.04, gcrefRegs=100200 {s1 s4}, byrefRegs=40000
bgeu a2, a1, G_M5038_IG16
sh3add.uw a0, s5, s4
; byrRegs +[a0]
- sd s7, 0xD1FFAB1E(a0)
+ sd s6, 0xD1FFAB1E(a0)
addiw s5, s5, 0xD1FFAB1E
sext.w a0, s3
; byrRegs -[a0]
@@ -148,7 +144,7 @@ G_M5038_IG12: ; bbWeight=0.04, gcrefRegs=100200 {s1 s4}, byrefRegs=40000
beqz a0, G_M5038_IG10
;; size=28 bbWeight=0.04 PerfScore 0.60
G_M5038_IG13: ; bbWeight=0.02, gcrefRegs=100600 {s1 a0 s4}, byrefRegs=40000 {s2}, byref, isz
- ld s7, 0xD1FFAB1E(a0)
+ ld s6, 0xD1FFAB1E(a0)
j G_M5038_IG11
;; size=8 bbWeight=0.02 PerfScore 0.07
G_M5038_IG14: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=40000 {s2}, byref
@@ -157,17 +153,16 @@ G_M5038_IG14: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=40000 {s2}, b
mv a0, zero
;; size=8 bbWeight=0.50 PerfScore 2.25
G_M5038_IG15: ; bbWeight=0.50, epilog, nogc, extend
- ld s7, 72(sp)
- ld s6, 64(sp)
- ld s5, 56(sp)
- ld s4, 48(sp)
- ld s3, 40(sp)
- ld s2, 32(sp)
- ld s1, 24(sp)
- ld ra, 16(sp)
- ld fp, 8(sp)
- addi sp, sp, 80
- ret ;; size=44 bbWeight=0.50 PerfScore 10.75
+ ld s6, 56(sp)
+ ld s5, 48(sp)
+ ld s4, 40(sp)
+ ld s3, 32(sp)
+ ld s2, 24(sp)
+ ld s1, 16(sp)
+ ld ra, 8(sp)
+ ld fp, 0(sp)
+ addi sp, sp, 64
+ ret ;; size=40 bbWeight=0.50 PerfScore 9.75
G_M5038_IG16: ; bbWeight=0, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
; byrRegs -[s2]
auipc ra, 0xD1FFAB1E
@@ -175,37 +170,37 @@ G_M5038_IG16: ; bbWeight=0, gcVars=0000000000000000 {}, gcrefRegs=0000 {}
ebreak
;; size=12 bbWeight=0 PerfScore 0.00
-; Total bytes of code 388, prolog size 44, PerfScore 187.74, instruction count 92, allocated bytes for code 388 (MethodHash=fc39ec51) for method System.RuntimeTypeHandle:CopyRuntimeTypeHandles(System.Type[],byref):nint[] (FullOpts)
+; Total bytes of code 372, prolog size 40, PerfScore 179.76, instruction count 88, allocated bytes for code 372 (MethodHash=fc39ec51) for method System.RuntimeTypeHandle:CopyRuntimeTypeHandles(System.Type[],byref):nint[] (FullOpts)
; ============================================================
Unwind Info:
>> Start offset : 0x000000 (not in unwind data)
>> End offset : 0xd1ffab1e (not in unwind data)
- Code Words : 8
+ Code Words : 7
Epilog Count : 2
E bit : 0
X bit : 0
Vers : 0
- Function Length : 194 (0x000c2) Actual length = 388 (0x000184)
+ Function Length : 186 (0x000ba) Actual length = 372 (0x000174)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)
- Epilog Start Index : 3 (0x03)
+ Epilog Start Index : 1 (0x01)
---- Scope 1
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)
- Epilog Start Index : 3 (0x03)
+ Epilog Start Index : 1 (0x01)
---- Unwind codes ----
- E2 00 01 add_fp 1 (0x01); addi fp, sp, #8
- ---- Epilog start at index 3 ----
- D0 16 09 save_reg X#22 Z#9 (0x09); sd s7, sp, 72
- D0 15 08 save_reg X#21 Z#8 (0x08); sd s6, sp, 64
- D0 14 07 save_reg X#20 Z#7 (0x07); sd s5, sp, 56
- D0 13 06 save_reg X#19 Z#6 (0x06); sd s4, sp, 48
- D0 12 05 save_reg X#18 Z#5 (0x05); sd s3, sp, 40
- D0 11 04 save_reg X#17 Z#4 (0x04); sd s2, sp, 32
- D0 08 03 save_reg X#8 Z#3 (0x03); sd s1, sp, 24
- D0 00 02 save_reg X#0 Z#2 (0x02); sd ra, sp, 16
- D0 07 01 save_reg X#7 Z#1 (0x01); sd fp, sp, 8
- 05 alloc_s #5 (0x05); addi sp, sp, -80 (0x050)
+ E1 set_fp; move fp, sp
+ ---- Epilog start at index 1 ----
+ D0 15 07 save_reg X#21 Z#7 (0x07); sd s6, sp, 56
+ D0 14 06 save_reg X#20 Z#6 (0x06); sd s5, sp, 48
+ D0 13 05 save_reg X#19 Z#5 (0x05); sd s4, sp, 40
+ D0 12 04 save_reg X#18 Z#4 (0x04); sd s3, sp, 32
+ D0 11 03 save_reg X#17 Z#3 (0x03); sd s2, sp, 24
+ D0 08 02 save_reg X#8 Z#2 (0x02); sd s1, sp, 16
+ D0 00 01 save_reg X#0 Z#1 (0x01); sd ra, sp, 8
+ D0 07 00 save_reg X#7 Z#0 (0x00); sd fp, sp, 0
+ 04 alloc_s #4 (0x04); addi sp, sp, -64 (0x040)
+ E4 end
E4 end
-12 (-3.45%) : 474.dasm - System.Text.Ascii:ChangeCase[ushort,ushort,System.Text.Ascii+ToLowerConversion](ptr,ptr,nuint):nuint (FullOpts)@@ -11,13 +11,13 @@
; V00 arg0 [V00,T06] ( 5, 10 ) long -> a0 single-def
; V01 arg1 [V01,T04] ( 5, 14 ) long -> a1 single-def
; V02 arg2 [V02,T03] ( 6, 16 ) long -> a2 single-def
-;* V03 loc0 [V03,T14] ( 0, 0 ) ubyte -> zero-ref
-;* V04 loc1 [V04,T15] ( 0, 0 ) ubyte -> zero-ref
-;* V05 loc2 [V05,T16] ( 0, 0 ) ubyte -> zero-ref
-;* V06 loc3 [V06,T17] ( 0, 0 ) ubyte -> zero-ref
-;* V07 loc4 [V07,T18] ( 0, 0 ) ubyte -> zero-ref
+;* V03 loc0 [V03,T11] ( 0, 0 ) ubyte -> zero-ref
+;* V04 loc1 [V04,T12] ( 0, 0 ) ubyte -> zero-ref
+;* V05 loc2 [V05,T13] ( 0, 0 ) ubyte -> zero-ref
+;* V06 loc3 [V06,T14] ( 0, 0 ) ubyte -> zero-ref
+;* V07 loc4 [V07,T15] ( 0, 0 ) ubyte -> zero-ref
;* V08 loc5 [V08 ] ( 0, 0 ) int -> zero-ref
-; V09 loc6 [V09,T00] ( 15, 47.25) long -> a3
+; V09 loc6 [V09,T00] ( 18, 59.25) long -> a3
;* V10 loc7 [V10 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V11 loc8 [V11 ] ( 0, 0 ) ushort -> zero-ref
;* V12 loc9 [V12 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ushort]>
@@ -25,26 +25,26 @@
;* V14 loc11 [V14 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V15 loc12 [V15 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V16 loc13 [V16 ] ( 0, 0 ) int -> zero-ref
-; V17 loc14 [V17,T01] ( 7, 24 ) long -> a5
+; V17 loc14 [V17,T01] ( 7, 24 ) long -> a4
;* V18 loc15 [V18 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ulong]>
;* V19 loc16 [V19 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[uint]>
-; V20 loc17 [V20,T02] ( 7, 24 ) int -> a5
+; V20 loc17 [V20,T02] ( 7, 24 ) int -> a4
;* V21 loc18 [V21 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[uint]>
;* V22 loc19 [V22 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ulong]>
;* V23 loc20 [V23 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ushort]>
-; V24 loc21 [V24,T05] ( 5, 16 ) int -> a6
+; V24 loc21 [V24,T05] ( 5, 16 ) int -> a5
;# V25 OutArgs [V25 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
;* V26 tmp1 [V26 ] ( 0, 0 ) int -> zero-ref
;* V27 tmp2 [V27 ] ( 0, 0 ) int -> zero-ref
;* V28 tmp3 [V28 ] ( 0, 0 ) int -> zero-ref
-;* V29 tmp4 [V29,T19] ( 0, 0 ) int -> zero-ref
-; V30 tmp5 [V30,T11] ( 2, 8 ) int -> a5
+;* V29 tmp4 [V29,T16] ( 0, 0 ) int -> zero-ref
+; V30 tmp5 [V30,T08] ( 2, 8 ) int -> a4
;* V31 tmp6 [V31 ] ( 0, 0 ) struct (16) zero-ref "dup spill" <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V32 tmp7 [V32 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.Runtime.Intrinsics.Vector128`1[byte]>
;* V33 tmp8 [V33 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.Runtime.Intrinsics.Vector128`1[byte]>
;* V34 tmp9 [V34 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V35 tmp10 [V35 ] ( 0, 0 ) int -> zero-ref
-; V36 tmp11 [V36,T12] ( 2, 8 ) long -> a5
+; V36 tmp11 [V36,T09] ( 2, 8 ) long -> a4
;* V37 tmp12 [V37 ] ( 0, 0 ) struct (16) zero-ref "dup spill" <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V38 tmp13 [V38 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.Runtime.Intrinsics.Vector128`1[byte]>
;* V39 tmp14 [V39 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.Runtime.Intrinsics.Vector128`1[byte]>
@@ -220,11 +220,11 @@
;* V209 tmp184 [V209 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V210 tmp185 [V210 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V211 tmp186 [V211 ] ( 0, 0 ) ushort -> zero-ref "Inlining Arg"
-; V212 tmp187 [V212,T08] ( 3, 10 ) int -> a5 ld-addr-op "Inline ldloca(s) first use temp"
+; V212 tmp187 [V212,T07] ( 3, 10 ) int -> a4 ld-addr-op "Inline ldloca(s) first use temp"
;* V213 tmp188 [V213 ] ( 0, 0 ) ubyte -> zero-ref "Inline return value spill temp"
;* V214 tmp189 [V214 ] ( 0, 0 ) ushort -> zero-ref "Inline stloc first use temp"
;* V215 tmp190 [V215 ] ( 0, 0 ) ubyte -> zero-ref "Inline return value spill temp"
-; V216 tmp191 [V216,T13] ( 2, 8 ) ushort -> a5 ld-addr-op "Inline ldloca(s) first use temp"
+; V216 tmp191 [V216,T10] ( 2, 8 ) ushort -> a4 ld-addr-op "Inline ldloca(s) first use temp"
;* V217 tmp192 [V217 ] ( 0, 0 ) ubyte -> zero-ref "Inline return value spill temp"
;* V218 tmp193 [V218 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V219 tmp194 [V219 ] ( 0, 0 ) ubyte -> zero-ref "Inline return value spill temp"
@@ -305,9 +305,6 @@
;* V294 tmp269 [V294 ] ( 0, 0 ) long -> zero-ref "field V207._lower (fldOffset=0x0)" P-INDEP
;* V295 tmp270 [V295 ] ( 0, 0 ) long -> zero-ref "field V207._upper (fldOffset=0x8)" P-INDEP
;* V296 tmp271 [V296 ] ( 0, 0 ) byref -> zero-ref "BlockOp address local"
-; V297 cse0 [V297,T09] ( 3, 8 ) long -> a4 "CSE #01: moderate"
-; V298 cse1 [V298,T10] ( 3, 8 ) long -> a4 "CSE #04: moderate"
-; V299 cse2 [V299,T07] ( 3, 12 ) long -> a4 "CSE #07: moderate"
;
; Lcl frame size = 0
Frame info. #outsz=0; #framesz=16; lcl=0
@@ -323,23 +320,23 @@ G_M31524_IG02: ; bbWeight=0.25, gcrefRegs=0000 {}, byrefRegs=0000 {}, byr
j G_M31524_IG04
;; size=8 bbWeight=0.25 PerfScore 0.50
G_M31524_IG03: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
+ auipc a5, 0xD1FFAB1E
+ ld a5, 0xD1FFAB1E(a5)
+ add a5, a4, a5
auipc a6, 0xD1FFAB1E
ld a6, 0xD1FFAB1E(a6)
- add a6, a5, a6
- auipc a7, 0xD1FFAB1E
- ld a7, 0xD1FFAB1E(a7)
- add a7, a5, a7
- xor a6, a6, a7
- lui a7, 0xD1FFAB1E
- slli a7, a7, 12
- addi a7, a7, 0xD1FFAB1E
- slli a7, a7, 13
- addi a7, a7, 0xD1FFAB1E
- and a6, a6, a7
- srli a6, a6, 2
- xor a5, a6, a5
- add t6, a1, a4
- sd a5, 0xD1FFAB1E(t6)
+ add a6, a4, a6
+ xor a5, a5, a6
+ lui a6, 0xD1FFAB1E
+ slli a6, a6, 12
+ addi a6, a6, 0xD1FFAB1E
+ slli a6, a6, 13
+ addi a6, a6, 0xD1FFAB1E
+ and a5, a5, a6
+ srli a5, a5, 2
+ xor a4, a5, a4
+ sh1add a5, a3, a1
+ sd a4, 0xD1FFAB1E(a5)
addi a3, a3, 0xD1FFAB1E
;; size=72 bbWeight=4 PerfScore 68.00
G_M31524_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
@@ -348,33 +345,32 @@ G_M31524_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
bltu a4, a5, G_M31524_IG07
;; size=12 bbWeight=4 PerfScore 18.00
G_M31524_IG05: ; bbWeight=2, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
- slli a4, a3, 1
- add t6, a0, a4
- ld a5, 0xD1FFAB1E(t6)
- auipc a6, 0xD1FFAB1E
- ld a6, 0xD1FFAB1E(a6)
- and a6, a5, a6
- bnez a6, G_M31524_IG07
+ sh1add a4, a3, a0
+ ld a4, 0xD1FFAB1E(a4)
+ auipc a5, 0xD1FFAB1E
+ ld a5, 0xD1FFAB1E(a5)
+ and a5, a4, a5
+ bnez a5, G_M31524_IG07
j G_M31524_IG03
- ;; size=32 bbWeight=2 PerfScore 21.00
+ ;; size=28 bbWeight=2 PerfScore 20.00
G_M31524_IG06: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
+ lui a5, 0xD1FFAB1E
+ addiw a5, a5, 0xD1FFAB1E
+ addw a5, a4, a5
lui a6, 0xD1FFAB1E
addiw a6, a6, 0xD1FFAB1E
- addw a6, a5, a6
- lui a7, 0xD1FFAB1E
- addiw a7, a7, 0xD1FFAB1E
- addw a7, a5, a7
- xor a6, a6, a7
- sext.w a6, a6
- lui a7, 0xD1FFAB1E
- addiw a7, a7, 0xD1FFAB1E
- and a6, a6, a7
- sext.w a6, a6
- srliw a6, a6, 2
- xor a5, a6, a5
+ addw a6, a4, a6
+ xor a5, a5, a6
sext.w a5, a5
- add t6, a1, a4
- sw a5, 0xD1FFAB1E(t6)
+ lui a6, 0xD1FFAB1E
+ addiw a6, a6, 0xD1FFAB1E
+ and a5, a5, a6
+ sext.w a5, a5
+ srliw a5, a5, 2
+ xor a4, a5, a4
+ sext.w a4, a4
+ sh1add a5, a3, a1
+ sw a4, 0xD1FFAB1E(a5)
addi a3, a3, 0xD1FFAB1E
;; size=72 bbWeight=4 PerfScore 62.00
G_M31524_IG07: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
@@ -383,38 +379,36 @@ G_M31524_IG07: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
bltu a4, a5, G_M31524_IG09
;; size=12 bbWeight=4 PerfScore 18.00
G_M31524_IG08: ; bbWeight=2, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
- slli a4, a3, 1
- add t6, a0, a4
- lw a5, 0xD1FFAB1E(t6)
- lui a6, 0xD1FFAB1E
- addiw a6, a6, 0xD1FFAB1E
- and a6, a5, a6
- sext.w a6, a6
- sext.w a6, a6
- beqz a6, G_M31524_IG06
- ;; size=36 bbWeight=2 PerfScore 20.00
+ sh1add a4, a3, a0
+ lw a4, 0xD1FFAB1E(a4)
+ lui a5, 0xD1FFAB1E
+ addiw a5, a5, 0xD1FFAB1E
+ and a5, a4, a5
+ sext.w a5, a5
+ sext.w a5, a5
+ beqz a5, G_M31524_IG06
+ ;; size=32 bbWeight=2 PerfScore 19.00
G_M31524_IG09: ; bbWeight=2, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
bgeu a3, a2, G_M31524_IG13
;; size=4 bbWeight=2 PerfScore 7.00
G_M31524_IG10: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
- slli a4, a3, 1
- add t6, a0, a4
- lhu a5, 0xD1FFAB1E(t6)
+ sh1add a4, a3, a0
+ lhu a4, 0xD1FFAB1E(a4)
+ sext.w a5, a4
sext.w a6, a5
- sext.w a7, a6
- addi t0, zero, 0xD1FFAB1E
- bltu t0, a7, G_M31524_IG13
- ;; size=28 bbWeight=4 PerfScore 36.00
+ addi a7, zero, 0xD1FFAB1E
+ bltu a7, a6, G_M31524_IG13
+ ;; size=24 bbWeight=4 PerfScore 34.00
G_M31524_IG11: ; bbWeight=2, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
- addiw a7, a6, 0xD1FFAB1E
- addi t0, zero, 0xD1FFAB1E
- bltu t0, a7, G_M31524_IG12
addiw a6, a5, 0xD1FFAB1E
+ addi a7, zero, 0xD1FFAB1E
+ bltu a7, a6, G_M31524_IG12
+ addiw a5, a4, 0xD1FFAB1E
;; size=16 bbWeight=2 PerfScore 10.00
G_M31524_IG12: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
- zext.h a5, a6
- add t6, a1, a4
- sh a5, 0xD1FFAB1E(t6)
+ zext.h a4, a5
+ sh1add a5, a3, a1
+ sh a4, 0xD1FFAB1E(a5)
addi a3, a3, 0xD1FFAB1E
bltu a3, a2, G_M31524_IG10
;; size=20 bbWeight=4 PerfScore 36.00
@@ -431,7 +425,7 @@ RWD08 dq 0025002500250025h
RWD16 dq FF80FF80FF80FF80h
-; Total bytes of code 348, prolog size 16, PerfScore 306.75, instruction count 76, allocated bytes for code 348 (MethodHash=91c584db) for method System.Text.Ascii:ChangeCase[ushort,ushort,System.Text.Ascii+ToLowerConversion](ptr,ptr,nuint):nuint (FullOpts)
+; Total bytes of code 336, prolog size 16, PerfScore 302.75, instruction count 73, allocated bytes for code 336 (MethodHash=91c584db) for method System.Text.Ascii:ChangeCase[ushort,ushort,System.Text.Ascii+ToLowerConversion](ptr,ptr,nuint):nuint (FullOpts)
; ============================================================
Unwind Info:
@@ -442,7 +436,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 174 (0x000ae) Actual length = 348 (0x00015c)
+ Function Length : 168 (0x000a8) Actual length = 336 (0x000150)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)-14 (-3.33%) : 492.dasm - System.SpanHelpers:SequenceCompareTo(byref,int,byref,int):int (FullOpts)@@ -9,26 +9,23 @@
; Final local variable assignments
;
; V00 arg0 [V00,T01] ( 6, 11.50) byref -> s1 single-def
-; V01 arg1 [V01,T07] ( 6, 5 ) int -> s3 single-def
+; V01 arg1 [V01,T05] ( 6, 5 ) int -> s3 single-def
; V02 arg2 [V02,T02] ( 6, 11.50) byref -> s2 single-def
-; V03 arg3 [V03,T08] ( 6, 5 ) int -> s4 single-def
-; V04 loc0 [V04,T12] ( 2, 1.50) int -> a0
-; V05 loc1 [V05,T05] ( 6, 10.50) long -> a1
-; V06 loc2 [V06,T00] ( 13, 35 ) long -> a2
+; V03 arg3 [V03,T06] ( 6, 5 ) int -> s4 single-def
+; V04 loc0 [V04,T09] ( 2, 1.50) int -> a0
+; V05 loc1 [V05,T03] ( 6, 10.50) long -> a1
+; V06 loc2 [V06,T00] ( 16, 43.50) long -> a2
;* V07 loc3 [V07 ] ( 0, 0 ) long -> zero-ref
-; V08 loc4 [V08,T06] ( 3, 8.50) int -> a3
+; V08 loc4 [V08,T04] ( 3, 8.50) int -> a3
;# V09 OutArgs [V09 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
-; V10 tmp1 [V10,T09] ( 3, 1.50) int -> s3
+; V10 tmp1 [V10,T07] ( 3, 1.50) int -> s3
;* V11 tmp2 [V11 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V12 tmp3 [V12 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V13 tmp4 [V13 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V14 tmp5 [V14 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V15 tmp6 [V15 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V16 tmp7 [V16 ] ( 0, 0 ) ushort -> zero-ref "Inlining Arg"
-; V17 cse0 [V17,T03] ( 3, 12 ) long -> a3 "CSE #01: aggressive"
-; V18 cse1 [V18,T04] ( 3, 12 ) long -> a3 "CSE #04: aggressive"
-; V19 cse2 [V19,T10] ( 3, 1.50) long -> a4 "CSE #02: moderate"
-; V20 cse3 [V20,T11] ( 3, 1.50) long -> a3 "CSE #03: moderate"
+; V17 cse0 [V17,T08] ( 3, 1.50) long -> a3 "CSE #01: moderate"
;
; Lcl frame size = 0
Frame info. #outsz=0; #framesz=48; lcl=0
@@ -113,51 +110,55 @@ G_M65109_IG09: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=40200 {s1 s2
bltu a1, a3, G_M65109_IG11
;; size=16 bbWeight=0.50 PerfScore 2.50
G_M65109_IG10: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=40200 {s1 s2}, byref, isz
- slli a3, a2, 1
- add t6, s1, a3
- ; byrRegs +[t6]
- ld a4, 0xD1FFAB1E(t6)
- add t6, s2, a3
- ld a3, 0xD1FFAB1E(t6)
- bne a4, a3, G_M65109_IG11
+ sh1add a3, a2, s1
+ ; byrRegs +[a3]
+ ld a3, 0xD1FFAB1E(a3)
+ ; byrRegs -[a3]
+ sh1add a4, a2, s2
+ ; byrRegs +[a4]
+ ld a4, 0xD1FFAB1E(a4)
+ ; byrRegs -[a4]
+ bne a3, a4, G_M65109_IG11
addi a2, a2, 0xD1FFAB1E
addi a3, a2, 0xD1FFAB1E
bgeu a1, a3, G_M65109_IG10
- ;; size=36 bbWeight=4 PerfScore 54.00
+ ;; size=32 bbWeight=4 PerfScore 52.00
G_M65109_IG11: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=40200 {s1 s2}, byref, isz
- ; byrRegs -[t6]
addi a3, a2, 0xD1FFAB1E
bltu a1, a3, G_M65109_IG12
- slli a4, a2, 1
- add t6, s1, a4
- ; byrRegs +[t6]
- lw a5, 0xD1FFAB1E(t6)
- sext.w a5, a5
- add t6, s2, a4
- lw a4, 0xD1FFAB1E(t6)
+ sh1add a4, a2, s1
+ ; byrRegs +[a4]
+ lw a4, 0xD1FFAB1E(a4)
+ ; byrRegs -[a4]
sext.w a4, a4
- bne a5, a4, G_M65109_IG12
+ sh1add a5, a2, s2
+ ; byrRegs +[a5]
+ lw a5, 0xD1FFAB1E(a5)
+ ; byrRegs -[a5]
+ sext.w a5, a5
+ bne a4, a5, G_M65109_IG12
mv a2, a3
- ;; size=44 bbWeight=0.50 PerfScore 7.25
+ ;; size=40 bbWeight=0.50 PerfScore 7.00
G_M65109_IG12: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=40200 {s1 s2}, byref, isz
- ; byrRegs -[t6]
bgeu a2, a1, G_M65109_IG14
;; size=4 bbWeight=1 PerfScore 3.50
G_M65109_IG13: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=40200 {s1 s2}, byref, isz
- slli a3, a2, 1
- add t6, s1, a3
- ; byrRegs +[t6]
- lhu a4, 0xD1FFAB1E(t6)
- add t6, s2, a3
- lhu a3, 0xD1FFAB1E(t6)
- subw a3, a4, a3
+ sh1add a3, a2, s1
+ ; byrRegs +[a3]
+ lhu a3, 0xD1FFAB1E(a3)
+ ; byrRegs -[a3]
+ sh1add a4, a2, s2
+ ; byrRegs +[a4]
+ lhu a4, 0xD1FFAB1E(a4)
+ ; byrRegs -[a4]
+ subw a3, a3, a4
sext.w a4, a3
bnez a4, G_M65109_IG15
addi a2, a2, 0xD1FFAB1E
bltu a2, a1, G_M65109_IG13
- ;; size=40 bbWeight=4 PerfScore 64.00
+ ;; size=34 bbWeight=4 PerfScore 62.00
G_M65109_IG14: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, epilog, nogc
- ; byrRegs -[s1 s2 t6]
+ ; byrRegs -[s1 s2]
ld s4, 40(sp)
ld s3, 32(sp)
ld s2, 24(sp)
@@ -179,7 +180,7 @@ G_M65109_IG16: ; bbWeight=0.50, epilog, nogc, extend
addi sp, sp, 48
ret ;; size=32 bbWeight=0.50 PerfScore 7.75
-; Total bytes of code 420, prolog size 48, PerfScore 207.25, instruction count 85, allocated bytes for code 420 (MethodHash=bda601aa) for method System.SpanHelpers:SequenceCompareTo(byref,int,byref,int):int (FullOpts)
+; Total bytes of code 406, prolog size 48, PerfScore 203.00, instruction count 82, allocated bytes for code 406 (MethodHash=bda601aa) for method System.SpanHelpers:SequenceCompareTo(byref,int,byref,int):int (FullOpts)
; ============================================================
Unwind Info:
@@ -190,7 +191,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 210 (0x000d2) Actual length = 420 (0x0001a4)
+ Function Length : 203 (0x000cb) Actual length = 406 (0x000196)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)+20 (+3.11%) : 992.dasm - System.Number+BigInteger:HeuristicDivide(byref,byref):uint (FullOpts)@@ -8,32 +8,32 @@
; 0 inlinees with PGO data; 40 single block inlinees; 10 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T24] ( 7, 5 ) byref -> s1 single-def
-; V01 arg1 [V01,T25] ( 5, 4 ) byref -> a1 single-def
+; V00 arg0 [V00,T22] ( 7, 5 ) byref -> s1 single-def
+; V01 arg1 [V01,T23] ( 5, 4 ) byref -> a1 single-def
; V02 loc0 [V02,T00] ( 15, 36 ) int -> s2
-; V03 loc1 [V03,T29] ( 3, 1.50) int -> a0
-; V04 loc2 [V04,T27] ( 6, 3 ) int -> s5
+; V03 loc1 [V03,T26] ( 4, 2 ) int -> a0
+; V04 loc2 [V04,T25] ( 6, 3 ) int -> s5
;* V05 loc3 [V05 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V06 loc4 [V06 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
-; V07 loc5 [V07,T02] ( 6, 20.50) int -> a0
-; V08 loc6 [V08,T13] ( 3, 8.50) long -> a2
-; V09 loc7 [V09,T14] ( 3, 8.50) long -> a3
-; V10 loc8 [V10,T09] ( 3, 12 ) long -> a5
-; V11 loc9 [V11,T10] ( 3, 12 ) long -> a5
+; V07 loc5 [V07,T01] ( 8, 28.50) int -> a0
+; V08 loc6 [V08,T11] ( 3, 8.50) long -> a2
+; V09 loc7 [V09,T12] ( 3, 8.50) long -> a3
+; V10 loc8 [V10,T07] ( 3, 12 ) long -> a5
+; V11 loc9 [V11,T08] ( 3, 12 ) long -> a5
;* V12 loc10 [V12 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V13 loc11 [V13 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V14 loc12 [V14 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V15 loc13 [V15 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
-; V16 loc14 [V16,T03] ( 6, 20.50) int -> a0
-; V17 loc15 [V17,T15] ( 3, 8.50) long -> a1
-; V18 loc16 [V18,T11] ( 3, 12 ) long -> a2
+; V16 loc14 [V16,T02] ( 8, 28.50) int -> a0
+; V17 loc15 [V17,T13] ( 3, 8.50) long -> a1
+; V18 loc16 [V18,T09] ( 3, 12 ) long -> a2
;* V19 loc17 [V19 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V20 loc18 [V20 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V21 loc19 [V21 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V22 loc20 [V22 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;# V23 OutArgs [V23 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
-; V24 tmp1 [V24,T28] ( 2, 2 ) int -> a2 "impAppendStmt"
-; V25 tmp2 [V25,T08] ( 2, 16 ) long -> a2 "impAppendStmt"
+; V24 tmp1 [V24,T27] ( 2, 2 ) int -> a2 "impAppendStmt"
+; V25 tmp2 [V25,T06] ( 2, 16 ) long -> a2 "impAppendStmt"
;* V26 tmp3 [V26 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V27 tmp4 [V27 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp" <System.Span`1[uint]>
;* V28 tmp5 [V28 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
@@ -74,34 +74,31 @@
;* V63 tmp40 [V63 ] ( 0, 0 ) int -> zero-ref "field V21._length (fldOffset=0x8)" P-INDEP
;* V64 tmp41 [V64 ] ( 0, 0 ) byref -> zero-ref "field V22._reference (fldOffset=0x0)" P-INDEP
;* V65 tmp42 [V65 ] ( 0, 0 ) int -> zero-ref "field V22._length (fldOffset=0x8)" P-INDEP
-; V66 tmp43 [V66,T31] ( 2, 1 ) byref -> a2 single-def "field V27._reference (fldOffset=0x0)" P-INDEP
+; V66 tmp43 [V66,T28] ( 2, 1 ) byref -> a2 single-def "field V27._reference (fldOffset=0x0)" P-INDEP
;* V67 tmp44 [V67 ] ( 0, 0 ) int -> zero-ref "field V27._length (fldOffset=0x8)" P-INDEP
-; V68 tmp45 [V68,T32] ( 2, 1 ) byref -> a3 single-def "field V29._reference (fldOffset=0x0)" P-INDEP
+; V68 tmp45 [V68,T29] ( 2, 1 ) byref -> a3 single-def "field V29._reference (fldOffset=0x0)" P-INDEP
;* V69 tmp46 [V69 ] ( 0, 0 ) int -> zero-ref "field V29._length (fldOffset=0x8)" P-INDEP
-; V70 tmp47 [V70,T16] ( 2, 8 ) byref -> a5 "field V31._reference (fldOffset=0x0)" P-INDEP
+; V70 tmp47 [V70,T14] ( 2, 8 ) byref -> a5 "field V31._reference (fldOffset=0x0)" P-INDEP
;* V71 tmp48 [V71 ] ( 0, 0 ) int -> zero-ref "field V31._length (fldOffset=0x8)" P-INDEP
-; V72 tmp49 [V72,T17] ( 2, 8 ) byref -> a7 "field V33._reference (fldOffset=0x0)" P-INDEP
+; V72 tmp49 [V72,T15] ( 2, 8 ) byref -> a6 "field V33._reference (fldOffset=0x0)" P-INDEP
;* V73 tmp50 [V73 ] ( 0, 0 ) int -> zero-ref "field V33._length (fldOffset=0x8)" P-INDEP
-; V74 tmp51 [V74,T18] ( 2, 8 ) byref -> a7 "field V35._reference (fldOffset=0x0)" P-INDEP
+; V74 tmp51 [V74,T16] ( 2, 8 ) byref -> a6 "field V35._reference (fldOffset=0x0)" P-INDEP
;* V75 tmp52 [V75 ] ( 0, 0 ) int -> zero-ref "field V35._length (fldOffset=0x8)" P-INDEP
-; V76 tmp53 [V76,T19] ( 2, 8 ) byref -> a0 "field V37._reference (fldOffset=0x0)" P-INDEP
+; V76 tmp53 [V76,T17] ( 2, 8 ) byref -> a0 "field V37._reference (fldOffset=0x0)" P-INDEP
;* V77 tmp54 [V77 ] ( 0, 0 ) int -> zero-ref "field V37._length (fldOffset=0x8)" P-INDEP
-; V78 tmp55 [V78,T20] ( 2, 8 ) byref -> a2 "field V39._reference (fldOffset=0x0)" P-INDEP
+; V78 tmp55 [V78,T18] ( 2, 8 ) byref -> a2 "field V39._reference (fldOffset=0x0)" P-INDEP
;* V79 tmp56 [V79 ] ( 0, 0 ) int -> zero-ref "field V39._length (fldOffset=0x8)" P-INDEP
-; V80 tmp57 [V80,T21] ( 2, 8 ) byref -> a4 "field V41._reference (fldOffset=0x0)" P-INDEP
+; V80 tmp57 [V80,T19] ( 2, 8 ) byref -> a3 "field V41._reference (fldOffset=0x0)" P-INDEP
;* V81 tmp58 [V81 ] ( 0, 0 ) int -> zero-ref "field V41._length (fldOffset=0x8)" P-INDEP
-; V82 tmp59 [V82,T22] ( 2, 8 ) byref -> a4 "field V43._reference (fldOffset=0x0)" P-INDEP
+; V82 tmp59 [V82,T20] ( 2, 8 ) byref -> a3 "field V43._reference (fldOffset=0x0)" P-INDEP
;* V83 tmp60 [V83 ] ( 0, 0 ) int -> zero-ref "field V43._length (fldOffset=0x8)" P-INDEP
-; V84 tmp61 [V84,T23] ( 2, 8 ) byref -> a0 "field V45._reference (fldOffset=0x0)" P-INDEP
+; V84 tmp61 [V84,T21] ( 2, 8 ) byref -> a0 "field V45._reference (fldOffset=0x0)" P-INDEP
;* V85 tmp62 [V85 ] ( 0, 0 ) int -> zero-ref "field V45._length (fldOffset=0x8)" P-INDEP
-; V86 cse0 [V86,T30] ( 3, 1.50) long -> a0 "CSE #02: moderate"
-; V87 cse1 [V87,T04] ( 4, 16 ) long -> a6 "CSE #07: aggressive"
-; V88 cse2 [V88,T05] ( 4, 16 ) long -> a3 "CSE #10: aggressive"
-; V89 cse3 [V89,T01] ( 8, 25 ) byref -> s3 "CSE #05: aggressive"
-; V90 cse4 [V90,T12] ( 4, 9 ) byref -> s4 "CSE #03: moderate"
-; V91 cse5 [V91,T06] ( 4, 16 ) int -> a2 "CSE #08: aggressive"
-; V92 cse6 [V92,T07] ( 4, 16 ) int -> a1 "CSE #11: aggressive"
-; V93 cse7 [V93,T26] ( 2, 4.50) long -> a4 hoist "CSE #04: moderate"
+; V86 cse0 [V86,T03] ( 8, 25 ) byref -> s3 "CSE #03: aggressive"
+; V87 cse1 [V87,T10] ( 4, 9 ) byref -> s4 "CSE #01: moderate"
+; V88 cse2 [V88,T04] ( 4, 16 ) int -> a2 "CSE #04: aggressive"
+; V89 cse3 [V89,T05] ( 4, 16 ) int -> a1 "CSE #05: aggressive"
+; V90 cse4 [V90,T24] ( 2, 4.50) long -> a4 hoist "CSE #02: moderate"
;
; Lcl frame size = 8
Frame info. #outsz=0; #framesz=64; lcl=8
@@ -137,8 +134,8 @@ G_M38309_IG03: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0A00 {s1 a1}
sext.w a4, a3
sext.w a5, a0
bgeu a5, a4, G_M38309_IG17
- slli.uw a0, a0, 2
- add t6, a2, a0
+ slli.uw a3, a0, 2
+ add t6, a2, a3
; byrRegs +[t6]
lw a2, 0xD1FFAB1E(t6)
; byrRegs -[a2]
@@ -146,6 +143,7 @@ G_M38309_IG03: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0A00 {s1 a1}
; byrRegs +[s4]
mv a3, s4
; byrRegs +[a3]
+ slli.uw a0, a0, 2
add t6, a3, a0
lw a0, 0xD1FFAB1E(t6)
addiw a0, a0, 0xD1FFAB1E
@@ -158,7 +156,7 @@ G_M38309_IG03: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0A00 {s1 a1}
mv a3, zero
; byrRegs -[a3]
zext.w a4, s5
- ;; size=92 bbWeight=0.50 PerfScore 22.00
+ ;; size=96 bbWeight=0.50 PerfScore 22.25
G_M38309_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=180A00 {s1 a1 s3 s4}, byref, isz
; byrRegs -[t6]
mv a5, s4
@@ -176,28 +174,31 @@ G_M38309_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=180A00 {s1 a1 s
mul a5, a5, a4
add a5, a5, a3
srli a3, a5, 32
- mv a7, s3
- ; byrRegs +[a7]
- add t6, a7, a6
- lw a7, 0xD1FFAB1E(t6)
- ; byrRegs -[a7]
- zext.w a7, a7
+ mv a6, s3
+ ; byrRegs +[a6]
+ slli.uw a7, a0, 2
+ add t6, a6, a7
+ lw a6, 0xD1FFAB1E(t6)
+ ; byrRegs -[a6]
+ zext.w a6, a6
zext.w a5, a5
- sub a5, a7, a5
+ sub a5, a6, a5
sub a5, a5, a2
srli a2, a5, 32
andi a2, a2, 1
- mv a7, s3
- ; byrRegs +[a7]
- add t6, a7, a6
+ mv a6, s3
+ ; byrRegs +[a6]
+ slli.uw a7, a0, 2
+ add t6, a6, a7
sw a5, 0xD1FFAB1E(t6)
addiw a0, a0, 0xD1FFAB1E
sext.w a5, a0
sext.w a6, s2
+ ; byrRegs -[a6]
blt a5, a6, G_M38309_IG04
- ;; size=108 bbWeight=4 PerfScore 112.00
+ ;; size=116 bbWeight=4 PerfScore 116.00
G_M38309_IG05: ; bbWeight=0.25, gcrefRegs=0000 {}, byrefRegs=180A00 {s1 a1 s3 s4}, byref, isz
- ; byrRegs -[a7 t6]
+ ; byrRegs -[t6]
sext.w a0, s2
bge zero, a0, G_M38309_IG07
;; size=8 bbWeight=0.25 PerfScore 1.00
@@ -255,27 +256,30 @@ G_M38309_IG09: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=180200 {s1 s3 s
lw a2, 0xD1FFAB1E(t6)
; byrRegs -[a2]
zext.w a2, a2
- mv a4, s4
- ; byrRegs +[a4]
- add t6, a4, a3
- lw a4, 0xD1FFAB1E(t6)
- ; byrRegs -[a4]
- zext.w a4, a4
- sub a2, a2, a4
+ mv a3, s4
+ ; byrRegs +[a3]
+ slli.uw a4, a0, 2
+ add t6, a3, a4
+ lw a3, 0xD1FFAB1E(t6)
+ ; byrRegs -[a3]
+ zext.w a3, a3
+ sub a2, a2, a3
sub a2, a2, a1
srli a1, a2, 32
andi a1, a1, 1
- mv a4, s3
- ; byrRegs +[a4]
- add t6, a4, a3
+ mv a3, s3
+ ; byrRegs +[a3]
+ slli.uw a4, a0, 2
+ add t6, a3, a4
sw a2, 0xD1FFAB1E(t6)
addiw a0, a0, 0xD1FFAB1E
sext.w a2, a0
sext.w a3, s2
+ ; byrRegs -[a3]
blt a2, a3, G_M38309_IG09
- ;; size=92 bbWeight=4 PerfScore 98.00
+ ;; size=100 bbWeight=4 PerfScore 102.00
G_M38309_IG10: ; bbWeight=0.25, gcrefRegs=0000 {}, byrefRegs=80200 {s1 s3}, byref, isz
- ; byrRegs -[a4 s4 t6]
+ ; byrRegs -[s4 t6]
sext.w a0, s2
bge zero, a0, G_M38309_IG12
;; size=8 bbWeight=0.25 PerfScore 1.00
@@ -342,7 +346,7 @@ G_M38309_IG18: ; bbWeight=0, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
ebreak
;; size=12 bbWeight=0 PerfScore 0.00
-; Total bytes of code 644, prolog size 40, PerfScore 442.00, instruction count 157, allocated bytes for code 644 (MethodHash=daac6a5a) for method System.Number+BigInteger:HeuristicDivide(byref,byref):uint (FullOpts)
+; Total bytes of code 664, prolog size 40, PerfScore 450.25, instruction count 162, allocated bytes for code 664 (MethodHash=daac6a5a) for method System.Number+BigInteger:HeuristicDivide(byref,byref):uint (FullOpts)
; ============================================================
Unwind Info:
@@ -353,7 +357,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 322 (0x00142) Actual length = 644 (0x000284)
+ Function Length : 332 (0x0014c) Actual length = 664 (0x000298)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)+4 (+1.46%) : 993.dasm - System.Number+BigInteger:Multiply10():this (FullOpts)@@ -8,10 +8,10 @@
; 0 inlinees with PGO data; 15 single block inlinees; 4 inlinees without PGO data
; Final local variable assignments
;
-; V00 this [V00,T05] ( 6, 8 ) byref -> s1 this single-def
-; V01 loc0 [V01,T00] ( 8, 21.50) int -> a1
-; V02 loc1 [V02,T09] ( 4, 5.50) int -> a0
-; V03 loc2 [V03,T06] ( 5, 9.50) long -> a2
+; V00 this [V00,T04] ( 6, 8 ) byref -> s1 this single-def
+; V01 loc0 [V01,T00] ( 9, 25.50) int -> a1
+; V02 loc1 [V02,T08] ( 4, 5.50) int -> a0
+; V03 loc2 [V03,T05] ( 5, 9.50) long -> a2
; V04 loc3 [V04,T02] ( 3, 12 ) long -> a4
; V05 loc4 [V05,T03] ( 3, 12 ) long -> a4
;* V06 loc5 [V06 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
@@ -32,15 +32,14 @@
;* V21 tmp12 [V21 ] ( 0, 0 ) int -> zero-ref "field V07._length (fldOffset=0x8)" P-INDEP
;* V22 tmp13 [V22 ] ( 0, 0 ) byref -> zero-ref single-def "field V08._reference (fldOffset=0x0)" P-INDEP
;* V23 tmp14 [V23 ] ( 0, 0 ) int -> zero-ref "field V08._length (fldOffset=0x8)" P-INDEP
-; V24 tmp15 [V24,T07] ( 2, 8 ) byref -> a4 "field V11._reference (fldOffset=0x0)" P-INDEP
+; V24 tmp15 [V24,T06] ( 2, 8 ) byref -> a4 "field V11._reference (fldOffset=0x0)" P-INDEP
;* V25 tmp16 [V25 ] ( 0, 0 ) int -> zero-ref "field V11._length (fldOffset=0x8)" P-INDEP
-; V26 tmp17 [V26,T08] ( 2, 8 ) byref -> a6 "field V13._reference (fldOffset=0x0)" P-INDEP
+; V26 tmp17 [V26,T07] ( 2, 8 ) byref -> a5 "field V13._reference (fldOffset=0x0)" P-INDEP
;* V27 tmp18 [V27 ] ( 0, 0 ) int -> zero-ref "field V13._length (fldOffset=0x8)" P-INDEP
-; V28 tmp19 [V28,T11] ( 2, 1 ) byref -> a3 single-def "field V17._reference (fldOffset=0x0)" P-INDEP
+; V28 tmp19 [V28,T10] ( 2, 1 ) byref -> a3 single-def "field V17._reference (fldOffset=0x0)" P-INDEP
;* V29 tmp20 [V29 ] ( 0, 0 ) int -> zero-ref "field V17._length (fldOffset=0x8)" P-INDEP
-; V30 cse0 [V30,T04] ( 3, 12 ) long -> a5 "CSE #04: aggressive"
-; V31 cse1 [V31,T01] ( 4, 12.50) byref -> a3 "CSE #02: aggressive"
-; V32 cse2 [V32,T10] ( 3, 2.50) int -> a0 "CSE #01: aggressive"
+; V30 cse0 [V30,T01] ( 4, 12.50) byref -> a3 "CSE #02: aggressive"
+; V31 cse1 [V31,T09] ( 3, 2.50) int -> a0 "CSE #01: aggressive"
;
; Lcl frame size = 8
Frame info. #outsz=0; #framesz=32; lcl=8
@@ -78,21 +77,23 @@ G_M24569_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0200 {s1}, byre
lw a4, 0xD1FFAB1E(t6)
; byrRegs -[a4]
zext.w a4, a4
- slli a6, a4, 1
- sh3add a4, a4, a6
+ slli a5, a4, 1
+ sh3add a4, a4, a5
add a4, a4, a2
srli a2, a4, 32
- mv a6, a3
- ; byrRegs +[a6]
- add t6, a6, a5
+ mv a5, a3
+ ; byrRegs +[a5]
+ slli.uw a6, a1, 2
+ add t6, a5, a6
sw a4, 0xD1FFAB1E(t6)
addiw a1, a1, 0xD1FFAB1E
sext.w a4, a1
sext.w a5, a0
+ ; byrRegs -[a5]
blt a4, a5, G_M24569_IG04
- ;; size=82 bbWeight=4 PerfScore 86.00
+ ;; size=86 bbWeight=4 PerfScore 88.00
G_M24569_IG05: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=2200 {s1 a3}, byref, isz
- ; byrRegs -[a6 t6]
+ ; byrRegs -[t6]
beqz a2, G_M24569_IG07
sext.w a4, a0
addi a5, zero, 0xD1FFAB1E
@@ -142,7 +143,7 @@ G_M24569_IG08: ; bbWeight=0, gcVars=0000000000000000 {}, gcrefRegs=0000 {
ebreak
;; size=12 bbWeight=0 PerfScore 0.00
-; Total bytes of code 274, prolog size 24, PerfScore 138.00, instruction count 59, allocated bytes for code 274 (MethodHash=90daa006) for method System.Number+BigInteger:Multiply10():this (FullOpts)
+; Total bytes of code 278, prolog size 24, PerfScore 140.00, instruction count 60, allocated bytes for code 278 (MethodHash=90daa006) for method System.Number+BigInteger:Multiply10():this (FullOpts)
; ============================================================
Unwind Info:
@@ -153,7 +154,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 137 (0x00089) Actual length = 274 (0x000112)
+ Function Length : 139 (0x0008b) Actual length = 278 (0x000116)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)+4 (+0.84%) : 990.dasm - System.Number+BigInteger:Multiply(byref,uint,byref) (FullOpts)@@ -8,26 +8,26 @@
; 0 inlinees with PGO data; 23 single block inlinees; 8 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T04] ( 6, 8 ) byref -> a0 single-def
-; V01 arg1 [V01,T08] ( 6, 4 ) int -> a1 single-def
+; V00 arg0 [V00,T03] ( 6, 8 ) byref -> a0 single-def
+; V01 arg1 [V01,T07] ( 6, 4 ) int -> a1 single-def
; V02 arg2 [V02,T01] ( 14, 15 ) byref -> s1 single-def
-; V03 loc0 [V03,T09] ( 5, 6 ) int -> s2
-; V04 loc1 [V04,T00] ( 8, 21.50) int -> a2
-; V05 loc2 [V05,T05] ( 5, 9.50) int -> a3
-; V06 loc3 [V06,T14] ( 3, 1.50) int -> a0
+; V03 loc0 [V03,T08] ( 5, 6 ) int -> s2
+; V04 loc1 [V04,T00] ( 9, 25.50) int -> a2
+; V05 loc2 [V05,T04] ( 5, 9.50) int -> a3
+; V06 loc3 [V06,T13] ( 3, 1.50) int -> a0
; V07 loc4 [V07,T02] ( 3, 12 ) long -> a1
;* V08 loc5 [V08 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V09 loc6 [V09 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V10 loc7 [V10 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;# V11 OutArgs [V11 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
-; V12 tmp1 [V12,T15] ( 3, 1.50) int -> a2 "Inline return value spill temp"
+; V12 tmp1 [V12,T14] ( 3, 1.50) int -> a2 "Inline return value spill temp"
;* V13 tmp2 [V13 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
-; V14 tmp3 [V14,T11] ( 4, 4 ) long -> a0 "Inlining Arg"
-; V15 tmp4 [V15,T13] ( 3, 3 ) int -> a0 "Inlining Arg"
+; V14 tmp3 [V14,T10] ( 4, 4 ) long -> a0 "Inlining Arg"
+; V15 tmp4 [V15,T12] ( 3, 3 ) int -> a0 "Inlining Arg"
;* V16 tmp5 [V16 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V17 tmp6 [V17 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V18 tmp7 [V18 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
-; V19 tmp8 [V19,T16] ( 3, 1.50) int -> a2 "Inline stloc first use temp"
+; V19 tmp8 [V19,T15] ( 3, 1.50) int -> a2 "Inline stloc first use temp"
;* V20 tmp9 [V20 ] ( 0, 0 ) byref -> zero-ref "impAppendStmt"
;* V21 tmp10 [V21 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V22 tmp11 [V22 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
@@ -46,16 +46,15 @@
;* V35 tmp24 [V35 ] ( 0, 0 ) int -> zero-ref "field V09._length (fldOffset=0x8)" P-INDEP
;* V36 tmp25 [V36 ] ( 0, 0 ) byref -> zero-ref single-def "field V10._reference (fldOffset=0x0)" P-INDEP
;* V37 tmp26 [V37 ] ( 0, 0 ) int -> zero-ref "field V10._length (fldOffset=0x8)" P-INDEP
-; V38 tmp27 [V38,T06] ( 2, 8 ) byref -> a1 "field V25._reference (fldOffset=0x0)" P-INDEP
+; V38 tmp27 [V38,T05] ( 2, 8 ) byref -> a1 "field V25._reference (fldOffset=0x0)" P-INDEP
;* V39 tmp28 [V39 ] ( 0, 0 ) int -> zero-ref "field V25._length (fldOffset=0x8)" P-INDEP
-; V40 tmp29 [V40,T07] ( 2, 8 ) byref -> a3 "field V27._reference (fldOffset=0x0)" P-INDEP
+; V40 tmp29 [V40,T06] ( 2, 8 ) byref -> a3 "field V27._reference (fldOffset=0x0)" P-INDEP
;* V41 tmp30 [V41 ] ( 0, 0 ) int -> zero-ref "field V27._length (fldOffset=0x8)" P-INDEP
-; V42 tmp31 [V42,T18] ( 2, 1 ) byref -> a0 single-def "field V31._reference (fldOffset=0x0)" P-INDEP
+; V42 tmp31 [V42,T17] ( 2, 1 ) byref -> a0 single-def "field V31._reference (fldOffset=0x0)" P-INDEP
;* V43 tmp32 [V43 ] ( 0, 0 ) int -> zero-ref "field V31._length (fldOffset=0x8)" P-INDEP
-; V44 cse0 [V44,T03] ( 3, 12 ) long -> a4 "CSE #07: aggressive"
-; V45 cse1 [V45,T12] ( 5, 3.50) int -> s2 "CSE #01: moderate"
-; V46 cse2 [V46,T17] ( 3, 1.50) long -> a1 "CSE #02: moderate"
-; V47 cse3 [V47,T10] ( 4, 5.50) long -> s3 hoist multi-def "CSE #03: aggressive"
+; V44 cse0 [V44,T11] ( 5, 3.50) int -> s2 "CSE #01: moderate"
+; V45 cse1 [V45,T16] ( 3, 1.50) long -> a1 "CSE #02: moderate"
+; V46 cse2 [V46,T09] ( 4, 5.50) long -> s3 hoist multi-def "CSE #03: aggressive"
;
; Lcl frame size = 8
Frame info. #outsz=0; #framesz=48; lcl=8
@@ -105,6 +104,7 @@ G_M6434_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0600 {s1 a0}, by
lb zero, 0xD1FFAB1E(s1)
addi a3, s1, 0xD1FFAB1E
; byrRegs +[a3]
+ slli.uw a4, a2, 2
add t6, a3, a4
sw a1, 0xD1FFAB1E(t6)
srli a1, a1, 32
@@ -114,7 +114,7 @@ G_M6434_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0600 {s1 a0}, by
sext.w a1, a2
sext.w a4, s2
blt a1, a4, G_M6434_IG04
- ;; size=86 bbWeight=4 PerfScore 104.00
+ ;; size=90 bbWeight=4 PerfScore 106.00
G_M6434_IG05: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0200 {s1}, byref, isz
; byrRegs -[a0 t6]
sext.w a0, s2
@@ -231,7 +231,7 @@ G_M6434_IG15: ; bbWeight=0, gcVars=0000000000000000 {}, gcrefRegs=0000 {}
ebreak
;; size=12 bbWeight=0 PerfScore 0.00
-; Total bytes of code 478, prolog size 32, PerfScore 204.50, instruction count 106, allocated bytes for code 478 (MethodHash=71b0e6dd) for method System.Number+BigInteger:Multiply(byref,uint,byref) (FullOpts)
+; Total bytes of code 482, prolog size 32, PerfScore 206.50, instruction count 107, allocated bytes for code 482 (MethodHash=71b0e6dd) for method System.Number+BigInteger:Multiply(byref,uint,byref) (FullOpts)
; ============================================================
Unwind Info:
@@ -242,7 +242,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 239 (0x000ef) Actual length = 478 (0x0001de)
+ Function Length : 241 (0x000f1) Actual length = 482 (0x0001e2)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)DetailsSize improvements/regressions per collection
PerfScore improvements/regressions per collection
Context information
jit-analyze output |
This was referenced Dec 2, 2025
Open
am11
added
area-CodeGen-coreclr
Contributor
|
Tagging subscribers to this area: @JulieLeeMSFT, @jakobbotsch |
Member
Now that big change #119203 has been merged, you can merge upstream main into your branch and reanalyze diffs. |
Contributor
Author
Thanks for informing me. I re-ran the diffs and the result seems almost identical. Diffs are based on 127,090 contexts (105,109 MinOpts, 21,981 FullOpts). Overall (-366 bytes)
MinOpts (+0 bytes)
FullOpts (-366 bytes)
Example diffsbenchmark.mch-12 (-3.45%) : 799.dasm - System.Text.Ascii:ChangeCase[ushort,ushort,System.Text.Ascii+ToLowerConversion](ptr,ptr,nuint):nuint (FullOpts)@@ -11,13 +11,13 @@
; V00 arg0 [V00,T06] ( 5, 10 ) long -> a0 single-def
; V01 arg1 [V01,T04] ( 5, 14 ) long -> a1 single-def
; V02 arg2 [V02,T03] ( 6, 16 ) long -> a2 single-def
-;* V03 loc0 [V03,T14] ( 0, 0 ) ubyte -> zero-ref
-;* V04 loc1 [V04,T15] ( 0, 0 ) ubyte -> zero-ref
-;* V05 loc2 [V05,T16] ( 0, 0 ) ubyte -> zero-ref
-;* V06 loc3 [V06,T17] ( 0, 0 ) ubyte -> zero-ref
-;* V07 loc4 [V07,T18] ( 0, 0 ) ubyte -> zero-ref
+;* V03 loc0 [V03,T11] ( 0, 0 ) ubyte -> zero-ref
+;* V04 loc1 [V04,T12] ( 0, 0 ) ubyte -> zero-ref
+;* V05 loc2 [V05,T13] ( 0, 0 ) ubyte -> zero-ref
+;* V06 loc3 [V06,T14] ( 0, 0 ) ubyte -> zero-ref
+;* V07 loc4 [V07,T15] ( 0, 0 ) ubyte -> zero-ref
;* V08 loc5 [V08 ] ( 0, 0 ) int -> zero-ref
-; V09 loc6 [V09,T00] ( 15, 47.25) long -> a3
+; V09 loc6 [V09,T00] ( 18, 59.25) long -> a3
;* V10 loc7 [V10 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V11 loc8 [V11 ] ( 0, 0 ) ushort -> zero-ref
;* V12 loc9 [V12 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ushort]>
@@ -25,26 +25,26 @@
;* V14 loc11 [V14 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V15 loc12 [V15 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V16 loc13 [V16 ] ( 0, 0 ) int -> zero-ref
-; V17 loc14 [V17,T01] ( 7, 24 ) long -> a5
+; V17 loc14 [V17,T01] ( 7, 24 ) long -> a4
;* V18 loc15 [V18 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ulong]>
;* V19 loc16 [V19 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[uint]>
-; V20 loc17 [V20,T02] ( 7, 24 ) int -> a5
+; V20 loc17 [V20,T02] ( 7, 24 ) int -> a4
;* V21 loc18 [V21 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[uint]>
;* V22 loc19 [V22 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ulong]>
;* V23 loc20 [V23 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ushort]>
-; V24 loc21 [V24,T05] ( 5, 16 ) int -> a6
+; V24 loc21 [V24,T05] ( 5, 16 ) int -> a5
;# V25 OutArgs [V25 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
;* V26 tmp1 [V26 ] ( 0, 0 ) int -> zero-ref
;* V27 tmp2 [V27 ] ( 0, 0 ) int -> zero-ref
;* V28 tmp3 [V28 ] ( 0, 0 ) int -> zero-ref
-;* V29 tmp4 [V29,T19] ( 0, 0 ) int -> zero-ref
-; V30 tmp5 [V30,T11] ( 2, 8 ) int -> a5
+;* V29 tmp4 [V29,T16] ( 0, 0 ) int -> zero-ref
+; V30 tmp5 [V30,T08] ( 2, 8 ) int -> a4
;* V31 tmp6 [V31 ] ( 0, 0 ) struct (16) zero-ref "dup spill" <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V32 tmp7 [V32 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.Runtime.Intrinsics.Vector128`1[byte]>
;* V33 tmp8 [V33 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.Runtime.Intrinsics.Vector128`1[byte]>
;* V34 tmp9 [V34 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V35 tmp10 [V35 ] ( 0, 0 ) int -> zero-ref
-; V36 tmp11 [V36,T12] ( 2, 8 ) long -> a5
+; V36 tmp11 [V36,T09] ( 2, 8 ) long -> a4
;* V37 tmp12 [V37 ] ( 0, 0 ) struct (16) zero-ref "dup spill" <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V38 tmp13 [V38 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.Runtime.Intrinsics.Vector128`1[byte]>
;* V39 tmp14 [V39 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.Runtime.Intrinsics.Vector128`1[byte]>
@@ -220,11 +220,11 @@
;* V209 tmp184 [V209 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V210 tmp185 [V210 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V211 tmp186 [V211 ] ( 0, 0 ) ushort -> zero-ref "Inlining Arg"
-; V212 tmp187 [V212,T08] ( 3, 10 ) int -> a5 ld-addr-op "Inline ldloca(s) first use temp"
+; V212 tmp187 [V212,T07] ( 3, 10 ) int -> a4 ld-addr-op "Inline ldloca(s) first use temp"
;* V213 tmp188 [V213 ] ( 0, 0 ) ubyte -> zero-ref "Inline return value spill temp"
;* V214 tmp189 [V214 ] ( 0, 0 ) ushort -> zero-ref "Inline stloc first use temp"
;* V215 tmp190 [V215 ] ( 0, 0 ) ubyte -> zero-ref "Inline return value spill temp"
-; V216 tmp191 [V216,T13] ( 2, 8 ) ushort -> a5 ld-addr-op "Inline ldloca(s) first use temp"
+; V216 tmp191 [V216,T10] ( 2, 8 ) ushort -> a4 ld-addr-op "Inline ldloca(s) first use temp"
;* V217 tmp192 [V217 ] ( 0, 0 ) ubyte -> zero-ref "Inline return value spill temp"
;* V218 tmp193 [V218 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V219 tmp194 [V219 ] ( 0, 0 ) ubyte -> zero-ref "Inline return value spill temp"
@@ -305,9 +305,6 @@
;* V294 tmp269 [V294 ] ( 0, 0 ) long -> zero-ref "field V207._lower (fldOffset=0x0)" P-INDEP
;* V295 tmp270 [V295 ] ( 0, 0 ) long -> zero-ref "field V207._upper (fldOffset=0x8)" P-INDEP
;* V296 tmp271 [V296 ] ( 0, 0 ) byref -> zero-ref "BlockOp address local"
-; V297 cse0 [V297,T09] ( 3, 8 ) long -> a4 "CSE #01: moderate"
-; V298 cse1 [V298,T10] ( 3, 8 ) long -> a4 "CSE #04: moderate"
-; V299 cse2 [V299,T07] ( 3, 12 ) long -> a4 "CSE #07: moderate"
;
; Lcl frame size = 0
Frame info. #outsz=0; #framesz=16; lcl=0
@@ -323,23 +320,23 @@ G_M31524_IG02: ; bbWeight=0.25, gcrefRegs=0000 {}, byrefRegs=0000 {}, byr
j G_M31524_IG04
;; size=8 bbWeight=0.25 PerfScore 0.50
G_M31524_IG03: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
+ auipc a5, 0xD1FFAB1E
+ ld a5, 0xD1FFAB1E(a5)
+ add a5, a4, a5
auipc a6, 0xD1FFAB1E
ld a6, 0xD1FFAB1E(a6)
- add a6, a5, a6
- auipc a7, 0xD1FFAB1E
- ld a7, 0xD1FFAB1E(a7)
- add a7, a5, a7
- xor a6, a6, a7
- lui a7, 0xD1FFAB1E
- slli a7, a7, 12
- addi a7, a7, 0xD1FFAB1E
- slli a7, a7, 13
- addi a7, a7, 0xD1FFAB1E
- and a6, a6, a7
- srli a6, a6, 2
- xor a5, a6, a5
- add t6, a1, a4
- sd a5, 0xD1FFAB1E(t6)
+ add a6, a4, a6
+ xor a5, a5, a6
+ lui a6, 0xD1FFAB1E
+ slli a6, a6, 12
+ addi a6, a6, 0xD1FFAB1E
+ slli a6, a6, 13
+ addi a6, a6, 0xD1FFAB1E
+ and a5, a5, a6
+ srli a5, a5, 2
+ xor a4, a5, a4
+ sh1add a5, a3, a1
+ sd a4, 0xD1FFAB1E(a5)
addi a3, a3, 0xD1FFAB1E
;; size=72 bbWeight=4 PerfScore 68.00
G_M31524_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
@@ -348,33 +345,32 @@ G_M31524_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
bltu a4, a5, G_M31524_IG07
;; size=12 bbWeight=4 PerfScore 18.00
G_M31524_IG05: ; bbWeight=2, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
- slli a4, a3, 1
- add t6, a0, a4
- ld a5, 0xD1FFAB1E(t6)
- auipc a6, 0xD1FFAB1E
- ld a6, 0xD1FFAB1E(a6)
- and a6, a5, a6
- bnez a6, G_M31524_IG07
+ sh1add a4, a3, a0
+ ld a4, 0xD1FFAB1E(a4)
+ auipc a5, 0xD1FFAB1E
+ ld a5, 0xD1FFAB1E(a5)
+ and a5, a4, a5
+ bnez a5, G_M31524_IG07
j G_M31524_IG03
- ;; size=32 bbWeight=2 PerfScore 21.00
+ ;; size=28 bbWeight=2 PerfScore 20.00
G_M31524_IG06: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
+ lui a5, 0xD1FFAB1E
+ addiw a5, a5, 0xD1FFAB1E
+ addw a5, a4, a5
lui a6, 0xD1FFAB1E
addiw a6, a6, 0xD1FFAB1E
- addw a6, a5, a6
- lui a7, 0xD1FFAB1E
- addiw a7, a7, 0xD1FFAB1E
- addw a7, a5, a7
- xor a6, a6, a7
- sext.w a6, a6
- lui a7, 0xD1FFAB1E
- addiw a7, a7, 0xD1FFAB1E
- and a6, a6, a7
- sext.w a6, a6
- srliw a6, a6, 2
- xor a5, a6, a5
+ addw a6, a4, a6
+ xor a5, a5, a6
sext.w a5, a5
- add t6, a1, a4
- sw a5, 0xD1FFAB1E(t6)
+ lui a6, 0xD1FFAB1E
+ addiw a6, a6, 0xD1FFAB1E
+ and a5, a5, a6
+ sext.w a5, a5
+ srliw a5, a5, 2
+ xor a4, a5, a4
+ sext.w a4, a4
+ sh1add a5, a3, a1
+ sw a4, 0xD1FFAB1E(a5)
addi a3, a3, 0xD1FFAB1E
;; size=72 bbWeight=4 PerfScore 62.00
G_M31524_IG07: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
@@ -383,38 +379,36 @@ G_M31524_IG07: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
bltu a4, a5, G_M31524_IG09
;; size=12 bbWeight=4 PerfScore 18.00
G_M31524_IG08: ; bbWeight=2, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
- slli a4, a3, 1
- add t6, a0, a4
- lw a5, 0xD1FFAB1E(t6)
- lui a6, 0xD1FFAB1E
- addiw a6, a6, 0xD1FFAB1E
- and a6, a5, a6
- sext.w a6, a6
- sext.w a6, a6
- beqz a6, G_M31524_IG06
- ;; size=36 bbWeight=2 PerfScore 20.00
+ sh1add a4, a3, a0
+ lw a4, 0xD1FFAB1E(a4)
+ lui a5, 0xD1FFAB1E
+ addiw a5, a5, 0xD1FFAB1E
+ and a5, a4, a5
+ sext.w a5, a5
+ sext.w a5, a5
+ beqz a5, G_M31524_IG06
+ ;; size=32 bbWeight=2 PerfScore 19.00
G_M31524_IG09: ; bbWeight=2, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
bgeu a3, a2, G_M31524_IG13
;; size=4 bbWeight=2 PerfScore 7.00
G_M31524_IG10: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
- slli a4, a3, 1
- add t6, a0, a4
- lhu a5, 0xD1FFAB1E(t6)
+ sh1add a4, a3, a0
+ lhu a4, 0xD1FFAB1E(a4)
+ sext.w a5, a4
sext.w a6, a5
- sext.w a7, a6
- addi t0, zero, 0xD1FFAB1E
- bltu t0, a7, G_M31524_IG13
- ;; size=28 bbWeight=4 PerfScore 36.00
+ addi a7, zero, 0xD1FFAB1E
+ bltu a7, a6, G_M31524_IG13
+ ;; size=24 bbWeight=4 PerfScore 34.00
G_M31524_IG11: ; bbWeight=2, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
- addiw a7, a6, 0xD1FFAB1E
- addi t0, zero, 0xD1FFAB1E
- bltu t0, a7, G_M31524_IG12
addiw a6, a5, 0xD1FFAB1E
+ addi a7, zero, 0xD1FFAB1E
+ bltu a7, a6, G_M31524_IG12
+ addiw a5, a4, 0xD1FFAB1E
;; size=16 bbWeight=2 PerfScore 10.00
G_M31524_IG12: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
- zext.h a5, a6
- add t6, a1, a4
- sh a5, 0xD1FFAB1E(t6)
+ zext.h a4, a5
+ sh1add a5, a3, a1
+ sh a4, 0xD1FFAB1E(a5)
addi a3, a3, 0xD1FFAB1E
bltu a3, a2, G_M31524_IG10
;; size=20 bbWeight=4 PerfScore 36.00
@@ -431,7 +425,7 @@ RWD08 dq 0025002500250025h
RWD16 dq FF80FF80FF80FF80h
-; Total bytes of code 348, prolog size 16, PerfScore 306.75, instruction count 76, allocated bytes for code 348 (MethodHash=91c584db) for method System.Text.Ascii:ChangeCase[ushort,ushort,System.Text.Ascii+ToLowerConversion](ptr,ptr,nuint):nuint (FullOpts)
+; Total bytes of code 336, prolog size 16, PerfScore 302.75, instruction count 73, allocated bytes for code 336 (MethodHash=91c584db) for method System.Text.Ascii:ChangeCase[ushort,ushort,System.Text.Ascii+ToLowerConversion](ptr,ptr,nuint):nuint (FullOpts)
; ============================================================
Unwind Info:
@@ -442,7 +436,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 174 (0x000ae) Actual length = 348 (0x00015c)
+ Function Length : 168 (0x000a8) Actual length = 336 (0x000150)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)-14 (-3.33%) : 814.dasm - System.SpanHelpers:SequenceCompareTo(byref,int,byref,int):int (FullOpts)@@ -9,26 +9,23 @@
; Final local variable assignments
;
; V00 arg0 [V00,T01] ( 6, 11.50) byref -> s1 single-def
-; V01 arg1 [V01,T07] ( 6, 5 ) int -> s3 single-def
+; V01 arg1 [V01,T05] ( 6, 5 ) int -> s3 single-def
; V02 arg2 [V02,T02] ( 6, 11.50) byref -> s2 single-def
-; V03 arg3 [V03,T08] ( 6, 5 ) int -> s4 single-def
-; V04 loc0 [V04,T12] ( 2, 1.50) int -> a0
-; V05 loc1 [V05,T05] ( 6, 10.50) long -> a1
-; V06 loc2 [V06,T00] ( 13, 35 ) long -> a2
+; V03 arg3 [V03,T06] ( 6, 5 ) int -> s4 single-def
+; V04 loc0 [V04,T09] ( 2, 1.50) int -> a0
+; V05 loc1 [V05,T03] ( 6, 10.50) long -> a1
+; V06 loc2 [V06,T00] ( 16, 43.50) long -> a2
;* V07 loc3 [V07 ] ( 0, 0 ) long -> zero-ref
-; V08 loc4 [V08,T06] ( 3, 8.50) int -> a3
+; V08 loc4 [V08,T04] ( 3, 8.50) int -> a3
;# V09 OutArgs [V09 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
-; V10 tmp1 [V10,T09] ( 3, 1.50) int -> s3
+; V10 tmp1 [V10,T07] ( 3, 1.50) int -> s3
;* V11 tmp2 [V11 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V12 tmp3 [V12 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V13 tmp4 [V13 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V14 tmp5 [V14 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V15 tmp6 [V15 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V16 tmp7 [V16 ] ( 0, 0 ) ushort -> zero-ref "Inlining Arg"
-; V17 cse0 [V17,T03] ( 3, 12 ) long -> a3 "CSE #01: aggressive"
-; V18 cse1 [V18,T04] ( 3, 12 ) long -> a3 "CSE #04: aggressive"
-; V19 cse2 [V19,T10] ( 3, 1.50) long -> a4 "CSE #02: moderate"
-; V20 cse3 [V20,T11] ( 3, 1.50) long -> a3 "CSE #03: moderate"
+; V17 cse0 [V17,T08] ( 3, 1.50) long -> a3 "CSE #01: moderate"
;
; Lcl frame size = 0
Frame info. #outsz=0; #framesz=48; lcl=0
@@ -119,51 +116,55 @@ G_M65109_IG09: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=40200 {s1 s2
bltu a1, a3, G_M65109_IG11
;; size=16 bbWeight=0.50 PerfScore 2.50
G_M65109_IG10: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=40200 {s1 s2}, byref, isz
- slli a3, a2, 1
- add t6, s1, a3
- ; byrRegs +[t6]
- ld a4, 0xD1FFAB1E(t6)
- add t6, s2, a3
- ld a3, 0xD1FFAB1E(t6)
- bne a4, a3, G_M65109_IG11
+ sh1add a3, a2, s1
+ ; byrRegs +[a3]
+ ld a3, 0xD1FFAB1E(a3)
+ ; byrRegs -[a3]
+ sh1add a4, a2, s2
+ ; byrRegs +[a4]
+ ld a4, 0xD1FFAB1E(a4)
+ ; byrRegs -[a4]
+ bne a3, a4, G_M65109_IG11
addi a2, a2, 0xD1FFAB1E
addi a3, a2, 0xD1FFAB1E
bgeu a1, a3, G_M65109_IG10
- ;; size=36 bbWeight=4 PerfScore 54.00
+ ;; size=32 bbWeight=4 PerfScore 52.00
G_M65109_IG11: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=40200 {s1 s2}, byref, isz
- ; byrRegs -[t6]
addi a3, a2, 0xD1FFAB1E
bltu a1, a3, G_M65109_IG12
- slli a4, a2, 1
- add t6, s1, a4
- ; byrRegs +[t6]
- lw a5, 0xD1FFAB1E(t6)
- sext.w a5, a5
- add t6, s2, a4
- lw a4, 0xD1FFAB1E(t6)
+ sh1add a4, a2, s1
+ ; byrRegs +[a4]
+ lw a4, 0xD1FFAB1E(a4)
+ ; byrRegs -[a4]
sext.w a4, a4
- bne a5, a4, G_M65109_IG12
+ sh1add a5, a2, s2
+ ; byrRegs +[a5]
+ lw a5, 0xD1FFAB1E(a5)
+ ; byrRegs -[a5]
+ sext.w a5, a5
+ bne a4, a5, G_M65109_IG12
mv a2, a3
- ;; size=44 bbWeight=0.50 PerfScore 7.25
+ ;; size=40 bbWeight=0.50 PerfScore 7.00
G_M65109_IG12: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=40200 {s1 s2}, byref, isz
- ; byrRegs -[t6]
bgeu a2, a1, G_M65109_IG14
;; size=4 bbWeight=1 PerfScore 3.50
G_M65109_IG13: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=40200 {s1 s2}, byref, isz
- slli a3, a2, 1
- add t6, s1, a3
- ; byrRegs +[t6]
- lhu a4, 0xD1FFAB1E(t6)
- add t6, s2, a3
- lhu a3, 0xD1FFAB1E(t6)
- subw a3, a4, a3
+ sh1add a3, a2, s1
+ ; byrRegs +[a3]
+ lhu a3, 0xD1FFAB1E(a3)
+ ; byrRegs -[a3]
+ sh1add a4, a2, s2
+ ; byrRegs +[a4]
+ lhu a4, 0xD1FFAB1E(a4)
+ ; byrRegs -[a4]
+ subw a3, a3, a4
sext.w a4, a3
bnez a4, G_M65109_IG15
addi a2, a2, 0xD1FFAB1E
bltu a2, a1, G_M65109_IG13
- ;; size=40 bbWeight=4 PerfScore 64.00
+ ;; size=34 bbWeight=4 PerfScore 62.00
G_M65109_IG14: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, epilog, nogc
- ; byrRegs -[s1 s2 t6]
+ ; byrRegs -[s1 s2]
ld s4, 40(sp)
ld s3, 32(sp)
ld s2, 24(sp)
@@ -185,7 +186,7 @@ G_M65109_IG16: ; bbWeight=0.50, epilog, nogc, extend
addi sp, sp, 48
ret ;; size=32 bbWeight=0.50 PerfScore 7.75
-; Total bytes of code 420, prolog size 48, PerfScore 207.25, instruction count 85, allocated bytes for code 420 (MethodHash=bda601aa) for method System.SpanHelpers:SequenceCompareTo(byref,int,byref,int):int (FullOpts)
+; Total bytes of code 406, prolog size 48, PerfScore 203.00, instruction count 82, allocated bytes for code 406 (MethodHash=bda601aa) for method System.SpanHelpers:SequenceCompareTo(byref,int,byref,int):int (FullOpts)
; ============================================================
Unwind Info:
@@ -196,7 +197,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 210 (0x000d2) Actual length = 420 (0x0001a4)
+ Function Length : 203 (0x000cb) Actual length = 406 (0x000196)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)-20 (-2.85%) : 200.dasm - System.Globalization.IcuLocaleData:SearchCultureName(System.String):int (FullOpts)@@ -8,14 +8,14 @@
; 0 inlinees with PGO data; 10 single block inlinees; 6 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T07] ( 4, 6.96) ref -> s1 class-hnd single-def <System.String>
+; V00 arg0 [V00,T06] ( 4, 6.96) ref -> s1 class-hnd single-def <System.String>
;* V01 loc0 [V01 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[byte]>
;* V02 loc1 [V02 ] ( 0, 0 ) struct (16) zero-ref <System.ReadOnlySpan`1[byte]>
; V03 loc2 [V03,T02] ( 6, 15 ) int -> s1
-; V04 loc3 [V04,T06] ( 4, 10.50) int -> s2
-; V05 loc4 [V05,T17] ( 3, 1.50) int -> s3
-; V06 loc5 [V06,T00] ( 5, 16.34) int -> s5
-; V07 loc6 [V07,T01] ( 5, 15.84) ushort -> s7
+; V04 loc3 [V04,T05] ( 4, 10.50) int -> s2
+; V05 loc4 [V05,T16] ( 3, 1.50) int -> s3
+; V06 loc5 [V06,T00] ( 6, 20.30) int -> s5
+; V07 loc6 [V07,T01] ( 5, 15.84) ushort -> s6
;* V08 loc7 [V08 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.ReadOnlySpan`1[byte]>
; V09 loc8 [V09,T03] ( 5, 12.50) int -> s5
; V10 loc9 [V10,T04] ( 3, 12 ) int -> a0
@@ -23,10 +23,10 @@
;* V12 tmp1 [V12 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp" <System.Span`1[byte]>
;* V13 tmp2 [V13 ] ( 0, 0 ) byref -> zero-ref "impAppendStmt"
;* V14 tmp3 [V14 ] ( 0, 0 ) byref -> zero-ref
-; V15 tmp4 [V15,T09] ( 2, 7.92) byref -> a0
-; V16 tmp5 [V16,T08] ( 3, 7.92) int -> a1
+; V15 tmp4 [V15,T08] ( 2, 7.92) byref -> a0
+; V16 tmp5 [V16,T07] ( 3, 7.92) int -> a1
;* V17 tmp6 [V17 ] ( 0, 0 ) struct (16) zero-ref multireg-ret "spilled call-like call argument" <System.ReadOnlySpan`1[byte]>
-; V18 tmp7 [V18,T16] ( 2, 2 ) long -> s4 "Inlining Arg"
+; V18 tmp7 [V18,T15] ( 2, 2 ) long -> s4 "Inlining Arg"
;* V19 tmp8 [V19 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V20 tmp9 [V20 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V21 tmp10 [V21 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg" <System.Span`1[byte]>
@@ -44,13 +44,13 @@
;* V33 tmp22 [V33 ] ( 0, 0 ) int -> zero-ref "impAppendStmt"
;* V34 tmp23 [V34 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg" <System.ReadOnlySpan`1[byte]>
;* V35 tmp24 [V35 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg" <System.ReadOnlySpan`1[byte]>
-; V36 tmp25 [V36,T13] ( 3, 4.96) byref -> s4 single-def "field V01._reference (fldOffset=0x0)" P-INDEP
-; V37 tmp26 [V37,T19] ( 2, 1 ) int -> s3 "field V01._length (fldOffset=0x8)" P-INDEP
-; V38 tmp27 [V38,T14] ( 2, 4.50) byref -> s4 single-def "field V02._reference (fldOffset=0x0)" P-INDEP
-; V39 tmp28 [V39,T15] ( 2, 4.50) int -> s3 "field V02._length (fldOffset=0x8)" P-INDEP
+; V36 tmp25 [V36,T12] ( 3, 4.96) byref -> s4 single-def "field V01._reference (fldOffset=0x0)" P-INDEP
+; V37 tmp26 [V37,T18] ( 2, 1 ) int -> s3 "field V01._length (fldOffset=0x8)" P-INDEP
+; V38 tmp27 [V38,T13] ( 2, 4.50) byref -> s4 single-def "field V02._reference (fldOffset=0x0)" P-INDEP
+; V39 tmp28 [V39,T14] ( 2, 4.50) int -> s3 "field V02._length (fldOffset=0x8)" P-INDEP
;* V40 tmp29 [V40 ] ( 0, 0 ) byref -> zero-ref "field V08._reference (fldOffset=0x0)" P-INDEP
;* V41 tmp30 [V41 ] ( 0, 0 ) int -> zero-ref "field V08._length (fldOffset=0x8)" P-INDEP
-; V42 tmp31 [V42,T18] ( 2, 1 ) byref -> s4 single-def "field V12._reference (fldOffset=0x0)" P-INDEP
+; V42 tmp31 [V42,T17] ( 2, 1 ) byref -> s4 single-def "field V12._reference (fldOffset=0x0)" P-INDEP
;* V43 tmp32 [V43 ] ( 0, 0 ) int -> zero-ref "field V12._length (fldOffset=0x8)" P-INDEP
;* V44 tmp33 [V44 ] ( 0, 0 ) byref -> zero-ref "field V17._reference (fldOffset=0x0)" P-INDEP
;* V45 tmp34 [V45 ] ( 0, 0 ) int -> zero-ref "field V17._length (fldOffset=0x8)" P-INDEP
@@ -60,8 +60,8 @@
;* V49 tmp38 [V49 ] ( 0, 0 ) int -> zero-ref "field V22._length (fldOffset=0x8)" P-INDEP
;* V50 tmp39 [V50 ] ( 0, 0 ) byref -> zero-ref single-def "field V27._reference (fldOffset=0x0)" P-INDEP
;* V51 tmp40 [V51 ] ( 0, 0 ) int -> zero-ref "field V27._length (fldOffset=0x8)" P-INDEP
-; V52 tmp41 [V52,T10] ( 2, 8 ) byref -> a0 "field V30._reference (fldOffset=0x0)" P-INDEP
-; V53 tmp42 [V53,T11] ( 2, 8 ) int -> a1 "field V30._length (fldOffset=0x8)" P-INDEP
+; V52 tmp41 [V52,T09] ( 2, 8 ) byref -> a0 "field V30._reference (fldOffset=0x0)" P-INDEP
+; V53 tmp42 [V53,T10] ( 2, 8 ) int -> a1 "field V30._length (fldOffset=0x8)" P-INDEP
;* V54 tmp43 [V54 ] ( 0, 0 ) byref -> zero-ref "field V31._reference (fldOffset=0x0)" P-INDEP
;* V55 tmp44 [V55 ] ( 0, 0 ) int -> zero-ref "field V31._length (fldOffset=0x8)" P-INDEP
;* V56 tmp45 [V56 ] ( 0, 0 ) byref -> zero-ref "field V34._reference (fldOffset=0x0)" P-INDEP
@@ -69,24 +69,22 @@
;* V58 tmp47 [V58 ] ( 0, 0 ) byref -> zero-ref "field V35._reference (fldOffset=0x0)" P-INDEP
;* V59 tmp48 [V59 ] ( 0, 0 ) int -> zero-ref "field V35._length (fldOffset=0x8)" P-INDEP
; V60 GsCookie [V60 ] ( 1, 1 ) long -> [fp-0x08] do-not-enreg[X] addr-exposed "GSSecurityCookie"
-; V61 cse0 [V61,T12] ( 5, 6.96) int -> s2 "CSE #01: aggressive"
-; V62 cse1 [V62,T05] ( 3, 11.88) long -> s6 "CSE #02: aggressive"
+; V61 cse0 [V61,T11] ( 5, 6.96) int -> s2 "CSE #01: aggressive"
;
-; Lcl frame size = 8
-Frame info. #outsz=0; #framesz=80; lcl=8
+; Lcl frame size = 16
+Frame info. #outsz=0; #framesz=80; lcl=16
G_M6900_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
addi sp, sp, -80
- sd fp, 8(sp)
- sd ra, 16(sp)
- sd s1, 24(sp)
- sd s2, 32(sp)
- sd s3, 40(sp)
- sd s4, 48(sp)
- sd s5, 56(sp)
- sd s6, 64(sp)
- sd s7, 72(sp)
- addi fp, sp, 8
+ sd fp, 16(sp)
+ sd ra, 24(sp)
+ sd s1, 32(sp)
+ sd s2, 40(sp)
+ sd s3, 48(sp)
+ sd s4, 56(sp)
+ sd s5, 64(sp)
+ sd s6, 72(sp)
+ addi fp, sp, 16
lui t0, 0xD1FFAB1E
addiw t0, t0, 0xD1FFAB1E
slli t0, t0, 14
@@ -98,7 +96,7 @@ G_M6900_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
sd t0, -8(fp)
mv s1, a0
; gcrRegs +[s1]
- ;; size=84 bbWeight=1 PerfScore 49.50
+ ;; size=80 bbWeight=1 PerfScore 45.50
G_M6900_IG02: ; bbWeight=1, gcrefRegs=0200 {s1}, byrefRegs=0000 {}, byref, isz
lw s2, 0xD1FFAB1E(s1)
sext.w a0, s2
@@ -132,16 +130,14 @@ G_M6900_IG05: ; bbWeight=0.50, gcrefRegs=0200 {s1}, byrefRegs=0000 {}, by
;; size=12 bbWeight=0.50 PerfScore 2.25
G_M6900_IG06: ; bbWeight=3.96, gcrefRegs=0200 {s1}, byrefRegs=100000 {s4}, byref, isz
; byrRegs +[s4]
- zext.w s6, s5
- slli a0, s6, 1
- add a0, s1, a0
+ sh1add.uw a0, s5, s1
; byrRegs +[a0]
- lhu s7, 0xD1FFAB1E(a0)
- sext.w a0, s7
+ lhu s6, 0xD1FFAB1E(a0)
+ sext.w a0, s6
; byrRegs -[a0]
addi a1, zero, 0xD1FFAB1E
bge a1, a0, G_M6900_IG08
- ;; size=28 bbWeight=3.96 PerfScore 35.64
+ ;; size=20 bbWeight=3.96 PerfScore 31.68
G_M6900_IG07: ; bbWeight=1.98, gcrefRegs=0200 {s1}, byrefRegs=100000 {s4}, byref
lui a0, 0xD1FFAB1E
addiw a0, a0, 0xD1FFAB1E
@@ -164,19 +160,20 @@ G_M6900_IG07: ; bbWeight=1.98, gcrefRegs=0200 {s1}, byrefRegs=100000 {s4}
; gcr arg pop 0
;; size=60 bbWeight=1.98 PerfScore 35.64
G_M6900_IG08: ; bbWeight=3.96, gcrefRegs=0200 {s1}, byrefRegs=100000 {s4}, byref, isz
- add a0, s4, s6
+ zext.w a0, s5
+ add a0, s4, a0
; byrRegs +[a0]
- addiw a1, s7, 0xD1FFAB1E
+ addiw a1, s6, 0xD1FFAB1E
addi a2, zero, 0xD1FFAB1E
bltu a2, a1, G_M6900_IG10
- ;; size=16 bbWeight=3.96 PerfScore 19.80
+ ;; size=20 bbWeight=3.96 PerfScore 21.78
G_M6900_IG09: ; bbWeight=1.98, gcrefRegs=0200 {s1}, byrefRegs=100400 {a0 s4}, byref, isz
- ori a1, s7, 32
+ ori a1, s6, 32
andi a1, a1, 255
j G_M6900_IG11
;; size=12 bbWeight=1.98 PerfScore 4.95
G_M6900_IG10: ; bbWeight=1.98, gcrefRegs=0200 {s1}, byrefRegs=100400 {a0 s4}, byref
- andi a1, s7, 255
+ andi a1, s6, 255
;; size=4 bbWeight=1.98 PerfScore 0.99
G_M6900_IG11: ; bbWeight=3.96, gcrefRegs=0200 {s1}, byrefRegs=100400 {a0 s4}, byref, isz
sb a1, 0xD1FFAB1E(a0)
@@ -245,18 +242,17 @@ G_M6900_IG17: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byre
jalr ra, 0xD1FFAB1E(t0) // CORINFO_HELP_FAIL_FAST
;; size=44 bbWeight=0.50 PerfScore 8.00
G_M6900_IG18: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, epilog, nogc
- addi sp, fp, -8
- ld s7, 72(sp)
- ld s6, 64(sp)
- ld s5, 56(sp)
- ld s4, 48(sp)
- ld s3, 40(sp)
- ld s2, 32(sp)
- ld s1, 24(sp)
- ld ra, 16(sp)
- ld fp, 8(sp)
+ addi sp, fp, -16
+ ld s6, 72(sp)
+ ld s5, 64(sp)
+ ld s4, 56(sp)
+ ld s3, 48(sp)
+ ld s2, 40(sp)
+ ld s1, 32(sp)
+ ld ra, 24(sp)
+ ld fp, 16(sp)
addi sp, sp, 80
- ret ;; size=48 bbWeight=0.50 PerfScore 11.00
+ ret ;; size=44 bbWeight=0.50 PerfScore 10.00
G_M6900_IG19: ; bbWeight=0.50, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref, isz
sext.w a0, s5
auipc t0, 0xD1FFAB1E
@@ -271,18 +267,17 @@ G_M6900_IG19: ; bbWeight=0.50, gcVars=0000000000000000 {}, gcrefRegs=0000
jalr ra, 0xD1FFAB1E(t0) // CORINFO_HELP_FAIL_FAST
;; size=44 bbWeight=0.50 PerfScore 8.00
G_M6900_IG20: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, epilog, nogc
- addi sp, fp, -8
- ld s7, 72(sp)
- ld s6, 64(sp)
- ld s5, 56(sp)
- ld s4, 48(sp)
- ld s3, 40(sp)
- ld s2, 32(sp)
- ld s1, 24(sp)
- ld ra, 16(sp)
- ld fp, 8(sp)
+ addi sp, fp, -16
+ ld s6, 72(sp)
+ ld s5, 64(sp)
+ ld s4, 56(sp)
+ ld s3, 48(sp)
+ ld s2, 40(sp)
+ ld s1, 32(sp)
+ ld ra, 24(sp)
+ ld fp, 16(sp)
addi sp, sp, 80
- ret ;; size=48 bbWeight=0.50 PerfScore 11.00
+ ret ;; size=44 bbWeight=0.50 PerfScore 10.00
G_M6900_IG21: ; bbWeight=0.50, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref, isz
addi a0, zero, 0xD1FFAB1E
auipc t0, 0xD1FFAB1E
@@ -297,67 +292,66 @@ G_M6900_IG21: ; bbWeight=0.50, gcVars=0000000000000000 {}, gcrefRegs=0000
jalr ra, 0xD1FFAB1E(t0) // CORINFO_HELP_FAIL_FAST
;; size=44 bbWeight=0.50 PerfScore 8.00
G_M6900_IG22: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, epilog, nogc
- addi sp, fp, -8
- ld s7, 72(sp)
- ld s6, 64(sp)
- ld s5, 56(sp)
- ld s4, 48(sp)
- ld s3, 40(sp)
- ld s2, 32(sp)
- ld s1, 24(sp)
- ld ra, 16(sp)
- ld fp, 8(sp)
+ addi sp, fp, -16
+ ld s6, 72(sp)
+ ld s5, 64(sp)
+ ld s4, 56(sp)
+ ld s3, 48(sp)
+ ld s2, 40(sp)
+ ld s1, 32(sp)
+ ld ra, 24(sp)
+ ld fp, 16(sp)
addi sp, sp, 80
- ret ;; size=48 bbWeight=0.50 PerfScore 11.00
+ ret ;; size=44 bbWeight=0.50 PerfScore 10.00
RWD00 dq 9ABCDEF012345678h
-; Total bytes of code 702, prolog size 84, PerfScore 387.16, instruction count 140, allocated bytes for code 702 (MethodHash=09fae50b) for method System.Globalization.IcuLocaleData:SearchCultureName(System.String):int (FullOpts)
+; Total bytes of code 682, prolog size 80, PerfScore 378.18, instruction count 135, allocated bytes for code 682 (MethodHash=09fae50b) for method System.Globalization.IcuLocaleData:SearchCultureName(System.String):int (FullOpts)
; ============================================================
Unwind Info:
>> Start offset : 0x000000 (not in unwind data)
...+20 (+2.99%) : 1775.dasm - System.Number+BigInteger:HeuristicDivide(byref,byref):uint (FullOpts)@@ -8,32 +8,32 @@
; 0 inlinees with PGO data; 40 single block inlinees; 10 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T24] ( 7, 5 ) byref -> s1 single-def
-; V01 arg1 [V01,T25] ( 5, 4 ) byref -> a1 single-def
+; V00 arg0 [V00,T22] ( 7, 5 ) byref -> s1 single-def
+; V01 arg1 [V01,T23] ( 5, 4 ) byref -> a1 single-def
; V02 loc0 [V02,T00] ( 15, 36 ) int -> s2
-; V03 loc1 [V03,T29] ( 3, 1.50) int -> a0
-; V04 loc2 [V04,T27] ( 6, 3 ) int -> s5
+; V03 loc1 [V03,T26] ( 4, 2 ) int -> a0
+; V04 loc2 [V04,T25] ( 6, 3 ) int -> s5
;* V05 loc3 [V05 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V06 loc4 [V06 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
-; V07 loc5 [V07,T02] ( 6, 20.50) int -> a0
-; V08 loc6 [V08,T13] ( 3, 8.50) long -> a2
-; V09 loc7 [V09,T14] ( 3, 8.50) long -> a3
-; V10 loc8 [V10,T09] ( 3, 12 ) long -> a5
-; V11 loc9 [V11,T10] ( 3, 12 ) long -> a5
+; V07 loc5 [V07,T01] ( 8, 28.50) int -> a0
+; V08 loc6 [V08,T11] ( 3, 8.50) long -> a2
+; V09 loc7 [V09,T12] ( 3, 8.50) long -> a3
+; V10 loc8 [V10,T07] ( 3, 12 ) long -> a5
+; V11 loc9 [V11,T08] ( 3, 12 ) long -> a5
;* V12 loc10 [V12 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V13 loc11 [V13 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V14 loc12 [V14 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V15 loc13 [V15 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
-; V16 loc14 [V16,T03] ( 6, 20.50) int -> a0
-; V17 loc15 [V17,T15] ( 3, 8.50) long -> a1
-; V18 loc16 [V18,T11] ( 3, 12 ) long -> a2
+; V16 loc14 [V16,T02] ( 8, 28.50) int -> a0
+; V17 loc15 [V17,T13] ( 3, 8.50) long -> a1
+; V18 loc16 [V18,T09] ( 3, 12 ) long -> a2
;* V19 loc17 [V19 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V20 loc18 [V20 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V21 loc19 [V21 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V22 loc20 [V22 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;# V23 OutArgs [V23 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
-; V24 tmp1 [V24,T28] ( 2, 2 ) int -> a2 "impAppendStmt"
-; V25 tmp2 [V25,T08] ( 2, 16 ) long -> a2 "impAppendStmt"
+; V24 tmp1 [V24,T27] ( 2, 2 ) int -> a2 "impAppendStmt"
+; V25 tmp2 [V25,T06] ( 2, 16 ) long -> a2 "impAppendStmt"
;* V26 tmp3 [V26 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V27 tmp4 [V27 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp" <System.Span`1[uint]>
;* V28 tmp5 [V28 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
@@ -74,34 +74,31 @@
;* V63 tmp40 [V63 ] ( 0, 0 ) int -> zero-ref "field V21._length (fldOffset=0x8)" P-INDEP
;* V64 tmp41 [V64 ] ( 0, 0 ) byref -> zero-ref "field V22._reference (fldOffset=0x0)" P-INDEP
;* V65 tmp42 [V65 ] ( 0, 0 ) int -> zero-ref "field V22._length (fldOffset=0x8)" P-INDEP
-; V66 tmp43 [V66,T31] ( 2, 1 ) byref -> a2 single-def "field V27._reference (fldOffset=0x0)" P-INDEP
+; V66 tmp43 [V66,T28] ( 2, 1 ) byref -> a2 single-def "field V27._reference (fldOffset=0x0)" P-INDEP
;* V67 tmp44 [V67 ] ( 0, 0 ) int -> zero-ref "field V27._length (fldOffset=0x8)" P-INDEP
-; V68 tmp45 [V68,T32] ( 2, 1 ) byref -> a3 single-def "field V29._reference (fldOffset=0x0)" P-INDEP
+; V68 tmp45 [V68,T29] ( 2, 1 ) byref -> a3 single-def "field V29._reference (fldOffset=0x0)" P-INDEP
;* V69 tmp46 [V69 ] ( 0, 0 ) int -> zero-ref "field V29._length (fldOffset=0x8)" P-INDEP
-; V70 tmp47 [V70,T16] ( 2, 8 ) byref -> a5 "field V31._reference (fldOffset=0x0)" P-INDEP
+; V70 tmp47 [V70,T14] ( 2, 8 ) byref -> a5 "field V31._reference (fldOffset=0x0)" P-INDEP
;* V71 tmp48 [V71 ] ( 0, 0 ) int -> zero-ref "field V31._length (fldOffset=0x8)" P-INDEP
-; V72 tmp49 [V72,T17] ( 2, 8 ) byref -> a7 "field V33._reference (fldOffset=0x0)" P-INDEP
+; V72 tmp49 [V72,T15] ( 2, 8 ) byref -> a6 "field V33._reference (fldOffset=0x0)" P-INDEP
;* V73 tmp50 [V73 ] ( 0, 0 ) int -> zero-ref "field V33._length (fldOffset=0x8)" P-INDEP
-; V74 tmp51 [V74,T18] ( 2, 8 ) byref -> a7 "field V35._reference (fldOffset=0x0)" P-INDEP
+; V74 tmp51 [V74,T16] ( 2, 8 ) byref -> a6 "field V35._reference (fldOffset=0x0)" P-INDEP
;* V75 tmp52 [V75 ] ( 0, 0 ) int -> zero-ref "field V35._length (fldOffset=0x8)" P-INDEP
-; V76 tmp53 [V76,T19] ( 2, 8 ) byref -> a0 "field V37._reference (fldOffset=0x0)" P-INDEP
+; V76 tmp53 [V76,T17] ( 2, 8 ) byref -> a0 "field V37._reference (fldOffset=0x0)" P-INDEP
;* V77 tmp54 [V77 ] ( 0, 0 ) int -> zero-ref "field V37._length (fldOffset=0x8)" P-INDEP
-; V78 tmp55 [V78,T20] ( 2, 8 ) byref -> a2 "field V39._reference (fldOffset=0x0)" P-INDEP
+; V78 tmp55 [V78,T18] ( 2, 8 ) byref -> a2 "field V39._reference (fldOffset=0x0)" P-INDEP
;* V79 tmp56 [V79 ] ( 0, 0 ) int -> zero-ref "field V39._length (fldOffset=0x8)" P-INDEP
-; V80 tmp57 [V80,T21] ( 2, 8 ) byref -> a4 "field V41._reference (fldOffset=0x0)" P-INDEP
+; V80 tmp57 [V80,T19] ( 2, 8 ) byref -> a3 "field V41._reference (fldOffset=0x0)" P-INDEP
;* V81 tmp58 [V81 ] ( 0, 0 ) int -> zero-ref "field V41._length (fldOffset=0x8)" P-INDEP
-; V82 tmp59 [V82,T22] ( 2, 8 ) byref -> a4 "field V43._reference (fldOffset=0x0)" P-INDEP
+; V82 tmp59 [V82,T20] ( 2, 8 ) byref -> a3 "field V43._reference (fldOffset=0x0)" P-INDEP
;* V83 tmp60 [V83 ] ( 0, 0 ) int -> zero-ref "field V43._length (fldOffset=0x8)" P-INDEP
-; V84 tmp61 [V84,T23] ( 2, 8 ) byref -> a0 "field V45._reference (fldOffset=0x0)" P-INDEP
+; V84 tmp61 [V84,T21] ( 2, 8 ) byref -> a0 "field V45._reference (fldOffset=0x0)" P-INDEP
;* V85 tmp62 [V85 ] ( 0, 0 ) int -> zero-ref "field V45._length (fldOffset=0x8)" P-INDEP
-; V86 cse0 [V86,T30] ( 3, 1.50) long -> a0 "CSE #02: moderate"
-; V87 cse1 [V87,T04] ( 4, 16 ) long -> a6 "CSE #07: aggressive"
-; V88 cse2 [V88,T05] ( 4, 16 ) long -> a3 "CSE #10: aggressive"
-; V89 cse3 [V89,T01] ( 8, 25 ) byref -> s3 "CSE #05: aggressive"
-; V90 cse4 [V90,T12] ( 4, 9 ) byref -> s4 "CSE #03: moderate"
-; V91 cse5 [V91,T06] ( 4, 16 ) int -> a2 "CSE #08: aggressive"
-; V92 cse6 [V92,T07] ( 4, 16 ) int -> a1 "CSE #11: aggressive"
-; V93 cse7 [V93,T26] ( 2, 4.50) long -> a4 hoist "CSE #04: moderate"
+; V86 cse0 [V86,T03] ( 8, 25 ) byref -> s3 "CSE #03: aggressive"
+; V87 cse1 [V87,T10] ( 4, 9 ) byref -> s4 "CSE #01: moderate"
+; V88 cse2 [V88,T04] ( 4, 16 ) int -> a2 "CSE #04: aggressive"
+; V89 cse3 [V89,T05] ( 4, 16 ) int -> a1 "CSE #05: aggressive"
+; V90 cse4 [V90,T24] ( 2, 4.50) long -> a4 hoist "CSE #02: moderate"
;
; Lcl frame size = 8
Frame info. #outsz=0; #framesz=64; lcl=8
@@ -137,8 +134,8 @@ G_M38309_IG03: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0A00 {s1 a1}
sext.w a4, a3
sext.w a5, a0
bgeu a5, a4, G_M38309_IG17
- slli.uw a0, a0, 2
- add t6, a2, a0
+ slli.uw a3, a0, 2
+ add t6, a2, a3
; byrRegs +[t6]
lw a2, 0xD1FFAB1E(t6)
; byrRegs -[a2]
@@ -146,6 +143,7 @@ G_M38309_IG03: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0A00 {s1 a1}
; byrRegs +[s4]
mv a3, s4
; byrRegs +[a3]
+ slli.uw a0, a0, 2
add t6, a3, a0
lw a0, 0xD1FFAB1E(t6)
addiw a0, a0, 0xD1FFAB1E
@@ -158,7 +156,7 @@ G_M38309_IG03: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0A00 {s1 a1}
mv a3, zero
; byrRegs -[a3]
zext.w a4, s5
- ;; size=92 bbWeight=0.50 PerfScore 22.00
+ ;; size=96 bbWeight=0.50 PerfScore 22.25
G_M38309_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=180A00 {s1 a1 s3 s4}, byref, isz
; byrRegs -[t6]
mv a5, s4
@@ -176,28 +174,31 @@ G_M38309_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=180A00 {s1 a1 s
mul a5, a5, a4
add a5, a5, a3
srli a3, a5, 32
- mv a7, s3
- ; byrRegs +[a7]
- add t6, a7, a6
- lw a7, 0xD1FFAB1E(t6)
- ; byrRegs -[a7]
- zext.w a7, a7
+ mv a6, s3
+ ; byrRegs +[a6]
+ slli.uw a7, a0, 2
+ add t6, a6, a7
+ lw a6, 0xD1FFAB1E(t6)
+ ; byrRegs -[a6]
+ zext.w a6, a6
zext.w a5, a5
- sub a5, a7, a5
+ sub a5, a6, a5
sub a5, a5, a2
srli a2, a5, 32
andi a2, a2, 1
- mv a7, s3
- ; byrRegs +[a7]
- add t6, a7, a6
+ mv a6, s3
+ ; byrRegs +[a6]
+ slli.uw a7, a0, 2
+ add t6, a6, a7
sw a5, 0xD1FFAB1E(t6)
addiw a0, a0, 0xD1FFAB1E
sext.w a5, a0
sext.w a6, s2
+ ; byrRegs -[a6]
blt a5, a6, G_M38309_IG04
- ;; size=108 bbWeight=4 PerfScore 112.00
+ ;; size=116 bbWeight=4 PerfScore 116.00
G_M38309_IG05: ; bbWeight=0.25, gcrefRegs=0000 {}, byrefRegs=180A00 {s1 a1 s3 s4}, byref, isz
- ; byrRegs -[a7 t6]
+ ; byrRegs -[t6]
sext.w a0, s2
bge zero, a0, G_M38309_IG07
;; size=8 bbWeight=0.25 PerfScore 1.00
@@ -255,27 +256,30 @@ G_M38309_IG09: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=180200 {s1 s3 s
lw a2, 0xD1FFAB1E(t6)
; byrRegs -[a2]
zext.w a2, a2
- mv a4, s4
- ; byrRegs +[a4]
- add t6, a4, a3
- lw a4, 0xD1FFAB1E(t6)
- ; byrRegs -[a4]
- zext.w a4, a4
- sub a2, a2, a4
+ mv a3, s4
+ ; byrRegs +[a3]
+ slli.uw a4, a0, 2
+ add t6, a3, a4
+ lw a3, 0xD1FFAB1E(t6)
+ ; byrRegs -[a3]
+ zext.w a3, a3
+ sub a2, a2, a3
sub a2, a2, a1
srli a1, a2, 32
andi a1, a1, 1
- mv a4, s3
- ; byrRegs +[a4]
- add t6, a4, a3
+ mv a3, s3
+ ; byrRegs +[a3]
+ slli.uw a4, a0, 2
+ add t6, a3, a4
sw a2, 0xD1FFAB1E(t6)
addiw a0, a0, 0xD1FFAB1E
sext.w a2, a0
sext.w a3, s2
+ ; byrRegs -[a3]
blt a2, a3, G_M38309_IG09
- ;; size=92 bbWeight=4 PerfScore 98.00
+ ;; size=100 bbWeight=4 PerfScore 102.00
G_M38309_IG10: ; bbWeight=0.25, gcrefRegs=0000 {}, byrefRegs=80200 {s1 s3}, byref, isz
- ; byrRegs -[a4 s4 t6]
+ ; byrRegs -[s4 t6]
sext.w a0, s2
bge zero, a0, G_M38309_IG12
;; size=8 bbWeight=0.25 PerfScore 1.00
@@ -348,7 +352,7 @@ G_M38309_IG18: ; bbWeight=0, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
ebreak
;; size=20 bbWeight=0 PerfScore 0.00
-; Total bytes of code 668, prolog size 40, PerfScore 442.00, instruction count 159, allocated bytes for code 668 (MethodHash=daac6a5a) for method System.Number+BigInteger:HeuristicDivide(byref,byref):uint (FullOpts)
+; Total bytes of code 688, prolog size 40, PerfScore 450.25, instruction count 164, allocated bytes for code 688 (MethodHash=daac6a5a) for method System.Number+BigInteger:HeuristicDivide(byref,byref):uint (FullOpts)
; ============================================================
Unwind Info:
@@ -359,7 +363,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 334 (0x0014e) Actual length = 668 (0x00029c)
+ Function Length : 344 (0x00158) Actual length = 688 (0x0002b0)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)+4 (+1.36%) : 1776.dasm - System.Number+BigInteger:Multiply10():this (FullOpts)@@ -8,10 +8,10 @@
; 0 inlinees with PGO data; 15 single block inlinees; 4 inlinees without PGO data
; Final local variable assignments
;
-; V00 this [V00,T05] ( 6, 8 ) byref -> s1 this single-def
-; V01 loc0 [V01,T00] ( 8, 21.50) int -> a1
-; V02 loc1 [V02,T09] ( 4, 5.50) int -> a0
-; V03 loc2 [V03,T06] ( 5, 9.50) long -> a2
+; V00 this [V00,T04] ( 6, 8 ) byref -> s1 this single-def
+; V01 loc0 [V01,T00] ( 9, 25.50) int -> a1
+; V02 loc1 [V02,T08] ( 4, 5.50) int -> a0
+; V03 loc2 [V03,T05] ( 5, 9.50) long -> a2
; V04 loc3 [V04,T02] ( 3, 12 ) long -> a4
; V05 loc4 [V05,T03] ( 3, 12 ) long -> a4
;* V06 loc5 [V06 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
@@ -32,15 +32,14 @@
;* V21 tmp12 [V21 ] ( 0, 0 ) int -> zero-ref "field V07._length (fldOffset=0x8)" P-INDEP
;* V22 tmp13 [V22 ] ( 0, 0 ) byref -> zero-ref single-def "field V08._reference (fldOffset=0x0)" P-INDEP
;* V23 tmp14 [V23 ] ( 0, 0 ) int -> zero-ref "field V08._length (fldOffset=0x8)" P-INDEP
-; V24 tmp15 [V24,T07] ( 2, 8 ) byref -> a4 "field V11._reference (fldOffset=0x0)" P-INDEP
+; V24 tmp15 [V24,T06] ( 2, 8 ) byref -> a4 "field V11._reference (fldOffset=0x0)" P-INDEP
;* V25 tmp16 [V25 ] ( 0, 0 ) int -> zero-ref "field V11._length (fldOffset=0x8)" P-INDEP
-; V26 tmp17 [V26,T08] ( 2, 8 ) byref -> a6 "field V13._reference (fldOffset=0x0)" P-INDEP
+; V26 tmp17 [V26,T07] ( 2, 8 ) byref -> a5 "field V13._reference (fldOffset=0x0)" P-INDEP
;* V27 tmp18 [V27 ] ( 0, 0 ) int -> zero-ref "field V13._length (fldOffset=0x8)" P-INDEP
-; V28 tmp19 [V28,T11] ( 2, 1 ) byref -> a3 single-def "field V17._reference (fldOffset=0x0)" P-INDEP
+; V28 tmp19 [V28,T10] ( 2, 1 ) byref -> a3 single-def "field V17._reference (fldOffset=0x0)" P-INDEP
;* V29 tmp20 [V29 ] ( 0, 0 ) int -> zero-ref "field V17._length (fldOffset=0x8)" P-INDEP
-; V30 cse0 [V30,T04] ( 3, 12 ) long -> a5 "CSE #04: aggressive"
-; V31 cse1 [V31,T01] ( 4, 12.50) byref -> a3 "CSE #02: aggressive"
-; V32 cse2 [V32,T10] ( 3, 2.50) int -> a0 "CSE #01: aggressive"
+; V30 cse0 [V30,T01] ( 4, 12.50) byref -> a3 "CSE #02: aggressive"
+; V31 cse1 [V31,T09] ( 3, 2.50) int -> a0 "CSE #01: aggressive"
;
; Lcl frame size = 8
Frame info. #outsz=0; #framesz=32; lcl=8
@@ -78,21 +77,23 @@ G_M24569_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0200 {s1}, byre
lw a4, 0xD1FFAB1E(t6)
; byrRegs -[a4]
zext.w a4, a4
- slli a6, a4, 1
- sh3add a4, a4, a6
+ slli a5, a4, 1
+ sh3add a4, a4, a5
add a4, a4, a2
srli a2, a4, 32
- mv a6, a3
- ; byrRegs +[a6]
- add t6, a6, a5
+ mv a5, a3
+ ; byrRegs +[a5]
+ slli.uw a6, a1, 2
+ add t6, a5, a6
sw a4, 0xD1FFAB1E(t6)
addiw a1, a1, 0xD1FFAB1E
sext.w a4, a1
sext.w a5, a0
+ ; byrRegs -[a5]
blt a4, a5, G_M24569_IG04
- ;; size=82 bbWeight=4 PerfScore 86.00
+ ;; size=86 bbWeight=4 PerfScore 88.00
G_M24569_IG05: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=2200 {s1 a3}, byref, isz
- ; byrRegs -[a6 t6]
+ ; byrRegs -[t6]
beqz a2, G_M24569_IG07
sext.w a4, a0
addi a5, zero, 0xD1FFAB1E
@@ -150,7 +151,7 @@ G_M24569_IG08: ; bbWeight=0, gcVars=0000000000000000 {}, gcrefRegs=0000 {
ebreak
;; size=28 bbWeight=0 PerfScore 0.00
-; Total bytes of code 294, prolog size 24, PerfScore 138.50, instruction count 60, allocated bytes for code 294 (MethodHash=90daa006) for method System.Number+BigInteger:Multiply10():this (FullOpts)
+; Total bytes of code 298, prolog size 24, PerfScore 140.50, instruction count 61, allocated bytes for code 298 (MethodHash=90daa006) for method System.Number+BigInteger:Multiply10():this (FullOpts)
; ============================================================
Unwind Info:
@@ -161,7 +162,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 147 (0x00093) Actual length = 294 (0x000126)
+ Function Length : 149 (0x00095) Actual length = 298 (0x00012a)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)+4 (+0.80%) : 1773.dasm - System.Number+BigInteger:Multiply(byref,uint,byref) (FullOpts)@@ -8,26 +8,26 @@
; 0 inlinees with PGO data; 23 single block inlinees; 8 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T04] ( 6, 8 ) byref -> a0 single-def
-; V01 arg1 [V01,T08] ( 6, 4 ) int -> a1 single-def
+; V00 arg0 [V00,T03] ( 6, 8 ) byref -> a0 single-def
+; V01 arg1 [V01,T07] ( 6, 4 ) int -> a1 single-def
; V02 arg2 [V02,T01] ( 14, 15 ) byref -> s1 single-def
-; V03 loc0 [V03,T09] ( 5, 6 ) int -> s2
-; V04 loc1 [V04,T00] ( 8, 21.50) int -> a2
-; V05 loc2 [V05,T05] ( 5, 9.50) int -> a3
-; V06 loc3 [V06,T14] ( 3, 1.50) int -> a0
+; V03 loc0 [V03,T08] ( 5, 6 ) int -> s2
+; V04 loc1 [V04,T00] ( 9, 25.50) int -> a2
+; V05 loc2 [V05,T04] ( 5, 9.50) int -> a3
+; V06 loc3 [V06,T13] ( 3, 1.50) int -> a0
; V07 loc4 [V07,T02] ( 3, 12 ) long -> a1
;* V08 loc5 [V08 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V09 loc6 [V09 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V10 loc7 [V10 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;# V11 OutArgs [V11 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
-; V12 tmp1 [V12,T15] ( 3, 1.50) int -> a2 "Inline return value spill temp"
+; V12 tmp1 [V12,T14] ( 3, 1.50) int -> a2 "Inline return value spill temp"
;* V13 tmp2 [V13 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
-; V14 tmp3 [V14,T11] ( 4, 4 ) long -> a0 "Inlining Arg"
-; V15 tmp4 [V15,T13] ( 3, 3 ) int -> a0 "Inlining Arg"
+; V14 tmp3 [V14,T10] ( 4, 4 ) long -> a0 "Inlining Arg"
+; V15 tmp4 [V15,T12] ( 3, 3 ) int -> a0 "Inlining Arg"
;* V16 tmp5 [V16 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V17 tmp6 [V17 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V18 tmp7 [V18 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
-; V19 tmp8 [V19,T16] ( 3, 1.50) int -> a2 "Inline stloc first use temp"
+; V19 tmp8 [V19,T15] ( 3, 1.50) int -> a2 "Inline stloc first use temp"
;* V20 tmp9 [V20 ] ( 0, 0 ) byref -> zero-ref "impAppendStmt"
;* V21 tmp10 [V21 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V22 tmp11 [V22 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
@@ -46,16 +46,15 @@
;* V35 tmp24 [V35 ] ( 0, 0 ) int -> zero-ref "field V09._length (fldOffset=0x8)" P-INDEP
;* V36 tmp25 [V36 ] ( 0, 0 ) byref -> zero-ref single-def "field V10._reference (fldOffset=0x0)" P-INDEP
;* V37 tmp26 [V37 ] ( 0, 0 ) int -> zero-ref "field V10._length (fldOffset=0x8)" P-INDEP
-; V38 tmp27 [V38,T06] ( 2, 8 ) byref -> a1 "field V25._reference (fldOffset=0x0)" P-INDEP
+; V38 tmp27 [V38,T05] ( 2, 8 ) byref -> a1 "field V25._reference (fldOffset=0x0)" P-INDEP
;* V39 tmp28 [V39 ] ( 0, 0 ) int -> zero-ref "field V25._length (fldOffset=0x8)" P-INDEP
-; V40 tmp29 [V40,T07] ( 2, 8 ) byref -> a3 "field V27._reference (fldOffset=0x0)" P-INDEP
+; V40 tmp29 [V40,T06] ( 2, 8 ) byref -> a3 "field V27._reference (fldOffset=0x0)" P-INDEP
;* V41 tmp30 [V41 ] ( 0, 0 ) int -> zero-ref "field V27._length (fldOffset=0x8)" P-INDEP
-; V42 tmp31 [V42,T18] ( 2, 1 ) byref -> a0 single-def "field V31._reference (fldOffset=0x0)" P-INDEP
+; V42 tmp31 [V42,T17] ( 2, 1 ) byref -> a0 single-def "field V31._reference (fldOffset=0x0)" P-INDEP
;* V43 tmp32 [V43 ] ( 0, 0 ) int -> zero-ref "field V31._length (fldOffset=0x8)" P-INDEP
-; V44 cse0 [V44,T03] ( 3, 12 ) long -> a4 "CSE #07: aggressive"
-; V45 cse1 [V45,T12] ( 5, 3.50) int -> s2 "CSE #01: moderate"
-; V46 cse2 [V46,T17] ( 3, 1.50) long -> a1 "CSE #02: moderate"
-; V47 cse3 [V47,T10] ( 4, 5.50) long -> s3 hoist multi-def "CSE #03: aggressive"
+; V44 cse0 [V44,T11] ( 5, 3.50) int -> s2 "CSE #01: moderate"
+; V45 cse1 [V45,T16] ( 3, 1.50) long -> a1 "CSE #02: moderate"
+; V46 cse2 [V46,T09] ( 4, 5.50) long -> s3 hoist multi-def "CSE #03: aggressive"
;
; Lcl frame size = 8
Frame info. #outsz=0; #framesz=48; lcl=8
@@ -105,6 +104,7 @@ G_M6434_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0600 {s1 a0}, by
lb zero, 0xD1FFAB1E(s1)
addi a3, s1, 0xD1FFAB1E
; byrRegs +[a3]
+ slli.uw a4, a2, 2
add t6, a3, a4
sw a1, 0xD1FFAB1E(t6)
srli a1, a1, 32
@@ -114,7 +114,7 @@ G_M6434_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0600 {s1 a0}, by
sext.w a1, a2
sext.w a4, s2
blt a1, a4, G_M6434_IG04
- ;; size=86 bbWeight=4 PerfScore 104.00
+ ;; size=90 bbWeight=4 PerfScore 106.00
G_M6434_IG05: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0200 {s1}, byref, isz
; byrRegs -[a0 t6]
sext.w a0, s2
@@ -239,7 +239,7 @@ G_M6434_IG15: ; bbWeight=0, gcVars=0000000000000000 {}, gcrefRegs=0000 {}
ebreak
;; size=28 bbWeight=0 PerfScore 0.00
-; Total bytes of code 498, prolog size 32, PerfScore 205.00, instruction count 107, allocated bytes for code 498 (MethodHash=71b0e6dd) for method System.Number+BigInteger:Multiply(byref,uint,byref) (FullOpts)
+; Total bytes of code 502, prolog size 32, PerfScore 207.00, instruction count 108, allocated bytes for code 502 (MethodHash=71b0e6dd) for method System.Number+BigInteger:Multiply(byref,uint,byref) (FullOpts)
; ============================================================
Unwind Info:
@@ -250,7 +250,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 249 (0x000f9) Actual length = 498 (0x0001f2)
+ Function Length : 251 (0x000fb) Actual length = 502 (0x0001f6)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)JIT.opt.mch-24 (-7.06%) : 21252.dasm - Runtime_61040_2:Problem(StructWithHoles,StructWithHoles,int[]):int (FullOpts)@@ -9,50 +9,47 @@
;
;* V00 arg0 [V00 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SA] multireg-arg single-def <StructWithHoles>
;* V01 arg1 [V01 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SA] multireg-arg single-def <StructWithHoles>
-; V02 arg2 [V02,T01] ( 4, 11 ) ref -> s1 class-hnd single-def <int[]>
+; V02 arg2 [V02,T02] ( 4, 11 ) ref -> s1 class-hnd single-def <int[]>
;* V03 loc0 [V03 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SF] ld-addr-op <StructWithHoles>
;* V04 loc1 [V04 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[S] <StructWithHoles>
-; V05 loc2 [V05,T08] ( 2, 0 ) int -> [fp-0x04] EH-live single-def
+; V05 loc2 [V05,T07] ( 2, 0 ) int -> [fp-0x04] EH-live single-def
;# V06 OutArgs [V06 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
;* V07 tmp1 [V07 ] ( 0, 0 ) ref -> zero-ref class-hnd "impSpillSpecialSideEff" <<unknown class>>
-; V08 tmp2 [V08,T00] ( 2, 16 ) int -> a0 "V03.[000..004)"
+; V08 tmp2 [V08,T01] ( 2, 16 ) int -> a0 "V03.[000..004)"
;* V09 tmp3 [V09 ] ( 0, 0 ) int -> zero-ref single-def "V00.[000..004)"
-; V10 tmp4 [V10,T02] ( 4, 11 ) int -> s2 single-def "V04.[000..004)"
-; V11 tmp5 [V11,T07] ( 2, 2 ) int -> s2 single-def "V01.[000..004)"
-; V12 cse0 [V12,T03] ( 2, 9 ) long -> s4 hoist "CSE #03: aggressive"
-; V13 cse1 [V13,T04] ( 2, 9 ) int -> s3 hoist "CSE #01: aggressive"
-; V14 cse2 [V14,T05] ( 2, 9 ) int -> s5 hoist "CSE #04: aggressive"
-; V15 rat0 [V15,T06] ( 3, 3 ) long -> a2 "V01.a2"
+; V10 tmp4 [V10,T00] ( 4, 18 ) int -> s2 single-def "V04.[000..004)"
+; V11 tmp5 [V11,T06] ( 2, 2 ) int -> s2 single-def "V01.[000..004)"
+; V12 cse0 [V12,T03] ( 2, 9 ) int -> s3 hoist "CSE #01: aggressive"
+; V13 cse1 [V13,T04] ( 2, 9 ) int -> s4 hoist "CSE #02: aggressive"
+; V14 rat0 [V14,T05] ( 3, 3 ) long -> a2 "V01.a2"
;
-; Lcl frame size = 8
-Frame info. #outsz=0; #framesz=64; lcl=8
+; Lcl frame size = 16
+Frame info. #outsz=0; #framesz=64; lcl=16
G_M52587_IG01: ; bbWeight=1, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref, nogc <-- Prolog IG
addi sp, sp, -64
- sd fp, 8(sp)
- sd ra, 16(sp)
- sd s1, 24(sp)
- sd s2, 32(sp)
- sd s3, 40(sp)
- sd s4, 48(sp)
- sd s5, 56(sp)
- addi fp, sp, 8
+ sd fp, 16(sp)
+ sd ra, 24(sp)
+ sd s1, 32(sp)
+ sd s2, 40(sp)
+ sd s3, 48(sp)
+ sd s4, 56(sp)
+ addi fp, sp, 16
mv s1, a4
; gcrRegs +[s1]
- ;; size=40 bbWeight=1 PerfScore 29.50
+ ;; size=36 bbWeight=1 PerfScore 25.50
G_M52587_IG02: ; bbWeight=1, gcrefRegs=0200 {s1}, byrefRegs=0000 {}, byref
sext.w s2, a2
;; size=4 bbWeight=1 PerfScore 0.50
G_M52587_IG03: ; bbWeight=1, gcrefRegs=0200 {s1}, byrefRegs=0000 {}, byref
lw s3, 0xD1FFAB1E(s1)
- slli.uw s4, s2, 2
- addiw s5, s2, 0xD1FFAB1E
- ;; size=12 bbWeight=1 PerfScore 3.00
+ addiw s4, s2, 0xD1FFAB1E
+ ;; size=8 bbWeight=1 PerfScore 2.50
G_M52587_IG04: ; bbWeight=8, gcrefRegs=0200 {s1}, byrefRegs=0000 {}, byref, isz
sext.w a0, s3
sext.w a1, s2
bgeu a1, a0, G_M52587_IG05
- add a0, s1, s4
+ sh2add.uw a0, s2, s1
; byrRegs +[a0]
lw a0, 0xD1FFAB1E(a0)
; byrRegs -[a0]
@@ -64,7 +61,7 @@ G_M52587_IG04: ; bbWeight=8, gcrefRegs=0200 {s1}, byrefRegs=0000 {}, byre
ld a1, 0xD1FFAB1E(a1)
jalr a1 // <unknown method>
; gcr arg pop 0
- sext.w a0, s5
+ sext.w a0, s4
sext.w a0, a0
addi a1, zero, 0xD1FFAB1E
blt a0, a1, G_M52587_IG04
@@ -85,28 +82,26 @@ G_M52587_IG06: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
addi a0, zero, 0xD1FFAB1E
;; size=4 bbWeight=1 PerfScore 0.50
G_M52587_IG07: ; bbWeight=1, epilog, nogc, extend
- ld s5, 56(sp)
- ld s4, 48(sp)
- ld s3, 40(sp)
- ld s2, 32(sp)
- ld s1, 24(sp)
- ld ra, 16(sp)
- ld fp, 8(sp)
+ ld s4, 56(sp)
+ ld s3, 48(sp)
+ ld s2, 40(sp)
+ ld s1, 32(sp)
+ ld ra, 24(sp)
+ ld fp, 16(sp)
addi sp, sp, 64
- ret ;; size=36 bbWeight=1 PerfScore 17.50
+ ret ;; size=32 bbWeight=1 PerfScore 15.50
G_M52587_IG08: ; bbWeight=0, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
lw a0, -4(fp)
;; size=4 bbWeight=0 PerfScore 0.00
G_M52587_IG09: ; bbWeight=0, epilog, nogc, extend
- ld s5, 56(sp)
- ld s4, 48(sp)
- ld s3, 40(sp)
- ld s2, 32(sp)
- ld s1, 24(sp)
- ld ra, 16(sp)
- ld fp, 8(sp)
+ ld s4, 56(sp)
+ ld s3, 48(sp)
+ ld s2, 40(sp)
+ ld s1, 32(sp)
+ ld ra, 24(sp)
+ ld fp, 16(sp)
addi sp, sp, 64
- ret ;; size=36 bbWeight=0 PerfScore 0.00
+ ret ;; size=32 bbWeight=0 PerfScore 0.00
G_M52587_IG10: ; bbWeight=0, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, funclet prolog, nogc
addi sp, sp, -64
sd fp, 0(sp)
@@ -115,8 +110,7 @@ G_M52587_IG10: ; bbWeight=0, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
sd s2, 24(sp)
sd s3, 32(sp)
sd s4, 40(sp)
- sd s5, 48(sp)
- ;; size=32 bbWeight=0 PerfScore 0.00
+ ;; size=28 bbWeight=0 PerfScore 0.00
G_M52587_IG11: ; bbWeight=0, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
lui a0, 0xD1FFAB1E
addiw a0, a0, 0xD1FFAB1E
@@ -130,7 +124,6 @@ G_M52587_IG11: ; bbWeight=0, gcVars=0000000000000000 {}, gcrefRegs=0000 {
addi a0, a0, 0xD1FFAB1E
;; size=40 bbWeight=0 PerfScore 0.00
G_M52587_IG12: ; bbWeight=0, funclet epilog, nogc, extend
- ld s5, 48(sp)
ld s4, 40(sp)
ld s3, 32(sp)
ld s2, 24(sp)
@@ -138,20 +131,20 @@ G_M52587_IG12: ; bbWeight=0, funclet epilog, nogc, extend
ld ra, 8(sp)
ld fp, 0(sp)
addi sp, sp, 64
- ret ;; size=36 bbWeight=0 PerfScore 0.00
+ ret ;; size=32 bbWeight=0 PerfScore 0.00
-; Total bytes of code 340, prolog size 40, PerfScore 239.00, instruction count 72, allocated bytes for code 340 (MethodHash=f6ef3294) for method Runtime_61040_2:Problem(StructWithHoles,StructWithHoles,int[]):int (FullOpts)
+; Total bytes of code 316, prolog size 36, PerfScore 232.50, instruction count 66, allocated bytes for code 316 (MethodHash=f6ef3294) for method Runtime_61040_2:Problem(StructWithHoles,StructWithHoles,int[]):int (FullOpts)
; ============================================================
Unwind Info:
>> Start offset : 0x000000 (not in unwind data)
>> End offset : 0xd1ffab1e (not in unwind data)
- Code Words : 7
+ Code Words : 6
Epilog Count : 2
E bit : 0
X bit : 0
Vers : 0
- Function Length : 116 (0x00074) Actual length = 232 (0x0000e8)
+ Function Length : 108 (0x0006c) Actual length = 216 (0x0000d8)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)
@@ -160,33 +153,30 @@ Unwind Info:
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)
Epilog Start Index : 3 (0x03)
---- Unwind codes ----
- E2 00 01 add_fp 1 (0x01); addi fp, sp, #8
+ E2 00 02 add_fp 2 (0x02); addi fp, sp, #16
---- Epilog start at index 3 ----
- D0 14 07 save_reg X#20 Z#7 (0x07); sd s5, sp, 56
- D0 13 06 save_reg X#19 Z#6 (0x06); sd s4, sp, 48
- D0 12 05 save_reg X#18 Z#5 (0x05); sd s3, sp, 40
- D0 11 04 save_reg X#17 Z#4 (0x04); sd s2, sp, 32
- D0 08 03 save_reg X#8 Z#3 (0x03); sd s1, sp, 24
- D0 00 02 save_reg X#0 Z#2 (0x02); sd ra, sp, 16
- D0 07 01 save_reg X#7 Z#1 (0x01); sd fp, sp, 8
+ D0 13 07 save_reg X#19 Z#7 (0x07); sd s4, sp, 56
+ D0 12 06 save_reg X#18 Z#6 (0x06); sd s3, sp, 48
+ D0 11 05 save_reg X#17 Z#5 (0x05); sd s2, sp, 40
+ D0 08 04 save_reg X#8 Z#4 (0x04); sd s1, sp, 32
+ D0 00 03 save_reg X#0 Z#3 (0x03); sd ra, sp, 24
+ D0 07 02 save_reg X#7 Z#2 (0x02); sd fp, sp, 16
04 alloc_s #4 (0x04); addi sp, sp, -64 (0x040)
E4 end
E4 end
- E4 end
Unwind Info:
>> Start offset : 0xd1ffab1e (not in unwind data)
>> End offset : 0xd1ffab1e (not in unwind data)
- Code Words : 6
+ Code Words : 5
Epilog Count : 0
E bit : 1
X bit : 0
Vers : 0
- Function Length : 54 (0x00036) Actual length = 108 (0x00006c)
+ Function Length : 50 (0x00032) Actual length = 100 (0x000064)
--- One epilog, unwind codes at 0
---- Unwind codes ----
---- Epilog start at index 0 ----
- D0 14 06 save_reg X#20 Z#6 (0x06); sd s5, sp, 48
D0 13 05 save_reg X#19 Z#5 (0x05); sd s4, sp, 40
D0 12 04 save_reg X#18 Z#4 (0x04); sd s3, sp, 32
D0 11 03 save_reg X#17 Z#3 (0x03); sd s2, sp, 24
@@ -195,7 +185,6 @@ Unwind Info:
D0 07 00 save_reg X#7 Z#0 (0x00); sd fp, sp, 0
04 alloc_s #4 (0x04); addi sp, sp, -64 (0x040)
E4 end
- E4 end
*************** EH table for Runtime_61040_2:Problem(StructWithHoles,StructWithHoles,int[]):int
1 EH table entries-16 (-3.81%) : 20676.dasm - System.RuntimeTypeHandle:CopyRuntimeTypeHandles(System.Type[],byref):nint[] (FullOpts)@@ -8,41 +8,39 @@
; 0 inlinees with PGO data; 0 single block inlinees; 1 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T05] ( 6, 7.50) ref -> s1 class-hnd single-def <System.Type[]>
-; V01 arg1 [V01,T08] ( 4, 3 ) byref -> s2 single-def
-; V02 loc0 [V02,T06] ( 7, 6.04) ref -> s4 class-hnd exact single-def <nint[]>
-; V03 loc1 [V03,T01] ( 11, 16.58) int -> s5
+; V00 arg0 [V00,T04] ( 6, 7.50) ref -> s1 class-hnd single-def <System.Type[]>
+; V01 arg1 [V01,T07] ( 4, 3 ) byref -> s2 single-def
+; V02 loc0 [V02,T05] ( 7, 6.04) ref -> s4 class-hnd exact single-def <nint[]>
+; V03 loc1 [V03,T01] ( 12, 20.54) int -> s5
;* V04 loc2 [V04 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op <System.RuntimeTypeHandle>
;# V05 OutArgs [V05 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
;* V06 tmp1 [V06 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewArr temp" <nint[]>
-; V07 tmp2 [V07,T02] ( 6, 16 ) long -> s7 "Strict ordering of exceptions for Array store"
+; V07 tmp2 [V07,T02] ( 6, 16 ) long -> s6 "Strict ordering of exceptions for Array store"
;* V08 tmp3 [V08 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "dup spill" <System.RuntimeType>
;* V09 tmp4 [V09 ] ( 0, 0 ) ref -> zero-ref
-; V10 tmp5 [V10,T04] ( 6, 10 ) ref -> a0 "field V04.m_type (fldOffset=0x0)" P-INDEP
+; V10 tmp5 [V10,T03] ( 6, 10 ) ref -> a0 "field V04.m_type (fldOffset=0x0)" P-INDEP
; V11 tmp6 [V11,T00] ( 6, 24 ) ref -> a0 "argument with side effect"
-; V12 cse0 [V12,T03] ( 3, 11.88) long -> s6 "CSE #03: aggressive"
-; V13 cse1 [V13,T07] ( 6, 6 ) int -> s3 "CSE #01: aggressive"
+; V12 cse0 [V12,T06] ( 6, 6 ) int -> s3 "CSE #01: aggressive"
;
-; Lcl frame size = 8
-Frame info. #outsz=0; #framesz=80; lcl=8
+; Lcl frame size = 0
+Frame info. #outsz=0; #framesz=64; lcl=0
G_M5038_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- addi sp, sp, -80
- sd fp, 8(sp)
- sd ra, 16(sp)
- sd s1, 24(sp)
- sd s2, 32(sp)
- sd s3, 40(sp)
- sd s4, 48(sp)
- sd s5, 56(sp)
- sd s6, 64(sp)
- sd s7, 72(sp)
- addi fp, sp, 8
+ addi sp, sp, -64
+ sd fp, 0(sp)
+ sd ra, 8(sp)
+ sd s1, 16(sp)
+ sd s2, 24(sp)
+ sd s3, 32(sp)
+ sd s4, 40(sp)
+ sd s5, 48(sp)
+ sd s6, 56(sp)
+ mv fp, sp
mv s1, a0
; gcrRegs +[s1]
mv s2, a1
; byrRegs +[s2]
- ;; size=52 bbWeight=1 PerfScore 38.00
+ ;; size=48 bbWeight=1 PerfScore 34.00
G_M5038_IG02: ; bbWeight=1, gcrefRegs=0200 {s1}, byrefRegs=40000 {s2}, byref, isz
beqz s1, G_M5038_IG14
;; size=4 bbWeight=1 PerfScore 3.50
@@ -72,8 +70,7 @@ G_M5038_IG03: ; bbWeight=0.50, gcrefRegs=0200 {s1}, byrefRegs=40000 {s2},
blt a0, a1, G_M5038_IG12
;; size=80 bbWeight=0.50 PerfScore 13.00
G_M5038_IG04: ; bbWeight=3.96, gcrefRegs=100200 {s1 s4}, byrefRegs=40000 {s2}, byref, isz
- slli.uw s6, s5, 3
- add a0, s1, s6
+ sh3add.uw a0, s5, s1
; byrRegs +[a0]
ld a0, 0xD1FFAB1E(a0)
; gcrRegs +[a0]
@@ -83,19 +80,19 @@ G_M5038_IG04: ; bbWeight=3.96, gcrefRegs=100200 {s1 s4}, byrefRegs=40000
ld a1, 0xD1FFAB1E(a1)
jalr a1 // <unknown method>
beqz a0, G_M5038_IG06
- ;; size=32 bbWeight=3.96 PerfScore 61.38
+ ;; size=28 bbWeight=3.96 PerfScore 59.40
G_M5038_IG05: ; bbWeight=1.98, gcrefRegs=100600 {s1 a0 s4}, byrefRegs=40000 {s2}, byref, isz
- ld s7, 0xD1FFAB1E(a0)
+ ld s6, 0xD1FFAB1E(a0)
j G_M5038_IG07
;; size=8 bbWeight=1.98 PerfScore 6.93
G_M5038_IG06: ; bbWeight=1.98, gcrefRegs=100200 {s1 s4}, byrefRegs=40000 {s2}, byref
; gcrRegs -[a0]
- mv s7, zero
+ mv s6, zero
;; size=4 bbWeight=1.98 PerfScore 0.99
G_M5038_IG07: ; bbWeight=3.96, gcrefRegs=100200 {s1 s4}, byrefRegs=40000 {s2}, byref, isz
- add a0, s4, s6
+ sh3add.uw a0, s5, s4
; byrRegs +[a0]
- sd s7, 0xD1FFAB1E(a0)
+ sd s6, 0xD1FFAB1E(a0)
addiw s5, s5, 0xD1FFAB1E
sext.w a0, s3
; byrRegs -[a0]
@@ -110,20 +107,19 @@ G_M5038_IG08: ; bbWeight=0.50, gcrefRegs=100000 {s4}, byrefRegs=40000 {s2
; gcrRegs +[a0]
;; size=12 bbWeight=0.50 PerfScore 3.25
G_M5038_IG09: ; bbWeight=0.50, epilog, nogc, extend
- ld s7, 72(sp)
- ld s6, 64(sp)
- ld s5, 56(sp)
- ld s4, 48(sp)
- ld s3, 40(sp)
- ld s2, 32(sp)
- ld s1, 24(sp)
- ld ra, 16(sp)
- ld fp, 8(sp)
- addi sp, sp, 80
- ret ;; size=44 bbWeight=0.50 PerfScore 10.75
+ ld s6, 56(sp)
+ ld s5, 48(sp)
+ ld s4, 40(sp)
+ ld s3, 32(sp)
+ ld s2, 24(sp)
+ ld s1, 16(sp)
+ ld ra, 8(sp)
+ ld fp, 0(sp)
+ addi sp, sp, 64
+ ret ;; size=40 bbWeight=0.50 PerfScore 9.75
G_M5038_IG10: ; bbWeight=0.02, gcVars=0000000000000000 {}, gcrefRegs=100200 {s1 s4}, byrefRegs=40000 {s2}, gcvars, byref
; gcrRegs -[a0] +[s1]
- mv s7, zero
+ mv s6, zero
;; size=4 bbWeight=0.02 PerfScore 0.01
G_M5038_IG11: ; bbWeight=0.04, gcrefRegs=100200 {s1 s4}, byrefRegs=40000 {s2}, byref, isz
lw a0, 0xD1FFAB1E(s4)
@@ -132,7 +128,7 @@ G_M5038_IG11: ; bbWeight=0.04, gcrefRegs=100200 {s1 s4}, byrefRegs=40000
bgeu a2, a1, G_M5038_IG16
sh3add.uw a0, s5, s4
; byrRegs +[a0]
- sd s7, 0xD1FFAB1E(a0)
+ sd s6, 0xD1FFAB1E(a0)
addiw s5, s5, 0xD1FFAB1E
sext.w a0, s3
; byrRegs -[a0]
@@ -152,7 +148,7 @@ G_M5038_IG12: ; bbWeight=0.04, gcrefRegs=100200 {s1 s4}, byrefRegs=40000
beqz a0, G_M5038_IG10
;; size=28 bbWeight=0.04 PerfScore 0.60
G_M5038_IG13: ; bbWeight=0.02, gcrefRegs=100600 {s1 a0 s4}, byrefRegs=40000 {s2}, byref, isz
- ld s7, 0xD1FFAB1E(a0)
+ ld s6, 0xD1FFAB1E(a0)
j G_M5038_IG11
;; size=8 bbWeight=0.02 PerfScore 0.07
G_M5038_IG14: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=40000 {s2}, byref
@@ -162,17 +158,16 @@ G_M5038_IG14: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=40000 {s2}, b
; gcrRegs +[a0]
;; size=8 bbWeight=0.50 PerfScore 2.25
G_M5038_IG15: ; bbWeight=0.50, epilog, nogc, extend
- ld s7, 72(sp)
- ld s6, 64(sp)
- ld s5, 56(sp)
- ld s4, 48(sp)
- ld s3, 40(sp)
- ld s2, 32(sp)
- ld s1, 24(sp)
- ld ra, 16(sp)
- ld fp, 8(sp)
- addi sp, sp, 80
- ret ;; size=44 bbWeight=0.50 PerfScore 10.75
+ ld s6, 56(sp)
+ ld s5, 48(sp)
+ ld s4, 40(sp)
+ ld s3, 32(sp)
+ ld s2, 24(sp)
+ ld s1, 16(sp)
+ ld ra, 8(sp)
+ ld fp, 0(sp)
+ addi sp, sp, 64
+ ret ;; size=40 bbWeight=0.50 PerfScore 9.75
G_M5038_IG16: ; bbWeight=0, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
; gcrRegs -[a0]
; byrRegs -[s2]
@@ -185,37 +180,37 @@ G_M5038_IG16: ; bbWeight=0, gcVars=0000000000000000 {}, gcrefRegs=0000 {}
ebreak
;; size=28 bbWeight=0 PerfScore 0.00
-; Total bytes of code 420, prolog size 44, PerfScore 189.74, instruction count 94, allocated bytes for code 420 (MethodHash=fc39ec51) for method System.RuntimeTypeHandle:CopyRuntimeTypeHandles(System.Type[],byref):nint[] (FullOpts)
+; Total bytes of code 404, prolog size 40, PerfScore 181.76, instruction count 90, allocated bytes for code 404 (MethodHash=fc39ec51) for method System.RuntimeTypeHandle:CopyRuntimeTypeHandles(System.Type[],byref):nint[] (FullOpts)
; ============================================================
Unwind Info:
>> Start offset : 0x000000 (not in unwind data)
>> End offset : 0xd1ffab1e (not in unwind data)
- Code Words : 8
+ Code Words : 7
Epilog Count : 2
E bit : 0
X bit : 0
Vers : 0
- Function Length : 210 (0x000d2) Actual length = 420 (0x0001a4)
+ Function Length : 202 (0x000ca) Actual length = 404 (0x000194)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)
- Epilog Start Index : 3 (0x03)
+ Epilog Start Index : 1 (0x01)
---- Scope 1
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)
- Epilog Start Index : 3 (0x03)
+ Epilog Start Index : 1 (0x01)
---- Unwind codes ----
- E2 00 01 add_fp 1 (0x01); addi fp, sp, #8
- ---- Epilog start at index 3 ----
- D0 16 09 save_reg X#22 Z#9 (0x09); sd s7, sp, 72
- D0 15 08 save_reg X#21 Z#8 (0x08); sd s6, sp, 64
- D0 14 07 save_reg X#20 Z#7 (0x07); sd s5, sp, 56
- D0 13 06 save_reg X#19 Z#6 (0x06); sd s4, sp, 48
- D0 12 05 save_reg X#18 Z#5 (0x05); sd s3, sp, 40
- D0 11 04 save_reg X#17 Z#4 (0x04); sd s2, sp, 32
- D0 08 03 save_reg X#8 Z#3 (0x03); sd s1, sp, 24
- D0 00 02 save_reg X#0 Z#2 (0x02); sd ra, sp, 16
- D0 07 01 save_reg X#7 Z#1 (0x01); sd fp, sp, 8
- 05 alloc_s #5 (0x05); addi sp, sp, -80 (0x050)
+ E1 set_fp; move fp, sp
+ ---- Epilog start at index 1 ----
+ D0 15 07 save_reg X#21 Z#7 (0x07); sd s6, sp, 56
+ D0 14 06 save_reg X#20 Z#6 (0x06); sd s5, sp, 48
+ D0 13 05 save_reg X#19 Z#5 (0x05); sd s4, sp, 40
+ D0 12 04 save_reg X#18 Z#4 (0x04); sd s3, sp, 32
+ D0 11 03 save_reg X#17 Z#3 (0x03); sd s2, sp, 24
+ D0 08 02 save_reg X#8 Z#2 (0x02); sd s1, sp, 16
+ D0 00 01 save_reg X#0 Z#1 (0x01); sd ra, sp, 8
+ D0 07 00 save_reg X#7 Z#0 (0x00); sd fp, sp, 0
+ 04 alloc_s #4 (0x04); addi sp, sp, -64 (0x040)
+ E4 end
E4 end
-12 (-3.45%) : 799.dasm - System.Text.Ascii:ChangeCase[ushort,ushort,System.Text.Ascii+ToLowerConversion](ptr,ptr,nuint):nuint (FullOpts)@@ -11,13 +11,13 @@
; V00 arg0 [V00,T06] ( 5, 10 ) long -> a0 single-def
; V01 arg1 [V01,T04] ( 5, 14 ) long -> a1 single-def
; V02 arg2 [V02,T03] ( 6, 16 ) long -> a2 single-def
-;* V03 loc0 [V03,T14] ( 0, 0 ) ubyte -> zero-ref
-;* V04 loc1 [V04,T15] ( 0, 0 ) ubyte -> zero-ref
-;* V05 loc2 [V05,T16] ( 0, 0 ) ubyte -> zero-ref
-;* V06 loc3 [V06,T17] ( 0, 0 ) ubyte -> zero-ref
-;* V07 loc4 [V07,T18] ( 0, 0 ) ubyte -> zero-ref
+;* V03 loc0 [V03,T11] ( 0, 0 ) ubyte -> zero-ref
+;* V04 loc1 [V04,T12] ( 0, 0 ) ubyte -> zero-ref
+;* V05 loc2 [V05,T13] ( 0, 0 ) ubyte -> zero-ref
+;* V06 loc3 [V06,T14] ( 0, 0 ) ubyte -> zero-ref
+;* V07 loc4 [V07,T15] ( 0, 0 ) ubyte -> zero-ref
;* V08 loc5 [V08 ] ( 0, 0 ) int -> zero-ref
-; V09 loc6 [V09,T00] ( 15, 47.25) long -> a3
+; V09 loc6 [V09,T00] ( 18, 59.25) long -> a3
;* V10 loc7 [V10 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V11 loc8 [V11 ] ( 0, 0 ) ushort -> zero-ref
;* V12 loc9 [V12 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ushort]>
@@ -25,26 +25,26 @@
;* V14 loc11 [V14 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V15 loc12 [V15 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V16 loc13 [V16 ] ( 0, 0 ) int -> zero-ref
-; V17 loc14 [V17,T01] ( 7, 24 ) long -> a5
+; V17 loc14 [V17,T01] ( 7, 24 ) long -> a4
;* V18 loc15 [V18 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ulong]>
;* V19 loc16 [V19 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[uint]>
-; V20 loc17 [V20,T02] ( 7, 24 ) int -> a5
+; V20 loc17 [V20,T02] ( 7, 24 ) int -> a4
;* V21 loc18 [V21 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[uint]>
;* V22 loc19 [V22 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ulong]>
;* V23 loc20 [V23 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ushort]>
-; V24 loc21 [V24,T05] ( 5, 16 ) int -> a6
+; V24 loc21 [V24,T05] ( 5, 16 ) int -> a5
;# V25 OutArgs [V25 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
;* V26 tmp1 [V26 ] ( 0, 0 ) int -> zero-ref
;* V27 tmp2 [V27 ] ( 0, 0 ) int -> zero-ref
;* V28 tmp3 [V28 ] ( 0, 0 ) int -> zero-ref
-;* V29 tmp4 [V29,T19] ( 0, 0 ) int -> zero-ref
-; V30 tmp5 [V30,T11] ( 2, 8 ) int -> a5
+;* V29 tmp4 [V29,T16] ( 0, 0 ) int -> zero-ref
+; V30 tmp5 [V30,T08] ( 2, 8 ) int -> a4
;* V31 tmp6 [V31 ] ( 0, 0 ) struct (16) zero-ref "dup spill" <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V32 tmp7 [V32 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.Runtime.Intrinsics.Vector128`1[byte]>
;* V33 tmp8 [V33 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.Runtime.Intrinsics.Vector128`1[byte]>
;* V34 tmp9 [V34 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V35 tmp10 [V35 ] ( 0, 0 ) int -> zero-ref
-; V36 tmp11 [V36,T12] ( 2, 8 ) long -> a5
+; V36 tmp11 [V36,T09] ( 2, 8 ) long -> a4
;* V37 tmp12 [V37 ] ( 0, 0 ) struct (16) zero-ref "dup spill" <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V38 tmp13 [V38 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.Runtime.Intrinsics.Vector128`1[byte]>
;* V39 tmp14 [V39 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.Runtime.Intrinsics.Vector128`1[byte]>
@@ -220,11 +220,11 @@
;* V209 tmp184 [V209 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V210 tmp185 [V210 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V211 tmp186 [V211 ] ( 0, 0 ) ushort -> zero-ref "Inlining Arg"
-; V212 tmp187 [V212,T08] ( 3, 10 ) int -> a5 ld-addr-op "Inline ldloca(s) first use temp"
+; V212 tmp187 [V212,T07] ( 3, 10 ) int -> a4 ld-addr-op "Inline ldloca(s) first use temp"
;* V213 tmp188 [V213 ] ( 0, 0 ) ubyte -> zero-ref "Inline return value spill temp"
;* V214 tmp189 [V214 ] ( 0, 0 ) ushort -> zero-ref "Inline stloc first use temp"
;* V215 tmp190 [V215 ] ( 0, 0 ) ubyte -> zero-ref "Inline return value spill temp"
-; V216 tmp191 [V216,T13] ( 2, 8 ) ushort -> a5 ld-addr-op "Inline ldloca(s) first use temp"
+; V216 tmp191 [V216,T10] ( 2, 8 ) ushort -> a4 ld-addr-op "Inline ldloca(s) first use temp"
;* V217 tmp192 [V217 ] ( 0, 0 ) ubyte -> zero-ref "Inline return value spill temp"
;* V218 tmp193 [V218 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V219 tmp194 [V219 ] ( 0, 0 ) ubyte -> zero-ref "Inline return value spill temp"
@@ -305,9 +305,6 @@
;* V294 tmp269 [V294 ] ( 0, 0 ) long -> zero-ref "field V207._lower (fldOffset=0x0)" P-INDEP
;* V295 tmp270 [V295 ] ( 0, 0 ) long -> zero-ref "field V207._upper (fldOffset=0x8)" P-INDEP
;* V296 tmp271 [V296 ] ( 0, 0 ) byref -> zero-ref "BlockOp address local"
-; V297 cse0 [V297,T09] ( 3, 8 ) long -> a4 "CSE #01: moderate"
-; V298 cse1 [V298,T10] ( 3, 8 ) long -> a4 "CSE #04: moderate"
-; V299 cse2 [V299,T07] ( 3, 12 ) long -> a4 "CSE #07: moderate"
;
; Lcl frame size = 0
Frame info. #outsz=0; #framesz=16; lcl=0
@@ -323,23 +320,23 @@ G_M31524_IG02: ; bbWeight=0.25, gcrefRegs=0000 {}, byrefRegs=0000 {}, byr
j G_M31524_IG04
;; size=8 bbWeight=0.25 PerfScore 0.50
G_M31524_IG03: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
+ auipc a5, 0xD1FFAB1E
+ ld a5, 0xD1FFAB1E(a5)
+ add a5, a4, a5
auipc a6, 0xD1FFAB1E
ld a6, 0xD1FFAB1E(a6)
- add a6, a5, a6
- auipc a7, 0xD1FFAB1E
- ld a7, 0xD1FFAB1E(a7)
- add a7, a5, a7
- xor a6, a6, a7
- lui a7, 0xD1FFAB1E
- slli a7, a7, 12
- addi a7, a7, 0xD1FFAB1E
- slli a7, a7, 13
- addi a7, a7, 0xD1FFAB1E
- and a6, a6, a7
- srli a6, a6, 2
- xor a5, a6, a5
- add t6, a1, a4
- sd a5, 0xD1FFAB1E(t6)
+ add a6, a4, a6
+ xor a5, a5, a6
+ lui a6, 0xD1FFAB1E
+ slli a6, a6, 12
+ addi a6, a6, 0xD1FFAB1E
+ slli a6, a6, 13
+ addi a6, a6, 0xD1FFAB1E
+ and a5, a5, a6
+ srli a5, a5, 2
+ xor a4, a5, a4
+ sh1add a5, a3, a1
+ sd a4, 0xD1FFAB1E(a5)
addi a3, a3, 0xD1FFAB1E
;; size=72 bbWeight=4 PerfScore 68.00
G_M31524_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
@@ -348,33 +345,32 @@ G_M31524_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
bltu a4, a5, G_M31524_IG07
;; size=12 bbWeight=4 PerfScore 18.00
G_M31524_IG05: ; bbWeight=2, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
- slli a4, a3, 1
- add t6, a0, a4
- ld a5, 0xD1FFAB1E(t6)
- auipc a6, 0xD1FFAB1E
- ld a6, 0xD1FFAB1E(a6)
- and a6, a5, a6
- bnez a6, G_M31524_IG07
+ sh1add a4, a3, a0
+ ld a4, 0xD1FFAB1E(a4)
+ auipc a5, 0xD1FFAB1E
+ ld a5, 0xD1FFAB1E(a5)
+ and a5, a4, a5
+ bnez a5, G_M31524_IG07
j G_M31524_IG03
- ;; size=32 bbWeight=2 PerfScore 21.00
+ ;; size=28 bbWeight=2 PerfScore 20.00
G_M31524_IG06: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
+ lui a5, 0xD1FFAB1E
+ addiw a5, a5, 0xD1FFAB1E
+ addw a5, a4, a5
lui a6, 0xD1FFAB1E
addiw a6, a6, 0xD1FFAB1E
- addw a6, a5, a6
- lui a7, 0xD1FFAB1E
- addiw a7, a7, 0xD1FFAB1E
- addw a7, a5, a7
- xor a6, a6, a7
- sext.w a6, a6
- lui a7, 0xD1FFAB1E
- addiw a7, a7, 0xD1FFAB1E
- and a6, a6, a7
- sext.w a6, a6
- srliw a6, a6, 2
- xor a5, a6, a5
+ addw a6, a4, a6
+ xor a5, a5, a6
sext.w a5, a5
- add t6, a1, a4
- sw a5, 0xD1FFAB1E(t6)
+ lui a6, 0xD1FFAB1E
+ addiw a6, a6, 0xD1FFAB1E
+ and a5, a5, a6
+ sext.w a5, a5
+ srliw a5, a5, 2
+ xor a4, a5, a4
+ sext.w a4, a4
+ sh1add a5, a3, a1
+ sw a4, 0xD1FFAB1E(a5)
addi a3, a3, 0xD1FFAB1E
;; size=72 bbWeight=4 PerfScore 62.00
G_M31524_IG07: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
@@ -383,38 +379,36 @@ G_M31524_IG07: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
bltu a4, a5, G_M31524_IG09
;; size=12 bbWeight=4 PerfScore 18.00
G_M31524_IG08: ; bbWeight=2, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
- slli a4, a3, 1
- add t6, a0, a4
- lw a5, 0xD1FFAB1E(t6)
- lui a6, 0xD1FFAB1E
- addiw a6, a6, 0xD1FFAB1E
- and a6, a5, a6
- sext.w a6, a6
- sext.w a6, a6
- beqz a6, G_M31524_IG06
- ;; size=36 bbWeight=2 PerfScore 20.00
+ sh1add a4, a3, a0
+ lw a4, 0xD1FFAB1E(a4)
+ lui a5, 0xD1FFAB1E
+ addiw a5, a5, 0xD1FFAB1E
+ and a5, a4, a5
+ sext.w a5, a5
+ sext.w a5, a5
+ beqz a5, G_M31524_IG06
+ ;; size=32 bbWeight=2 PerfScore 19.00
G_M31524_IG09: ; bbWeight=2, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
bgeu a3, a2, G_M31524_IG13
;; size=4 bbWeight=2 PerfScore 7.00
G_M31524_IG10: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
- slli a4, a3, 1
- add t6, a0, a4
- lhu a5, 0xD1FFAB1E(t6)
+ sh1add a4, a3, a0
+ lhu a4, 0xD1FFAB1E(a4)
+ sext.w a5, a4
sext.w a6, a5
- sext.w a7, a6
- addi t0, zero, 0xD1FFAB1E
- bltu t0, a7, G_M31524_IG13
- ;; size=28 bbWeight=4 PerfScore 36.00
+ addi a7, zero, 0xD1FFAB1E
+ bltu a7, a6, G_M31524_IG13
+ ;; size=24 bbWeight=4 PerfScore 34.00
G_M31524_IG11: ; bbWeight=2, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
- addiw a7, a6, 0xD1FFAB1E
- addi t0, zero, 0xD1FFAB1E
- bltu t0, a7, G_M31524_IG12
addiw a6, a5, 0xD1FFAB1E
+ addi a7, zero, 0xD1FFAB1E
+ bltu a7, a6, G_M31524_IG12
+ addiw a5, a4, 0xD1FFAB1E
;; size=16 bbWeight=2 PerfScore 10.00
G_M31524_IG12: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
- zext.h a5, a6
- add t6, a1, a4
- sh a5, 0xD1FFAB1E(t6)
+ zext.h a4, a5
+ sh1add a5, a3, a1
+ sh a4, 0xD1FFAB1E(a5)
addi a3, a3, 0xD1FFAB1E
bltu a3, a2, G_M31524_IG10
;; size=20 bbWeight=4 PerfScore 36.00
@@ -431,7 +425,7 @@ RWD08 dq 0025002500250025h
RWD16 dq FF80FF80FF80FF80h
-; Total bytes of code 348, prolog size 16, PerfScore 306.75, instruction count 76, allocated bytes for code 348 (MethodHash=91c584db) for method System.Text.Ascii:ChangeCase[ushort,ushort,System.Text.Ascii+ToLowerConversion](ptr,ptr,nuint):nuint (FullOpts)
+; Total bytes of code 336, prolog size 16, PerfScore 302.75, instruction count 73, allocated bytes for code 336 (MethodHash=91c584db) for method System.Text.Ascii:ChangeCase[ushort,ushort,System.Text.Ascii+ToLowerConversion](ptr,ptr,nuint):nuint (FullOpts)
; ============================================================
Unwind Info:
@@ -442,7 +436,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 174 (0x000ae) Actual length = 348 (0x00015c)
+ Function Length : 168 (0x000a8) Actual length = 336 (0x000150)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)+20 (+2.99%) : 6032.dasm - System.Number+BigInteger:HeuristicDivide(byref,byref):uint (FullOpts)@@ -8,32 +8,32 @@
; 0 inlinees with PGO data; 40 single block inlinees; 10 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T24] ( 7, 5 ) byref -> s1 single-def
-; V01 arg1 [V01,T25] ( 5, 4 ) byref -> a1 single-def
+; V00 arg0 [V00,T22] ( 7, 5 ) byref -> s1 single-def
+; V01 arg1 [V01,T23] ( 5, 4 ) byref -> a1 single-def
; V02 loc0 [V02,T00] ( 15, 36 ) int -> s2
-; V03 loc1 [V03,T29] ( 3, 1.50) int -> a0
-; V04 loc2 [V04,T27] ( 6, 3 ) int -> s5
+; V03 loc1 [V03,T26] ( 4, 2 ) int -> a0
+; V04 loc2 [V04,T25] ( 6, 3 ) int -> s5
;* V05 loc3 [V05 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V06 loc4 [V06 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
-; V07 loc5 [V07,T02] ( 6, 20.50) int -> a0
-; V08 loc6 [V08,T13] ( 3, 8.50) long -> a2
-; V09 loc7 [V09,T14] ( 3, 8.50) long -> a3
-; V10 loc8 [V10,T09] ( 3, 12 ) long -> a5
-; V11 loc9 [V11,T10] ( 3, 12 ) long -> a5
+; V07 loc5 [V07,T01] ( 8, 28.50) int -> a0
+; V08 loc6 [V08,T11] ( 3, 8.50) long -> a2
+; V09 loc7 [V09,T12] ( 3, 8.50) long -> a3
+; V10 loc8 [V10,T07] ( 3, 12 ) long -> a5
+; V11 loc9 [V11,T08] ( 3, 12 ) long -> a5
;* V12 loc10 [V12 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V13 loc11 [V13 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V14 loc12 [V14 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V15 loc13 [V15 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
-; V16 loc14 [V16,T03] ( 6, 20.50) int -> a0
-; V17 loc15 [V17,T15] ( 3, 8.50) long -> a1
-; V18 loc16 [V18,T11] ( 3, 12 ) long -> a2
+; V16 loc14 [V16,T02] ( 8, 28.50) int -> a0
+; V17 loc15 [V17,T13] ( 3, 8.50) long -> a1
+; V18 loc16 [V18,T09] ( 3, 12 ) long -> a2
;* V19 loc17 [V19 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V20 loc18 [V20 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V21 loc19 [V21 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V22 loc20 [V22 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;# V23 OutArgs [V23 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
-; V24 tmp1 [V24,T28] ( 2, 2 ) int -> a2 "impAppendStmt"
-; V25 tmp2 [V25,T08] ( 2, 16 ) long -> a2 "impAppendStmt"
+; V24 tmp1 [V24,T27] ( 2, 2 ) int -> a2 "impAppendStmt"
+; V25 tmp2 [V25,T06] ( 2, 16 ) long -> a2 "impAppendStmt"
;* V26 tmp3 [V26 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V27 tmp4 [V27 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp" <System.Span`1[uint]>
;* V28 tmp5 [V28 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
@@ -74,34 +74,31 @@
;* V63 tmp40 [V63 ] ( 0, 0 ) int -> zero-ref "field V21._length (fldOffset=0x8)" P-INDEP
;* V64 tmp41 [V64 ] ( 0, 0 ) byref -> zero-ref "field V22._reference (fldOffset=0x0)" P-INDEP
;* V65 tmp42 [V65 ] ( 0, 0 ) int -> zero-ref "field V22._length (fldOffset=0x8)" P-INDEP
-; V66 tmp43 [V66,T31] ( 2, 1 ) byref -> a2 single-def "field V27._reference (fldOffset=0x0)" P-INDEP
+; V66 tmp43 [V66,T28] ( 2, 1 ) byref -> a2 single-def "field V27._reference (fldOffset=0x0)" P-INDEP
;* V67 tmp44 [V67 ] ( 0, 0 ) int -> zero-ref "field V27._length (fldOffset=0x8)" P-INDEP
-; V68 tmp45 [V68,T32] ( 2, 1 ) byref -> a3 single-def "field V29._reference (fldOffset=0x0)" P-INDEP
+; V68 tmp45 [V68,T29] ( 2, 1 ) byref -> a3 single-def "field V29._reference (fldOffset=0x0)" P-INDEP
;* V69 tmp46 [V69 ] ( 0, 0 ) int -> zero-ref "field V29._length (fldOffset=0x8)" P-INDEP
-; V70 tmp47 [V70,T16] ( 2, 8 ) byref -> a5 "field V31._reference (fldOffset=0x0)" P-INDEP
+; V70 tmp47 [V70,T14] ( 2, 8 ) byref -> a5 "field V31._reference (fldOffset=0x0)" P-INDEP
;* V71 tmp48 [V71 ] ( 0, 0 ) int -> zero-ref "field V31._length (fldOffset=0x8)" P-INDEP
-; V72 tmp49 [V72,T17] ( 2, 8 ) byref -> a7 "field V33._reference (fldOffset=0x0)" P-INDEP
+; V72 tmp49 [V72,T15] ( 2, 8 ) byref -> a6 "field V33._reference (fldOffset=0x0)" P-INDEP
;* V73 tmp50 [V73 ] ( 0, 0 ) int -> zero-ref "field V33._length (fldOffset=0x8)" P-INDEP
-; V74 tmp51 [V74,T18] ( 2, 8 ) byref -> a7 "field V35._reference (fldOffset=0x0)" P-INDEP
+; V74 tmp51 [V74,T16] ( 2, 8 ) byref -> a6 "field V35._reference (fldOffset=0x0)" P-INDEP
;* V75 tmp52 [V75 ] ( 0, 0 ) int -> zero-ref "field V35._length (fldOffset=0x8)" P-INDEP
-; V76 tmp53 [V76,T19] ( 2, 8 ) byref -> a0 "field V37._reference (fldOffset=0x0)" P-INDEP
+; V76 tmp53 [V76,T17] ( 2, 8 ) byref -> a0 "field V37._reference (fldOffset=0x0)" P-INDEP
;* V77 tmp54 [V77 ] ( 0, 0 ) int -> zero-ref "field V37._length (fldOffset=0x8)" P-INDEP
-; V78 tmp55 [V78,T20] ( 2, 8 ) byref -> a2 "field V39._reference (fldOffset=0x0)" P-INDEP
+; V78 tmp55 [V78,T18] ( 2, 8 ) byref -> a2 "field V39._reference (fldOffset=0x0)" P-INDEP
;* V79 tmp56 [V79 ] ( 0, 0 ) int -> zero-ref "field V39._length (fldOffset=0x8)" P-INDEP
-; V80 tmp57 [V80,T21] ( 2, 8 ) byref -> a4 "field V41._reference (fldOffset=0x0)" P-INDEP
+; V80 tmp57 [V80,T19] ( 2, 8 ) byref -> a3 "field V41._reference (fldOffset=0x0)" P-INDEP
;* V81 tmp58 [V81 ] ( 0, 0 ) int -> zero-ref "field V41._length (fldOffset=0x8)" P-INDEP
-; V82 tmp59 [V82,T22] ( 2, 8 ) byref -> a4 "field V43._reference (fldOffset=0x0)" P-INDEP
+; V82 tmp59 [V82,T20] ( 2, 8 ) byref -> a3 "field V43._reference (fldOffset=0x0)" P-INDEP
;* V83 tmp60 [V83 ] ( 0, 0 ) int -> zero-ref "field V43._length (fldOffset=0x8)" P-INDEP
-; V84 tmp61 [V84,T23] ( 2, 8 ) byref -> a0 "field V45._reference (fldOffset=0x0)" P-INDEP
+; V84 tmp61 [V84,T21] ( 2, 8 ) byref -> a0 "field V45._reference (fldOffset=0x0)" P-INDEP
;* V85 tmp62 [V85 ] ( 0, 0 ) int -> zero-ref "field V45._length (fldOffset=0x8)" P-INDEP
-; V86 cse0 [V86,T30] ( 3, 1.50) long -> a0 "CSE #02: moderate"
-; V87 cse1 [V87,T04] ( 4, 16 ) long -> a6 "CSE #07: aggressive"
-; V88 cse2 [V88,T05] ( 4, 16 ) long -> a3 "CSE #10: aggressive"
-; V89 cse3 [V89,T01] ( 8, 25 ) byref -> s3 "CSE #05: aggressive"
-; V90 cse4 [V90,T12] ( 4, 9 ) byref -> s4 "CSE #03: moderate"
-; V91 cse5 [V91,T06] ( 4, 16 ) int -> a2 "CSE #08: aggressive"
-; V92 cse6 [V92,T07] ( 4, 16 ) int -> a1 "CSE #11: aggressive"
-; V93 cse7 [V93,T26] ( 2, 4.50) long -> a4 hoist "CSE #04: moderate"
+; V86 cse0 [V86,T03] ( 8, 25 ) byref -> s3 "CSE #03: aggressive"
+; V87 cse1 [V87,T10] ( 4, 9 ) byref -> s4 "CSE #01: moderate"
+; V88 cse2 [V88,T04] ( 4, 16 ) int -> a2 "CSE #04: aggressive"
+; V89 cse3 [V89,T05] ( 4, 16 ) int -> a1 "CSE #05: aggressive"
+; V90 cse4 [V90,T24] ( 2, 4.50) long -> a4 hoist "CSE #02: moderate"
;
; Lcl frame size = 8
Frame info. #outsz=0; #framesz=64; lcl=8
@@ -137,8 +134,8 @@ G_M38309_IG03: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0A00 {s1 a1}
sext.w a4, a3
sext.w a5, a0
bgeu a5, a4, G_M38309_IG17
- slli.uw a0, a0, 2
- add t6, a2, a0
+ slli.uw a3, a0, 2
+ add t6, a2, a3
; byrRegs +[t6]
lw a2, 0xD1FFAB1E(t6)
; byrRegs -[a2]
@@ -146,6 +143,7 @@ G_M38309_IG03: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0A00 {s1 a1}
; byrRegs +[s4]
mv a3, s4
; byrRegs +[a3]
+ slli.uw a0, a0, 2
add t6, a3, a0
lw a0, 0xD1FFAB1E(t6)
addiw a0, a0, 0xD1FFAB1E
@@ -158,7 +156,7 @@ G_M38309_IG03: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0A00 {s1 a1}
mv a3, zero
; byrRegs -[a3]
zext.w a4, s5
- ;; size=92 bbWeight=0.50 PerfScore 22.00
+ ;; size=96 bbWeight=0.50 PerfScore 22.25
G_M38309_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=180A00 {s1 a1 s3 s4}, byref, isz
; byrRegs -[t6]
mv a5, s4
@@ -176,28 +174,31 @@ G_M38309_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=180A00 {s1 a1 s
mul a5, a5, a4
add a5, a5, a3
srli a3, a5, 32
- mv a7, s3
- ; byrRegs +[a7]
- add t6, a7, a6
- lw a7, 0xD1FFAB1E(t6)
- ; byrRegs -[a7]
- zext.w a7, a7
+ mv a6, s3
+ ; byrRegs +[a6]
+ slli.uw a7, a0, 2
+ add t6, a6, a7
+ lw a6, 0xD1FFAB1E(t6)
+ ; byrRegs -[a6]
+ zext.w a6, a6
zext.w a5, a5
- sub a5, a7, a5
+ sub a5, a6, a5
sub a5, a5, a2
srli a2, a5, 32
andi a2, a2, 1
- mv a7, s3
- ; byrRegs +[a7]
- add t6, a7, a6
+ mv a6, s3
+ ; byrRegs +[a6]
+ slli.uw a7, a0, 2
+ add t6, a6, a7
sw a5, 0xD1FFAB1E(t6)
addiw a0, a0, 0xD1FFAB1E
sext.w a5, a0
sext.w a6, s2
+ ; byrRegs -[a6]
blt a5, a6, G_M38309_IG04
- ;; size=108 bbWeight=4 PerfScore 112.00
+ ;; size=116 bbWeight=4 PerfScore 116.00
G_M38309_IG05: ; bbWeight=0.25, gcrefRegs=0000 {}, byrefRegs=180A00 {s1 a1 s3 s4}, byref, isz
- ; byrRegs -[a7 t6]
+ ; byrRegs -[t6]
sext.w a0, s2
bge zero, a0, G_M38309_IG07
;; size=8 bbWeight=0.25 PerfScore 1.00
@@ -255,27 +256,30 @@ G_M38309_IG09: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=180200 {s1 s3 s
lw a2, 0xD1FFAB1E(t6)
; byrRegs -[a2]
zext.w a2, a2
- mv a4, s4
- ; byrRegs +[a4]
- add t6, a4, a3
- lw a4, 0xD1FFAB1E(t6)
- ; byrRegs -[a4]
- zext.w a4, a4
- sub a2, a2, a4
+ mv a3, s4
+ ; byrRegs +[a3]
+ slli.uw a4, a0, 2
+ add t6, a3, a4
+ lw a3, 0xD1FFAB1E(t6)
+ ; byrRegs -[a3]
+ zext.w a3, a3
+ sub a2, a2, a3
sub a2, a2, a1
srli a1, a2, 32
andi a1, a1, 1
- mv a4, s3
- ; byrRegs +[a4]
- add t6, a4, a3
+ mv a3, s3
+ ; byrRegs +[a3]
+ slli.uw a4, a0, 2
+ add t6, a3, a4
sw a2, 0xD1FFAB1E(t6)
addiw a0, a0, 0xD1FFAB1E
sext.w a2, a0
sext.w a3, s2
+ ; byrRegs -[a3]
blt a2, a3, G_M38309_IG09
- ;; size=92 bbWeight=4 PerfScore 98.00
+ ;; size=100 bbWeight=4 PerfScore 102.00
G_M38309_IG10: ; bbWeight=0.25, gcrefRegs=0000 {}, byrefRegs=80200 {s1 s3}, byref, isz
- ; byrRegs -[a4 s4 t6]
+ ; byrRegs -[s4 t6]
sext.w a0, s2
bge zero, a0, G_M38309_IG12
;; size=8 bbWeight=0.25 PerfScore 1.00
@@ -348,7 +352,7 @@ G_M38309_IG18: ; bbWeight=0, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
ebreak
;; size=20 bbWeight=0 PerfScore 0.00
-; Total bytes of code 668, prolog size 40, PerfScore 442.00, instruction count 159, allocated bytes for code 668 (MethodHash=daac6a5a) for method System.Number+BigInteger:HeuristicDivide(byref,byref):uint (FullOpts)
+; Total bytes of code 688, prolog size 40, PerfScore 450.25, instruction count 164, allocated bytes for code 688 (MethodHash=daac6a5a) for method System.Number+BigInteger:HeuristicDivide(byref,byref):uint (FullOpts)
; ============================================================
Unwind Info:
@@ -359,7 +363,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 334 (0x0014e) Actual length = 668 (0x00029c)
+ Function Length : 344 (0x00158) Actual length = 688 (0x0002b0)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)+4 (+1.36%) : 6031.dasm - System.Number+BigInteger:Multiply10():this (FullOpts)@@ -8,10 +8,10 @@
; 0 inlinees with PGO data; 15 single block inlinees; 4 inlinees without PGO data
; Final local variable assignments
;
-; V00 this [V00,T05] ( 6, 8 ) byref -> s1 this single-def
-; V01 loc0 [V01,T00] ( 8, 21.50) int -> a1
-; V02 loc1 [V02,T09] ( 4, 5.50) int -> a0
-; V03 loc2 [V03,T06] ( 5, 9.50) long -> a2
+; V00 this [V00,T04] ( 6, 8 ) byref -> s1 this single-def
+; V01 loc0 [V01,T00] ( 9, 25.50) int -> a1
+; V02 loc1 [V02,T08] ( 4, 5.50) int -> a0
+; V03 loc2 [V03,T05] ( 5, 9.50) long -> a2
; V04 loc3 [V04,T02] ( 3, 12 ) long -> a4
; V05 loc4 [V05,T03] ( 3, 12 ) long -> a4
;* V06 loc5 [V06 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
@@ -32,15 +32,14 @@
;* V21 tmp12 [V21 ] ( 0, 0 ) int -> zero-ref "field V07._length (fldOffset=0x8)" P-INDEP
;* V22 tmp13 [V22 ] ( 0, 0 ) byref -> zero-ref single-def "field V08._reference (fldOffset=0x0)" P-INDEP
;* V23 tmp14 [V23 ] ( 0, 0 ) int -> zero-ref "field V08._length (fldOffset=0x8)" P-INDEP
-; V24 tmp15 [V24,T07] ( 2, 8 ) byref -> a4 "field V11._reference (fldOffset=0x0)" P-INDEP
+; V24 tmp15 [V24,T06] ( 2, 8 ) byref -> a4 "field V11._reference (fldOffset=0x0)" P-INDEP
;* V25 tmp16 [V25 ] ( 0, 0 ) int -> zero-ref "field V11._length (fldOffset=0x8)" P-INDEP
-; V26 tmp17 [V26,T08] ( 2, 8 ) byref -> a6 "field V13._reference (fldOffset=0x0)" P-INDEP
+; V26 tmp17 [V26,T07] ( 2, 8 ) byref -> a5 "field V13._reference (fldOffset=0x0)" P-INDEP
;* V27 tmp18 [V27 ] ( 0, 0 ) int -> zero-ref "field V13._length (fldOffset=0x8)" P-INDEP
-; V28 tmp19 [V28,T11] ( 2, 1 ) byref -> a3 single-def "field V17._reference (fldOffset=0x0)" P-INDEP
+; V28 tmp19 [V28,T10] ( 2, 1 ) byref -> a3 single-def "field V17._reference (fldOffset=0x0)" P-INDEP
;* V29 tmp20 [V29 ] ( 0, 0 ) int -> zero-ref "field V17._length (fldOffset=0x8)" P-INDEP
-; V30 cse0 [V30,T04] ( 3, 12 ) long -> a5 "CSE #04: aggressive"
-; V31 cse1 [V31,T01] ( 4, 12.50) byref -> a3 "CSE #02: aggressive"
-; V32 cse2 [V32,T10] ( 3, 2.50) int -> a0 "CSE #01: aggressive"
+; V30 cse0 [V30,T01] ( 4, 12.50) byref -> a3 "CSE #02: aggressive"
+; V31 cse1 [V31,T09] ( 3, 2.50) int -> a0 "CSE #01: aggressive"
;
; Lcl frame size = 8
Frame info. #outsz=0; #framesz=32; lcl=8
@@ -78,21 +77,23 @@ G_M24569_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0200 {s1}, byre
lw a4, 0xD1FFAB1E(t6)
; byrRegs -[a4]
zext.w a4, a4
- slli a6, a4, 1
- sh3add a4, a4, a6
+ slli a5, a4, 1
+ sh3add a4, a4, a5
add a4, a4, a2
srli a2, a4, 32
- mv a6, a3
- ; byrRegs +[a6]
- add t6, a6, a5
+ mv a5, a3
+ ; byrRegs +[a5]
+ slli.uw a6, a1, 2
+ add t6, a5, a6
sw a4, 0xD1FFAB1E(t6)
addiw a1, a1, 0xD1FFAB1E
sext.w a4, a1
sext.w a5, a0
+ ; byrRegs -[a5]
blt a4, a5, G_M24569_IG04
- ;; size=82 bbWeight=4 PerfScore 86.00
+ ;; size=86 bbWeight=4 PerfScore 88.00
G_M24569_IG05: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=2200 {s1 a3}, byref, isz
- ; byrRegs -[a6 t6]
+ ; byrRegs -[t6]
beqz a2, G_M24569_IG07
sext.w a4, a0
addi a5, zero, 0xD1FFAB1E
@@ -150,7 +151,7 @@ G_M24569_IG08: ; bbWeight=0, gcVars=0000000000000000 {}, gcrefRegs=0000 {
ebreak
;; size=28 bbWeight=0 PerfScore 0.00
-; Total bytes of code 294, prolog size 24, PerfScore 138.50, instruction count 60, allocated bytes for code 294 (MethodHash=90daa006) for method System.Number+BigInteger:Multiply10():this (FullOpts)
+; Total bytes of code 298, prolog size 24, PerfScore 140.50, instruction count 61, allocated bytes for code 298 (MethodHash=90daa006) for method System.Number+BigInteger:Multiply10():this (FullOpts)
; ============================================================
Unwind Info:
@@ -161,7 +162,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 147 (0x00093) Actual length = 294 (0x000126)
+ Function Length : 149 (0x00095) Actual length = 298 (0x00012a)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)+4 (+0.80%) : 6029.dasm - System.Number+BigInteger:Multiply(byref,uint,byref) (FullOpts)@@ -8,26 +8,26 @@
; 0 inlinees with PGO data; 23 single block inlinees; 8 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T04] ( 6, 8 ) byref -> a0 single-def
-; V01 arg1 [V01,T08] ( 6, 4 ) int -> a1 single-def
+; V00 arg0 [V00,T03] ( 6, 8 ) byref -> a0 single-def
+; V01 arg1 [V01,T07] ( 6, 4 ) int -> a1 single-def
; V02 arg2 [V02,T01] ( 14, 15 ) byref -> s1 single-def
-; V03 loc0 [V03,T09] ( 5, 6 ) int -> s2
-; V04 loc1 [V04,T00] ( 8, 21.50) int -> a2
-; V05 loc2 [V05,T05] ( 5, 9.50) int -> a3
-; V06 loc3 [V06,T14] ( 3, 1.50) int -> a0
+; V03 loc0 [V03,T08] ( 5, 6 ) int -> s2
+; V04 loc1 [V04,T00] ( 9, 25.50) int -> a2
+; V05 loc2 [V05,T04] ( 5, 9.50) int -> a3
+; V06 loc3 [V06,T13] ( 3, 1.50) int -> a0
; V07 loc4 [V07,T02] ( 3, 12 ) long -> a1
;* V08 loc5 [V08 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V09 loc6 [V09 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V10 loc7 [V10 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;# V11 OutArgs [V11 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
-; V12 tmp1 [V12,T15] ( 3, 1.50) int -> a2 "Inline return value spill temp"
+; V12 tmp1 [V12,T14] ( 3, 1.50) int -> a2 "Inline return value spill temp"
;* V13 tmp2 [V13 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
-; V14 tmp3 [V14,T11] ( 4, 4 ) long -> a0 "Inlining Arg"
-; V15 tmp4 [V15,T13] ( 3, 3 ) int -> a0 "Inlining Arg"
+; V14 tmp3 [V14,T10] ( 4, 4 ) long -> a0 "Inlining Arg"
+; V15 tmp4 [V15,T12] ( 3, 3 ) int -> a0 "Inlining Arg"
;* V16 tmp5 [V16 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V17 tmp6 [V17 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V18 tmp7 [V18 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
-; V19 tmp8 [V19,T16] ( 3, 1.50) int -> a2 "Inline stloc first use temp"
+; V19 tmp8 [V19,T15] ( 3, 1.50) int -> a2 "Inline stloc first use temp"
;* V20 tmp9 [V20 ] ( 0, 0 ) byref -> zero-ref "impAppendStmt"
;* V21 tmp10 [V21 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V22 tmp11 [V22 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
@@ -46,16 +46,15 @@
;* V35 tmp24 [V35 ] ( 0, 0 ) int -> zero-ref "field V09._length (fldOffset=0x8)" P-INDEP
;* V36 tmp25 [V36 ] ( 0, 0 ) byref -> zero-ref single-def "field V10._reference (fldOffset=0x0)" P-INDEP
;* V37 tmp26 [V37 ] ( 0, 0 ) int -> zero-ref "field V10._length (fldOffset=0x8)" P-INDEP
-; V38 tmp27 [V38,T06] ( 2, 8 ) byref -> a1 "field V25._reference (fldOffset=0x0)" P-INDEP
+; V38 tmp27 [V38,T05] ( 2, 8 ) byref -> a1 "field V25._reference (fldOffset=0x0)" P-INDEP
;* V39 tmp28 [V39 ] ( 0, 0 ) int -> zero-ref "field V25._length (fldOffset=0x8)" P-INDEP
-; V40 tmp29 [V40,T07] ( 2, 8 ) byref -> a3 "field V27._reference (fldOffset=0x0)" P-INDEP
+; V40 tmp29 [V40,T06] ( 2, 8 ) byref -> a3 "field V27._reference (fldOffset=0x0)" P-INDEP
;* V41 tmp30 [V41 ] ( 0, 0 ) int -> zero-ref "field V27._length (fldOffset=0x8)" P-INDEP
-; V42 tmp31 [V42,T18] ( 2, 1 ) byref -> a0 single-def "field V31._reference (fldOffset=0x0)" P-INDEP
+; V42 tmp31 [V42,T17] ( 2, 1 ) byref -> a0 single-def "field V31._reference (fldOffset=0x0)" P-INDEP
;* V43 tmp32 [V43 ] ( 0, 0 ) int -> zero-ref "field V31._length (fldOffset=0x8)" P-INDEP
-; V44 cse0 [V44,T03] ( 3, 12 ) long -> a4 "CSE #07: aggressive"
-; V45 cse1 [V45,T12] ( 5, 3.50) int -> s2 "CSE #01: moderate"
-; V46 cse2 [V46,T17] ( 3, 1.50) long -> a1 "CSE #02: moderate"
-; V47 cse3 [V47,T10] ( 4, 5.50) long -> s3 hoist multi-def "CSE #03: aggressive"
+; V44 cse0 [V44,T11] ( 5, 3.50) int -> s2 "CSE #01: moderate"
+; V45 cse1 [V45,T16] ( 3, 1.50) long -> a1 "CSE #02: moderate"
+; V46 cse2 [V46,T09] ( 4, 5.50) long -> s3 hoist multi-def "CSE #03: aggressive"
;
; Lcl frame size = 8
Frame info. #outsz=0; #framesz=48; lcl=8
@@ -105,6 +104,7 @@ G_M6434_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0600 {s1 a0}, by
lb zero, 0xD1FFAB1E(s1)
addi a3, s1, 0xD1FFAB1E
; byrRegs +[a3]
+ slli.uw a4, a2, 2
add t6, a3, a4
sw a1, 0xD1FFAB1E(t6)
srli a1, a1, 32
@@ -114,7 +114,7 @@ G_M6434_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0600 {s1 a0}, by
sext.w a1, a2
sext.w a4, s2
blt a1, a4, G_M6434_IG04
- ;; size=86 bbWeight=4 PerfScore 104.00
+ ;; size=90 bbWeight=4 PerfScore 106.00
G_M6434_IG05: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0200 {s1}, byref, isz
; byrRegs -[a0 t6]
sext.w a0, s2
@@ -239,7 +239,7 @@ G_M6434_IG15: ; bbWeight=0, gcVars=0000000000000000 {}, gcrefRegs=0000 {}
ebreak
;; size=28 bbWeight=0 PerfScore 0.00
-; Total bytes of code 498, prolog size 32, PerfScore 205.00, instruction count 107, allocated bytes for code 498 (MethodHash=71b0e6dd) for method System.Number+BigInteger:Multiply(byref,uint,byref) (FullOpts)
+; Total bytes of code 502, prolog size 32, PerfScore 207.00, instruction count 108, allocated bytes for code 502 (MethodHash=71b0e6dd) for method System.Number+BigInteger:Multiply(byref,uint,byref) (FullOpts)
; ============================================================
Unwind Info:
@@ -250,7 +250,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 249 (0x000f9) Actual length = 498 (0x0001f2)
+ Function Length : 251 (0x000fb) Actual length = 502 (0x0001f6)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)System.mch-16 (-3.81%) : 4056.dasm - System.RuntimeTypeHandle:CopyRuntimeTypeHandles(System.Type[],byref):nint[] (FullOpts)@@ -8,41 +8,39 @@
; 0 inlinees with PGO data; 0 single block inlinees; 1 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T05] ( 6, 7.50) ref -> s1 class-hnd single-def <System.Type[]>
-; V01 arg1 [V01,T08] ( 4, 3 ) byref -> s2 single-def
-; V02 loc0 [V02,T06] ( 7, 6.04) ref -> s4 class-hnd exact single-def <nint[]>
-; V03 loc1 [V03,T01] ( 11, 16.58) int -> s5
+; V00 arg0 [V00,T04] ( 6, 7.50) ref -> s1 class-hnd single-def <System.Type[]>
+; V01 arg1 [V01,T07] ( 4, 3 ) byref -> s2 single-def
+; V02 loc0 [V02,T05] ( 7, 6.04) ref -> s4 class-hnd exact single-def <nint[]>
+; V03 loc1 [V03,T01] ( 12, 20.54) int -> s5
;* V04 loc2 [V04 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op <System.RuntimeTypeHandle>
;# V05 OutArgs [V05 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
;* V06 tmp1 [V06 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewArr temp" <nint[]>
-; V07 tmp2 [V07,T02] ( 6, 16 ) long -> s7 "Strict ordering of exceptions for Array store"
+; V07 tmp2 [V07,T02] ( 6, 16 ) long -> s6 "Strict ordering of exceptions for Array store"
;* V08 tmp3 [V08 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "dup spill" <System.RuntimeType>
;* V09 tmp4 [V09 ] ( 0, 0 ) ref -> zero-ref
-; V10 tmp5 [V10,T04] ( 6, 10 ) ref -> a0 "field V04.m_type (fldOffset=0x0)" P-INDEP
+; V10 tmp5 [V10,T03] ( 6, 10 ) ref -> a0 "field V04.m_type (fldOffset=0x0)" P-INDEP
; V11 tmp6 [V11,T00] ( 6, 24 ) ref -> a0 "argument with side effect"
-; V12 cse0 [V12,T03] ( 3, 11.88) long -> s6 "CSE #03: aggressive"
-; V13 cse1 [V13,T07] ( 6, 6 ) int -> s3 "CSE #01: aggressive"
+; V12 cse0 [V12,T06] ( 6, 6 ) int -> s3 "CSE #01: aggressive"
;
-; Lcl frame size = 8
-Frame info. #outsz=0; #framesz=80; lcl=8
+; Lcl frame size = 0
+Frame info. #outsz=0; #framesz=64; lcl=0
G_M5038_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- addi sp, sp, -80
- sd fp, 8(sp)
- sd ra, 16(sp)
- sd s1, 24(sp)
- sd s2, 32(sp)
- sd s3, 40(sp)
- sd s4, 48(sp)
- sd s5, 56(sp)
- sd s6, 64(sp)
- sd s7, 72(sp)
- addi fp, sp, 8
+ addi sp, sp, -64
+ sd fp, 0(sp)
+ sd ra, 8(sp)
+ sd s1, 16(sp)
+ sd s2, 24(sp)
+ sd s3, 32(sp)
+ sd s4, 40(sp)
+ sd s5, 48(sp)
+ sd s6, 56(sp)
+ mv fp, sp
mv s1, a0
; gcrRegs +[s1]
mv s2, a1
; byrRegs +[s2]
- ;; size=52 bbWeight=1 PerfScore 38.00
+ ;; size=48 bbWeight=1 PerfScore 34.00
G_M5038_IG02: ; bbWeight=1, gcrefRegs=0200 {s1}, byrefRegs=40000 {s2}, byref, isz
beqz s1, G_M5038_IG14
;; size=4 bbWeight=1 PerfScore 3.50
@@ -72,8 +70,7 @@ G_M5038_IG03: ; bbWeight=0.50, gcrefRegs=0200 {s1}, byrefRegs=40000 {s2},
blt a0, a1, G_M5038_IG12
;; size=80 bbWeight=0.50 PerfScore 13.00
G_M5038_IG04: ; bbWeight=3.96, gcrefRegs=100200 {s1 s4}, byrefRegs=40000 {s2}, byref, isz
- slli.uw s6, s5, 3
- add a0, s1, s6
+ sh3add.uw a0, s5, s1
; byrRegs +[a0]
ld a0, 0xD1FFAB1E(a0)
; gcrRegs +[a0]
@@ -83,19 +80,19 @@ G_M5038_IG04: ; bbWeight=3.96, gcrefRegs=100200 {s1 s4}, byrefRegs=40000
ld a1, 0xD1FFAB1E(a1)
jalr a1 // <unknown method>
beqz a0, G_M5038_IG06
- ;; size=32 bbWeight=3.96 PerfScore 61.38
+ ;; size=28 bbWeight=3.96 PerfScore 59.40
G_M5038_IG05: ; bbWeight=1.98, gcrefRegs=100600 {s1 a0 s4}, byrefRegs=40000 {s2}, byref, isz
- ld s7, 0xD1FFAB1E(a0)
+ ld s6, 0xD1FFAB1E(a0)
j G_M5038_IG07
;; size=8 bbWeight=1.98 PerfScore 6.93
G_M5038_IG06: ; bbWeight=1.98, gcrefRegs=100200 {s1 s4}, byrefRegs=40000 {s2}, byref
; gcrRegs -[a0]
- mv s7, zero
+ mv s6, zero
;; size=4 bbWeight=1.98 PerfScore 0.99
G_M5038_IG07: ; bbWeight=3.96, gcrefRegs=100200 {s1 s4}, byrefRegs=40000 {s2}, byref, isz
- add a0, s4, s6
+ sh3add.uw a0, s5, s4
; byrRegs +[a0]
- sd s7, 0xD1FFAB1E(a0)
+ sd s6, 0xD1FFAB1E(a0)
addiw s5, s5, 0xD1FFAB1E
sext.w a0, s3
; byrRegs -[a0]
@@ -110,20 +107,19 @@ G_M5038_IG08: ; bbWeight=0.50, gcrefRegs=100000 {s4}, byrefRegs=40000 {s2
; gcrRegs +[a0]
;; size=12 bbWeight=0.50 PerfScore 3.25
G_M5038_IG09: ; bbWeight=0.50, epilog, nogc, extend
- ld s7, 72(sp)
- ld s6, 64(sp)
- ld s5, 56(sp)
- ld s4, 48(sp)
- ld s3, 40(sp)
- ld s2, 32(sp)
- ld s1, 24(sp)
- ld ra, 16(sp)
- ld fp, 8(sp)
- addi sp, sp, 80
- ret ;; size=44 bbWeight=0.50 PerfScore 10.75
+ ld s6, 56(sp)
+ ld s5, 48(sp)
+ ld s4, 40(sp)
+ ld s3, 32(sp)
+ ld s2, 24(sp)
+ ld s1, 16(sp)
+ ld ra, 8(sp)
+ ld fp, 0(sp)
+ addi sp, sp, 64
+ ret ;; size=40 bbWeight=0.50 PerfScore 9.75
G_M5038_IG10: ; bbWeight=0.02, gcVars=0000000000000000 {}, gcrefRegs=100200 {s1 s4}, byrefRegs=40000 {s2}, gcvars, byref
; gcrRegs -[a0] +[s1]
- mv s7, zero
+ mv s6, zero
;; size=4 bbWeight=0.02 PerfScore 0.01
G_M5038_IG11: ; bbWeight=0.04, gcrefRegs=100200 {s1 s4}, byrefRegs=40000 {s2}, byref, isz
lw a0, 0xD1FFAB1E(s4)
@@ -132,7 +128,7 @@ G_M5038_IG11: ; bbWeight=0.04, gcrefRegs=100200 {s1 s4}, byrefRegs=40000
bgeu a2, a1, G_M5038_IG16
sh3add.uw a0, s5, s4
; byrRegs +[a0]
- sd s7, 0xD1FFAB1E(a0)
+ sd s6, 0xD1FFAB1E(a0)
addiw s5, s5, 0xD1FFAB1E
sext.w a0, s3
; byrRegs -[a0]
@@ -152,7 +148,7 @@ G_M5038_IG12: ; bbWeight=0.04, gcrefRegs=100200 {s1 s4}, byrefRegs=40000
beqz a0, G_M5038_IG10
;; size=28 bbWeight=0.04 PerfScore 0.60
G_M5038_IG13: ; bbWeight=0.02, gcrefRegs=100600 {s1 a0 s4}, byrefRegs=40000 {s2}, byref, isz
- ld s7, 0xD1FFAB1E(a0)
+ ld s6, 0xD1FFAB1E(a0)
j G_M5038_IG11
;; size=8 bbWeight=0.02 PerfScore 0.07
G_M5038_IG14: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=40000 {s2}, byref
@@ -162,17 +158,16 @@ G_M5038_IG14: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=40000 {s2}, b
; gcrRegs +[a0]
;; size=8 bbWeight=0.50 PerfScore 2.25
G_M5038_IG15: ; bbWeight=0.50, epilog, nogc, extend
- ld s7, 72(sp)
- ld s6, 64(sp)
- ld s5, 56(sp)
- ld s4, 48(sp)
- ld s3, 40(sp)
- ld s2, 32(sp)
- ld s1, 24(sp)
- ld ra, 16(sp)
- ld fp, 8(sp)
- addi sp, sp, 80
- ret ;; size=44 bbWeight=0.50 PerfScore 10.75
+ ld s6, 56(sp)
+ ld s5, 48(sp)
+ ld s4, 40(sp)
+ ld s3, 32(sp)
+ ld s2, 24(sp)
+ ld s1, 16(sp)
+ ld ra, 8(sp)
+ ld fp, 0(sp)
+ addi sp, sp, 64
+ ret ;; size=40 bbWeight=0.50 PerfScore 9.75
G_M5038_IG16: ; bbWeight=0, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
; gcrRegs -[a0]
; byrRegs -[s2]
@@ -185,37 +180,37 @@ G_M5038_IG16: ; bbWeight=0, gcVars=0000000000000000 {}, gcrefRegs=0000 {}
ebreak
;; size=28 bbWeight=0 PerfScore 0.00
-; Total bytes of code 420, prolog size 44, PerfScore 189.74, instruction count 94, allocated bytes for code 420 (MethodHash=fc39ec51) for method System.RuntimeTypeHandle:CopyRuntimeTypeHandles(System.Type[],byref):nint[] (FullOpts)
+; Total bytes of code 404, prolog size 40, PerfScore 181.76, instruction count 90, allocated bytes for code 404 (MethodHash=fc39ec51) for method System.RuntimeTypeHandle:CopyRuntimeTypeHandles(System.Type[],byref):nint[] (FullOpts)
; ============================================================
Unwind Info:
>> Start offset : 0x000000 (not in unwind data)
>> End offset : 0xd1ffab1e (not in unwind data)
- Code Words : 8
+ Code Words : 7
Epilog Count : 2
E bit : 0
X bit : 0
Vers : 0
- Function Length : 210 (0x000d2) Actual length = 420 (0x0001a4)
+ Function Length : 202 (0x000ca) Actual length = 404 (0x000194)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)
- Epilog Start Index : 3 (0x03)
+ Epilog Start Index : 1 (0x01)
---- Scope 1
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)
- Epilog Start Index : 3 (0x03)
+ Epilog Start Index : 1 (0x01)
---- Unwind codes ----
- E2 00 01 add_fp 1 (0x01); addi fp, sp, #8
- ---- Epilog start at index 3 ----
- D0 16 09 save_reg X#22 Z#9 (0x09); sd s7, sp, 72
- D0 15 08 save_reg X#21 Z#8 (0x08); sd s6, sp, 64
- D0 14 07 save_reg X#20 Z#7 (0x07); sd s5, sp, 56
- D0 13 06 save_reg X#19 Z#6 (0x06); sd s4, sp, 48
- D0 12 05 save_reg X#18 Z#5 (0x05); sd s3, sp, 40
- D0 11 04 save_reg X#17 Z#4 (0x04); sd s2, sp, 32
- D0 08 03 save_reg X#8 Z#3 (0x03); sd s1, sp, 24
- D0 00 02 save_reg X#0 Z#2 (0x02); sd ra, sp, 16
- D0 07 01 save_reg X#7 Z#1 (0x01); sd fp, sp, 8
- 05 alloc_s #5 (0x05); addi sp, sp, -80 (0x050)
+ E1 set_fp; move fp, sp
+ ---- Epilog start at index 1 ----
+ D0 15 07 save_reg X#21 Z#7 (0x07); sd s6, sp, 56
+ D0 14 06 save_reg X#20 Z#6 (0x06); sd s5, sp, 48
+ D0 13 05 save_reg X#19 Z#5 (0x05); sd s4, sp, 40
+ D0 12 04 save_reg X#18 Z#4 (0x04); sd s3, sp, 32
+ D0 11 03 save_reg X#17 Z#3 (0x03); sd s2, sp, 24
+ D0 08 02 save_reg X#8 Z#2 (0x02); sd s1, sp, 16
+ D0 00 01 save_reg X#0 Z#1 (0x01); sd ra, sp, 8
+ D0 07 00 save_reg X#7 Z#0 (0x00); sd fp, sp, 0
+ 04 alloc_s #4 (0x04); addi sp, sp, -64 (0x040)
+ E4 end
E4 end
-12 (-3.45%) : 474.dasm - System.Text.Ascii:ChangeCase[ushort,ushort,System.Text.Ascii+ToLowerConversion](ptr,ptr,nuint):nuint (FullOpts)@@ -11,13 +11,13 @@
; V00 arg0 [V00,T06] ( 5, 10 ) long -> a0 single-def
; V01 arg1 [V01,T04] ( 5, 14 ) long -> a1 single-def
; V02 arg2 [V02,T03] ( 6, 16 ) long -> a2 single-def
-;* V03 loc0 [V03,T14] ( 0, 0 ) ubyte -> zero-ref
-;* V04 loc1 [V04,T15] ( 0, 0 ) ubyte -> zero-ref
-;* V05 loc2 [V05,T16] ( 0, 0 ) ubyte -> zero-ref
-;* V06 loc3 [V06,T17] ( 0, 0 ) ubyte -> zero-ref
-;* V07 loc4 [V07,T18] ( 0, 0 ) ubyte -> zero-ref
+;* V03 loc0 [V03,T11] ( 0, 0 ) ubyte -> zero-ref
+;* V04 loc1 [V04,T12] ( 0, 0 ) ubyte -> zero-ref
+;* V05 loc2 [V05,T13] ( 0, 0 ) ubyte -> zero-ref
+;* V06 loc3 [V06,T14] ( 0, 0 ) ubyte -> zero-ref
+;* V07 loc4 [V07,T15] ( 0, 0 ) ubyte -> zero-ref
;* V08 loc5 [V08 ] ( 0, 0 ) int -> zero-ref
-; V09 loc6 [V09,T00] ( 15, 47.25) long -> a3
+; V09 loc6 [V09,T00] ( 18, 59.25) long -> a3
;* V10 loc7 [V10 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V11 loc8 [V11 ] ( 0, 0 ) ushort -> zero-ref
;* V12 loc9 [V12 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ushort]>
@@ -25,26 +25,26 @@
;* V14 loc11 [V14 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V15 loc12 [V15 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V16 loc13 [V16 ] ( 0, 0 ) int -> zero-ref
-; V17 loc14 [V17,T01] ( 7, 24 ) long -> a5
+; V17 loc14 [V17,T01] ( 7, 24 ) long -> a4
;* V18 loc15 [V18 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ulong]>
;* V19 loc16 [V19 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[uint]>
-; V20 loc17 [V20,T02] ( 7, 24 ) int -> a5
+; V20 loc17 [V20,T02] ( 7, 24 ) int -> a4
;* V21 loc18 [V21 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[uint]>
;* V22 loc19 [V22 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ulong]>
;* V23 loc20 [V23 ] ( 0, 0 ) struct (16) zero-ref <System.Runtime.Intrinsics.Vector128`1[ushort]>
-; V24 loc21 [V24,T05] ( 5, 16 ) int -> a6
+; V24 loc21 [V24,T05] ( 5, 16 ) int -> a5
;# V25 OutArgs [V25 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
;* V26 tmp1 [V26 ] ( 0, 0 ) int -> zero-ref
;* V27 tmp2 [V27 ] ( 0, 0 ) int -> zero-ref
;* V28 tmp3 [V28 ] ( 0, 0 ) int -> zero-ref
-;* V29 tmp4 [V29,T19] ( 0, 0 ) int -> zero-ref
-; V30 tmp5 [V30,T11] ( 2, 8 ) int -> a5
+;* V29 tmp4 [V29,T16] ( 0, 0 ) int -> zero-ref
+; V30 tmp5 [V30,T08] ( 2, 8 ) int -> a4
;* V31 tmp6 [V31 ] ( 0, 0 ) struct (16) zero-ref "dup spill" <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V32 tmp7 [V32 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.Runtime.Intrinsics.Vector128`1[byte]>
;* V33 tmp8 [V33 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.Runtime.Intrinsics.Vector128`1[byte]>
;* V34 tmp9 [V34 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V35 tmp10 [V35 ] ( 0, 0 ) int -> zero-ref
-; V36 tmp11 [V36,T12] ( 2, 8 ) long -> a5
+; V36 tmp11 [V36,T09] ( 2, 8 ) long -> a4
;* V37 tmp12 [V37 ] ( 0, 0 ) struct (16) zero-ref "dup spill" <System.Runtime.Intrinsics.Vector128`1[ushort]>
;* V38 tmp13 [V38 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.Runtime.Intrinsics.Vector128`1[byte]>
;* V39 tmp14 [V39 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.Runtime.Intrinsics.Vector128`1[byte]>
@@ -220,11 +220,11 @@
;* V209 tmp184 [V209 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V210 tmp185 [V210 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V211 tmp186 [V211 ] ( 0, 0 ) ushort -> zero-ref "Inlining Arg"
-; V212 tmp187 [V212,T08] ( 3, 10 ) int -> a5 ld-addr-op "Inline ldloca(s) first use temp"
+; V212 tmp187 [V212,T07] ( 3, 10 ) int -> a4 ld-addr-op "Inline ldloca(s) first use temp"
;* V213 tmp188 [V213 ] ( 0, 0 ) ubyte -> zero-ref "Inline return value spill temp"
;* V214 tmp189 [V214 ] ( 0, 0 ) ushort -> zero-ref "Inline stloc first use temp"
;* V215 tmp190 [V215 ] ( 0, 0 ) ubyte -> zero-ref "Inline return value spill temp"
-; V216 tmp191 [V216,T13] ( 2, 8 ) ushort -> a5 ld-addr-op "Inline ldloca(s) first use temp"
+; V216 tmp191 [V216,T10] ( 2, 8 ) ushort -> a4 ld-addr-op "Inline ldloca(s) first use temp"
;* V217 tmp192 [V217 ] ( 0, 0 ) ubyte -> zero-ref "Inline return value spill temp"
;* V218 tmp193 [V218 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp"
;* V219 tmp194 [V219 ] ( 0, 0 ) ubyte -> zero-ref "Inline return value spill temp"
@@ -305,9 +305,6 @@
;* V294 tmp269 [V294 ] ( 0, 0 ) long -> zero-ref "field V207._lower (fldOffset=0x0)" P-INDEP
;* V295 tmp270 [V295 ] ( 0, 0 ) long -> zero-ref "field V207._upper (fldOffset=0x8)" P-INDEP
;* V296 tmp271 [V296 ] ( 0, 0 ) byref -> zero-ref "BlockOp address local"
-; V297 cse0 [V297,T09] ( 3, 8 ) long -> a4 "CSE #01: moderate"
-; V298 cse1 [V298,T10] ( 3, 8 ) long -> a4 "CSE #04: moderate"
-; V299 cse2 [V299,T07] ( 3, 12 ) long -> a4 "CSE #07: moderate"
;
; Lcl frame size = 0
Frame info. #outsz=0; #framesz=16; lcl=0
@@ -323,23 +320,23 @@ G_M31524_IG02: ; bbWeight=0.25, gcrefRegs=0000 {}, byrefRegs=0000 {}, byr
j G_M31524_IG04
;; size=8 bbWeight=0.25 PerfScore 0.50
G_M31524_IG03: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
+ auipc a5, 0xD1FFAB1E
+ ld a5, 0xD1FFAB1E(a5)
+ add a5, a4, a5
auipc a6, 0xD1FFAB1E
ld a6, 0xD1FFAB1E(a6)
- add a6, a5, a6
- auipc a7, 0xD1FFAB1E
- ld a7, 0xD1FFAB1E(a7)
- add a7, a5, a7
- xor a6, a6, a7
- lui a7, 0xD1FFAB1E
- slli a7, a7, 12
- addi a7, a7, 0xD1FFAB1E
- slli a7, a7, 13
- addi a7, a7, 0xD1FFAB1E
- and a6, a6, a7
- srli a6, a6, 2
- xor a5, a6, a5
- add t6, a1, a4
- sd a5, 0xD1FFAB1E(t6)
+ add a6, a4, a6
+ xor a5, a5, a6
+ lui a6, 0xD1FFAB1E
+ slli a6, a6, 12
+ addi a6, a6, 0xD1FFAB1E
+ slli a6, a6, 13
+ addi a6, a6, 0xD1FFAB1E
+ and a5, a5, a6
+ srli a5, a5, 2
+ xor a4, a5, a4
+ sh1add a5, a3, a1
+ sd a4, 0xD1FFAB1E(a5)
addi a3, a3, 0xD1FFAB1E
;; size=72 bbWeight=4 PerfScore 68.00
G_M31524_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
@@ -348,33 +345,32 @@ G_M31524_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
bltu a4, a5, G_M31524_IG07
;; size=12 bbWeight=4 PerfScore 18.00
G_M31524_IG05: ; bbWeight=2, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
- slli a4, a3, 1
- add t6, a0, a4
- ld a5, 0xD1FFAB1E(t6)
- auipc a6, 0xD1FFAB1E
- ld a6, 0xD1FFAB1E(a6)
- and a6, a5, a6
- bnez a6, G_M31524_IG07
+ sh1add a4, a3, a0
+ ld a4, 0xD1FFAB1E(a4)
+ auipc a5, 0xD1FFAB1E
+ ld a5, 0xD1FFAB1E(a5)
+ and a5, a4, a5
+ bnez a5, G_M31524_IG07
j G_M31524_IG03
- ;; size=32 bbWeight=2 PerfScore 21.00
+ ;; size=28 bbWeight=2 PerfScore 20.00
G_M31524_IG06: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
+ lui a5, 0xD1FFAB1E
+ addiw a5, a5, 0xD1FFAB1E
+ addw a5, a4, a5
lui a6, 0xD1FFAB1E
addiw a6, a6, 0xD1FFAB1E
- addw a6, a5, a6
- lui a7, 0xD1FFAB1E
- addiw a7, a7, 0xD1FFAB1E
- addw a7, a5, a7
- xor a6, a6, a7
- sext.w a6, a6
- lui a7, 0xD1FFAB1E
- addiw a7, a7, 0xD1FFAB1E
- and a6, a6, a7
- sext.w a6, a6
- srliw a6, a6, 2
- xor a5, a6, a5
+ addw a6, a4, a6
+ xor a5, a5, a6
sext.w a5, a5
- add t6, a1, a4
- sw a5, 0xD1FFAB1E(t6)
+ lui a6, 0xD1FFAB1E
+ addiw a6, a6, 0xD1FFAB1E
+ and a5, a5, a6
+ sext.w a5, a5
+ srliw a5, a5, 2
+ xor a4, a5, a4
+ sext.w a4, a4
+ sh1add a5, a3, a1
+ sw a4, 0xD1FFAB1E(a5)
addi a3, a3, 0xD1FFAB1E
;; size=72 bbWeight=4 PerfScore 62.00
G_M31524_IG07: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
@@ -383,38 +379,36 @@ G_M31524_IG07: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
bltu a4, a5, G_M31524_IG09
;; size=12 bbWeight=4 PerfScore 18.00
G_M31524_IG08: ; bbWeight=2, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
- slli a4, a3, 1
- add t6, a0, a4
- lw a5, 0xD1FFAB1E(t6)
- lui a6, 0xD1FFAB1E
- addiw a6, a6, 0xD1FFAB1E
- and a6, a5, a6
- sext.w a6, a6
- sext.w a6, a6
- beqz a6, G_M31524_IG06
- ;; size=36 bbWeight=2 PerfScore 20.00
+ sh1add a4, a3, a0
+ lw a4, 0xD1FFAB1E(a4)
+ lui a5, 0xD1FFAB1E
+ addiw a5, a5, 0xD1FFAB1E
+ and a5, a4, a5
+ sext.w a5, a5
+ sext.w a5, a5
+ beqz a5, G_M31524_IG06
+ ;; size=32 bbWeight=2 PerfScore 19.00
G_M31524_IG09: ; bbWeight=2, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
bgeu a3, a2, G_M31524_IG13
;; size=4 bbWeight=2 PerfScore 7.00
G_M31524_IG10: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
- slli a4, a3, 1
- add t6, a0, a4
- lhu a5, 0xD1FFAB1E(t6)
+ sh1add a4, a3, a0
+ lhu a4, 0xD1FFAB1E(a4)
+ sext.w a5, a4
sext.w a6, a5
- sext.w a7, a6
- addi t0, zero, 0xD1FFAB1E
- bltu t0, a7, G_M31524_IG13
- ;; size=28 bbWeight=4 PerfScore 36.00
+ addi a7, zero, 0xD1FFAB1E
+ bltu a7, a6, G_M31524_IG13
+ ;; size=24 bbWeight=4 PerfScore 34.00
G_M31524_IG11: ; bbWeight=2, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
- addiw a7, a6, 0xD1FFAB1E
- addi t0, zero, 0xD1FFAB1E
- bltu t0, a7, G_M31524_IG12
addiw a6, a5, 0xD1FFAB1E
+ addi a7, zero, 0xD1FFAB1E
+ bltu a7, a6, G_M31524_IG12
+ addiw a5, a4, 0xD1FFAB1E
;; size=16 bbWeight=2 PerfScore 10.00
G_M31524_IG12: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, isz
- zext.h a5, a6
- add t6, a1, a4
- sh a5, 0xD1FFAB1E(t6)
+ zext.h a4, a5
+ sh1add a5, a3, a1
+ sh a4, 0xD1FFAB1E(a5)
addi a3, a3, 0xD1FFAB1E
bltu a3, a2, G_M31524_IG10
;; size=20 bbWeight=4 PerfScore 36.00
@@ -431,7 +425,7 @@ RWD08 dq 0025002500250025h
RWD16 dq FF80FF80FF80FF80h
-; Total bytes of code 348, prolog size 16, PerfScore 306.75, instruction count 76, allocated bytes for code 348 (MethodHash=91c584db) for method System.Text.Ascii:ChangeCase[ushort,ushort,System.Text.Ascii+ToLowerConversion](ptr,ptr,nuint):nuint (FullOpts)
+; Total bytes of code 336, prolog size 16, PerfScore 302.75, instruction count 73, allocated bytes for code 336 (MethodHash=91c584db) for method System.Text.Ascii:ChangeCase[ushort,ushort,System.Text.Ascii+ToLowerConversion](ptr,ptr,nuint):nuint (FullOpts)
; ============================================================
Unwind Info:
@@ -442,7 +436,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 174 (0x000ae) Actual length = 348 (0x00015c)
+ Function Length : 168 (0x000a8) Actual length = 336 (0x000150)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)-14 (-3.33%) : 492.dasm - System.SpanHelpers:SequenceCompareTo(byref,int,byref,int):int (FullOpts)@@ -9,26 +9,23 @@
; Final local variable assignments
;
; V00 arg0 [V00,T01] ( 6, 11.50) byref -> s1 single-def
-; V01 arg1 [V01,T07] ( 6, 5 ) int -> s3 single-def
+; V01 arg1 [V01,T05] ( 6, 5 ) int -> s3 single-def
; V02 arg2 [V02,T02] ( 6, 11.50) byref -> s2 single-def
-; V03 arg3 [V03,T08] ( 6, 5 ) int -> s4 single-def
-; V04 loc0 [V04,T12] ( 2, 1.50) int -> a0
-; V05 loc1 [V05,T05] ( 6, 10.50) long -> a1
-; V06 loc2 [V06,T00] ( 13, 35 ) long -> a2
+; V03 arg3 [V03,T06] ( 6, 5 ) int -> s4 single-def
+; V04 loc0 [V04,T09] ( 2, 1.50) int -> a0
+; V05 loc1 [V05,T03] ( 6, 10.50) long -> a1
+; V06 loc2 [V06,T00] ( 16, 43.50) long -> a2
;* V07 loc3 [V07 ] ( 0, 0 ) long -> zero-ref
-; V08 loc4 [V08,T06] ( 3, 8.50) int -> a3
+; V08 loc4 [V08,T04] ( 3, 8.50) int -> a3
;# V09 OutArgs [V09 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
-; V10 tmp1 [V10,T09] ( 3, 1.50) int -> s3
+; V10 tmp1 [V10,T07] ( 3, 1.50) int -> s3
;* V11 tmp2 [V11 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V12 tmp3 [V12 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V13 tmp4 [V13 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V14 tmp5 [V14 ] ( 0, 0 ) ubyte -> zero-ref "Inlining Arg"
;* V15 tmp6 [V15 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V16 tmp7 [V16 ] ( 0, 0 ) ushort -> zero-ref "Inlining Arg"
-; V17 cse0 [V17,T03] ( 3, 12 ) long -> a3 "CSE #01: aggressive"
-; V18 cse1 [V18,T04] ( 3, 12 ) long -> a3 "CSE #04: aggressive"
-; V19 cse2 [V19,T10] ( 3, 1.50) long -> a4 "CSE #02: moderate"
-; V20 cse3 [V20,T11] ( 3, 1.50) long -> a3 "CSE #03: moderate"
+; V17 cse0 [V17,T08] ( 3, 1.50) long -> a3 "CSE #01: moderate"
;
; Lcl frame size = 0
Frame info. #outsz=0; #framesz=48; lcl=0
@@ -119,51 +116,55 @@ G_M65109_IG09: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=40200 {s1 s2
bltu a1, a3, G_M65109_IG11
;; size=16 bbWeight=0.50 PerfScore 2.50
G_M65109_IG10: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=40200 {s1 s2}, byref, isz
- slli a3, a2, 1
- add t6, s1, a3
- ; byrRegs +[t6]
- ld a4, 0xD1FFAB1E(t6)
- add t6, s2, a3
- ld a3, 0xD1FFAB1E(t6)
- bne a4, a3, G_M65109_IG11
+ sh1add a3, a2, s1
+ ; byrRegs +[a3]
+ ld a3, 0xD1FFAB1E(a3)
+ ; byrRegs -[a3]
+ sh1add a4, a2, s2
+ ; byrRegs +[a4]
+ ld a4, 0xD1FFAB1E(a4)
+ ; byrRegs -[a4]
+ bne a3, a4, G_M65109_IG11
addi a2, a2, 0xD1FFAB1E
addi a3, a2, 0xD1FFAB1E
bgeu a1, a3, G_M65109_IG10
- ;; size=36 bbWeight=4 PerfScore 54.00
+ ;; size=32 bbWeight=4 PerfScore 52.00
G_M65109_IG11: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=40200 {s1 s2}, byref, isz
- ; byrRegs -[t6]
addi a3, a2, 0xD1FFAB1E
bltu a1, a3, G_M65109_IG12
- slli a4, a2, 1
- add t6, s1, a4
- ; byrRegs +[t6]
- lw a5, 0xD1FFAB1E(t6)
- sext.w a5, a5
- add t6, s2, a4
- lw a4, 0xD1FFAB1E(t6)
+ sh1add a4, a2, s1
+ ; byrRegs +[a4]
+ lw a4, 0xD1FFAB1E(a4)
+ ; byrRegs -[a4]
sext.w a4, a4
- bne a5, a4, G_M65109_IG12
+ sh1add a5, a2, s2
+ ; byrRegs +[a5]
+ lw a5, 0xD1FFAB1E(a5)
+ ; byrRegs -[a5]
+ sext.w a5, a5
+ bne a4, a5, G_M65109_IG12
mv a2, a3
- ;; size=44 bbWeight=0.50 PerfScore 7.25
+ ;; size=40 bbWeight=0.50 PerfScore 7.00
G_M65109_IG12: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=40200 {s1 s2}, byref, isz
- ; byrRegs -[t6]
bgeu a2, a1, G_M65109_IG14
;; size=4 bbWeight=1 PerfScore 3.50
G_M65109_IG13: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=40200 {s1 s2}, byref, isz
- slli a3, a2, 1
- add t6, s1, a3
- ; byrRegs +[t6]
- lhu a4, 0xD1FFAB1E(t6)
- add t6, s2, a3
- lhu a3, 0xD1FFAB1E(t6)
- subw a3, a4, a3
+ sh1add a3, a2, s1
+ ; byrRegs +[a3]
+ lhu a3, 0xD1FFAB1E(a3)
+ ; byrRegs -[a3]
+ sh1add a4, a2, s2
+ ; byrRegs +[a4]
+ lhu a4, 0xD1FFAB1E(a4)
+ ; byrRegs -[a4]
+ subw a3, a3, a4
sext.w a4, a3
bnez a4, G_M65109_IG15
addi a2, a2, 0xD1FFAB1E
bltu a2, a1, G_M65109_IG13
- ;; size=40 bbWeight=4 PerfScore 64.00
+ ;; size=34 bbWeight=4 PerfScore 62.00
G_M65109_IG14: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, epilog, nogc
- ; byrRegs -[s1 s2 t6]
+ ; byrRegs -[s1 s2]
ld s4, 40(sp)
ld s3, 32(sp)
ld s2, 24(sp)
@@ -185,7 +186,7 @@ G_M65109_IG16: ; bbWeight=0.50, epilog, nogc, extend
addi sp, sp, 48
ret ;; size=32 bbWeight=0.50 PerfScore 7.75
-; Total bytes of code 420, prolog size 48, PerfScore 207.25, instruction count 85, allocated bytes for code 420 (MethodHash=bda601aa) for method System.SpanHelpers:SequenceCompareTo(byref,int,byref,int):int (FullOpts)
+; Total bytes of code 406, prolog size 48, PerfScore 203.00, instruction count 82, allocated bytes for code 406 (MethodHash=bda601aa) for method System.SpanHelpers:SequenceCompareTo(byref,int,byref,int):int (FullOpts)
; ============================================================
Unwind Info:
@@ -196,7 +197,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 210 (0x000d2) Actual length = 420 (0x0001a4)
+ Function Length : 203 (0x000cb) Actual length = 406 (0x000196)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)+20 (+2.99%) : 992.dasm - System.Number+BigInteger:HeuristicDivide(byref,byref):uint (FullOpts)@@ -8,32 +8,32 @@
; 0 inlinees with PGO data; 40 single block inlinees; 10 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T24] ( 7, 5 ) byref -> s1 single-def
-; V01 arg1 [V01,T25] ( 5, 4 ) byref -> a1 single-def
+; V00 arg0 [V00,T22] ( 7, 5 ) byref -> s1 single-def
+; V01 arg1 [V01,T23] ( 5, 4 ) byref -> a1 single-def
; V02 loc0 [V02,T00] ( 15, 36 ) int -> s2
-; V03 loc1 [V03,T29] ( 3, 1.50) int -> a0
-; V04 loc2 [V04,T27] ( 6, 3 ) int -> s5
+; V03 loc1 [V03,T26] ( 4, 2 ) int -> a0
+; V04 loc2 [V04,T25] ( 6, 3 ) int -> s5
;* V05 loc3 [V05 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V06 loc4 [V06 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
-; V07 loc5 [V07,T02] ( 6, 20.50) int -> a0
-; V08 loc6 [V08,T13] ( 3, 8.50) long -> a2
-; V09 loc7 [V09,T14] ( 3, 8.50) long -> a3
-; V10 loc8 [V10,T09] ( 3, 12 ) long -> a5
-; V11 loc9 [V11,T10] ( 3, 12 ) long -> a5
+; V07 loc5 [V07,T01] ( 8, 28.50) int -> a0
+; V08 loc6 [V08,T11] ( 3, 8.50) long -> a2
+; V09 loc7 [V09,T12] ( 3, 8.50) long -> a3
+; V10 loc8 [V10,T07] ( 3, 12 ) long -> a5
+; V11 loc9 [V11,T08] ( 3, 12 ) long -> a5
;* V12 loc10 [V12 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V13 loc11 [V13 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V14 loc12 [V14 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V15 loc13 [V15 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
-; V16 loc14 [V16,T03] ( 6, 20.50) int -> a0
-; V17 loc15 [V17,T15] ( 3, 8.50) long -> a1
-; V18 loc16 [V18,T11] ( 3, 12 ) long -> a2
+; V16 loc14 [V16,T02] ( 8, 28.50) int -> a0
+; V17 loc15 [V17,T13] ( 3, 8.50) long -> a1
+; V18 loc16 [V18,T09] ( 3, 12 ) long -> a2
;* V19 loc17 [V19 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V20 loc18 [V20 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V21 loc19 [V21 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V22 loc20 [V22 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;# V23 OutArgs [V23 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
-; V24 tmp1 [V24,T28] ( 2, 2 ) int -> a2 "impAppendStmt"
-; V25 tmp2 [V25,T08] ( 2, 16 ) long -> a2 "impAppendStmt"
+; V24 tmp1 [V24,T27] ( 2, 2 ) int -> a2 "impAppendStmt"
+; V25 tmp2 [V25,T06] ( 2, 16 ) long -> a2 "impAppendStmt"
;* V26 tmp3 [V26 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V27 tmp4 [V27 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "NewObj constructor temp" <System.Span`1[uint]>
;* V28 tmp5 [V28 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
@@ -74,34 +74,31 @@
;* V63 tmp40 [V63 ] ( 0, 0 ) int -> zero-ref "field V21._length (fldOffset=0x8)" P-INDEP
;* V64 tmp41 [V64 ] ( 0, 0 ) byref -> zero-ref "field V22._reference (fldOffset=0x0)" P-INDEP
;* V65 tmp42 [V65 ] ( 0, 0 ) int -> zero-ref "field V22._length (fldOffset=0x8)" P-INDEP
-; V66 tmp43 [V66,T31] ( 2, 1 ) byref -> a2 single-def "field V27._reference (fldOffset=0x0)" P-INDEP
+; V66 tmp43 [V66,T28] ( 2, 1 ) byref -> a2 single-def "field V27._reference (fldOffset=0x0)" P-INDEP
;* V67 tmp44 [V67 ] ( 0, 0 ) int -> zero-ref "field V27._length (fldOffset=0x8)" P-INDEP
-; V68 tmp45 [V68,T32] ( 2, 1 ) byref -> a3 single-def "field V29._reference (fldOffset=0x0)" P-INDEP
+; V68 tmp45 [V68,T29] ( 2, 1 ) byref -> a3 single-def "field V29._reference (fldOffset=0x0)" P-INDEP
;* V69 tmp46 [V69 ] ( 0, 0 ) int -> zero-ref "field V29._length (fldOffset=0x8)" P-INDEP
-; V70 tmp47 [V70,T16] ( 2, 8 ) byref -> a5 "field V31._reference (fldOffset=0x0)" P-INDEP
+; V70 tmp47 [V70,T14] ( 2, 8 ) byref -> a5 "field V31._reference (fldOffset=0x0)" P-INDEP
;* V71 tmp48 [V71 ] ( 0, 0 ) int -> zero-ref "field V31._length (fldOffset=0x8)" P-INDEP
-; V72 tmp49 [V72,T17] ( 2, 8 ) byref -> a7 "field V33._reference (fldOffset=0x0)" P-INDEP
+; V72 tmp49 [V72,T15] ( 2, 8 ) byref -> a6 "field V33._reference (fldOffset=0x0)" P-INDEP
;* V73 tmp50 [V73 ] ( 0, 0 ) int -> zero-ref "field V33._length (fldOffset=0x8)" P-INDEP
-; V74 tmp51 [V74,T18] ( 2, 8 ) byref -> a7 "field V35._reference (fldOffset=0x0)" P-INDEP
+; V74 tmp51 [V74,T16] ( 2, 8 ) byref -> a6 "field V35._reference (fldOffset=0x0)" P-INDEP
;* V75 tmp52 [V75 ] ( 0, 0 ) int -> zero-ref "field V35._length (fldOffset=0x8)" P-INDEP
-; V76 tmp53 [V76,T19] ( 2, 8 ) byref -> a0 "field V37._reference (fldOffset=0x0)" P-INDEP
+; V76 tmp53 [V76,T17] ( 2, 8 ) byref -> a0 "field V37._reference (fldOffset=0x0)" P-INDEP
;* V77 tmp54 [V77 ] ( 0, 0 ) int -> zero-ref "field V37._length (fldOffset=0x8)" P-INDEP
-; V78 tmp55 [V78,T20] ( 2, 8 ) byref -> a2 "field V39._reference (fldOffset=0x0)" P-INDEP
+; V78 tmp55 [V78,T18] ( 2, 8 ) byref -> a2 "field V39._reference (fldOffset=0x0)" P-INDEP
;* V79 tmp56 [V79 ] ( 0, 0 ) int -> zero-ref "field V39._length (fldOffset=0x8)" P-INDEP
-; V80 tmp57 [V80,T21] ( 2, 8 ) byref -> a4 "field V41._reference (fldOffset=0x0)" P-INDEP
+; V80 tmp57 [V80,T19] ( 2, 8 ) byref -> a3 "field V41._reference (fldOffset=0x0)" P-INDEP
;* V81 tmp58 [V81 ] ( 0, 0 ) int -> zero-ref "field V41._length (fldOffset=0x8)" P-INDEP
-; V82 tmp59 [V82,T22] ( 2, 8 ) byref -> a4 "field V43._reference (fldOffset=0x0)" P-INDEP
+; V82 tmp59 [V82,T20] ( 2, 8 ) byref -> a3 "field V43._reference (fldOffset=0x0)" P-INDEP
;* V83 tmp60 [V83 ] ( 0, 0 ) int -> zero-ref "field V43._length (fldOffset=0x8)" P-INDEP
-; V84 tmp61 [V84,T23] ( 2, 8 ) byref -> a0 "field V45._reference (fldOffset=0x0)" P-INDEP
+; V84 tmp61 [V84,T21] ( 2, 8 ) byref -> a0 "field V45._reference (fldOffset=0x0)" P-INDEP
;* V85 tmp62 [V85 ] ( 0, 0 ) int -> zero-ref "field V45._length (fldOffset=0x8)" P-INDEP
-; V86 cse0 [V86,T30] ( 3, 1.50) long -> a0 "CSE #02: moderate"
-; V87 cse1 [V87,T04] ( 4, 16 ) long -> a6 "CSE #07: aggressive"
-; V88 cse2 [V88,T05] ( 4, 16 ) long -> a3 "CSE #10: aggressive"
-; V89 cse3 [V89,T01] ( 8, 25 ) byref -> s3 "CSE #05: aggressive"
-; V90 cse4 [V90,T12] ( 4, 9 ) byref -> s4 "CSE #03: moderate"
-; V91 cse5 [V91,T06] ( 4, 16 ) int -> a2 "CSE #08: aggressive"
-; V92 cse6 [V92,T07] ( 4, 16 ) int -> a1 "CSE #11: aggressive"
-; V93 cse7 [V93,T26] ( 2, 4.50) long -> a4 hoist "CSE #04: moderate"
+; V86 cse0 [V86,T03] ( 8, 25 ) byref -> s3 "CSE #03: aggressive"
+; V87 cse1 [V87,T10] ( 4, 9 ) byref -> s4 "CSE #01: moderate"
+; V88 cse2 [V88,T04] ( 4, 16 ) int -> a2 "CSE #04: aggressive"
+; V89 cse3 [V89,T05] ( 4, 16 ) int -> a1 "CSE #05: aggressive"
+; V90 cse4 [V90,T24] ( 2, 4.50) long -> a4 hoist "CSE #02: moderate"
;
; Lcl frame size = 8
Frame info. #outsz=0; #framesz=64; lcl=8
@@ -137,8 +134,8 @@ G_M38309_IG03: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0A00 {s1 a1}
sext.w a4, a3
sext.w a5, a0
bgeu a5, a4, G_M38309_IG17
- slli.uw a0, a0, 2
- add t6, a2, a0
+ slli.uw a3, a0, 2
+ add t6, a2, a3
; byrRegs +[t6]
lw a2, 0xD1FFAB1E(t6)
; byrRegs -[a2]
@@ -146,6 +143,7 @@ G_M38309_IG03: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0A00 {s1 a1}
; byrRegs +[s4]
mv a3, s4
; byrRegs +[a3]
+ slli.uw a0, a0, 2
add t6, a3, a0
lw a0, 0xD1FFAB1E(t6)
addiw a0, a0, 0xD1FFAB1E
@@ -158,7 +156,7 @@ G_M38309_IG03: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0A00 {s1 a1}
mv a3, zero
; byrRegs -[a3]
zext.w a4, s5
- ;; size=92 bbWeight=0.50 PerfScore 22.00
+ ;; size=96 bbWeight=0.50 PerfScore 22.25
G_M38309_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=180A00 {s1 a1 s3 s4}, byref, isz
; byrRegs -[t6]
mv a5, s4
@@ -176,28 +174,31 @@ G_M38309_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=180A00 {s1 a1 s
mul a5, a5, a4
add a5, a5, a3
srli a3, a5, 32
- mv a7, s3
- ; byrRegs +[a7]
- add t6, a7, a6
- lw a7, 0xD1FFAB1E(t6)
- ; byrRegs -[a7]
- zext.w a7, a7
+ mv a6, s3
+ ; byrRegs +[a6]
+ slli.uw a7, a0, 2
+ add t6, a6, a7
+ lw a6, 0xD1FFAB1E(t6)
+ ; byrRegs -[a6]
+ zext.w a6, a6
zext.w a5, a5
- sub a5, a7, a5
+ sub a5, a6, a5
sub a5, a5, a2
srli a2, a5, 32
andi a2, a2, 1
- mv a7, s3
- ; byrRegs +[a7]
- add t6, a7, a6
+ mv a6, s3
+ ; byrRegs +[a6]
+ slli.uw a7, a0, 2
+ add t6, a6, a7
sw a5, 0xD1FFAB1E(t6)
addiw a0, a0, 0xD1FFAB1E
sext.w a5, a0
sext.w a6, s2
+ ; byrRegs -[a6]
blt a5, a6, G_M38309_IG04
- ;; size=108 bbWeight=4 PerfScore 112.00
+ ;; size=116 bbWeight=4 PerfScore 116.00
G_M38309_IG05: ; bbWeight=0.25, gcrefRegs=0000 {}, byrefRegs=180A00 {s1 a1 s3 s4}, byref, isz
- ; byrRegs -[a7 t6]
+ ; byrRegs -[t6]
sext.w a0, s2
bge zero, a0, G_M38309_IG07
;; size=8 bbWeight=0.25 PerfScore 1.00
@@ -255,27 +256,30 @@ G_M38309_IG09: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=180200 {s1 s3 s
lw a2, 0xD1FFAB1E(t6)
; byrRegs -[a2]
zext.w a2, a2
- mv a4, s4
- ; byrRegs +[a4]
- add t6, a4, a3
- lw a4, 0xD1FFAB1E(t6)
- ; byrRegs -[a4]
- zext.w a4, a4
- sub a2, a2, a4
+ mv a3, s4
+ ; byrRegs +[a3]
+ slli.uw a4, a0, 2
+ add t6, a3, a4
+ lw a3, 0xD1FFAB1E(t6)
+ ; byrRegs -[a3]
+ zext.w a3, a3
+ sub a2, a2, a3
sub a2, a2, a1
srli a1, a2, 32
andi a1, a1, 1
- mv a4, s3
- ; byrRegs +[a4]
- add t6, a4, a3
+ mv a3, s3
+ ; byrRegs +[a3]
+ slli.uw a4, a0, 2
+ add t6, a3, a4
sw a2, 0xD1FFAB1E(t6)
addiw a0, a0, 0xD1FFAB1E
sext.w a2, a0
sext.w a3, s2
+ ; byrRegs -[a3]
blt a2, a3, G_M38309_IG09
- ;; size=92 bbWeight=4 PerfScore 98.00
+ ;; size=100 bbWeight=4 PerfScore 102.00
G_M38309_IG10: ; bbWeight=0.25, gcrefRegs=0000 {}, byrefRegs=80200 {s1 s3}, byref, isz
- ; byrRegs -[a4 s4 t6]
+ ; byrRegs -[s4 t6]
sext.w a0, s2
bge zero, a0, G_M38309_IG12
;; size=8 bbWeight=0.25 PerfScore 1.00
@@ -348,7 +352,7 @@ G_M38309_IG18: ; bbWeight=0, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
ebreak
;; size=20 bbWeight=0 PerfScore 0.00
-; Total bytes of code 668, prolog size 40, PerfScore 442.00, instruction count 159, allocated bytes for code 668 (MethodHash=daac6a5a) for method System.Number+BigInteger:HeuristicDivide(byref,byref):uint (FullOpts)
+; Total bytes of code 688, prolog size 40, PerfScore 450.25, instruction count 164, allocated bytes for code 688 (MethodHash=daac6a5a) for method System.Number+BigInteger:HeuristicDivide(byref,byref):uint (FullOpts)
; ============================================================
Unwind Info:
@@ -359,7 +363,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 334 (0x0014e) Actual length = 668 (0x00029c)
+ Function Length : 344 (0x00158) Actual length = 688 (0x0002b0)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)+4 (+1.38%) : 993.dasm - System.Number+BigInteger:Multiply10():this (FullOpts)@@ -8,10 +8,10 @@
; 0 inlinees with PGO data; 15 single block inlinees; 4 inlinees without PGO data
; Final local variable assignments
;
-; V00 this [V00,T05] ( 6, 8 ) byref -> s1 this single-def
-; V01 loc0 [V01,T00] ( 8, 21.50) int -> a1
-; V02 loc1 [V02,T09] ( 4, 5.50) int -> a0
-; V03 loc2 [V03,T06] ( 5, 9.50) long -> a2
+; V00 this [V00,T04] ( 6, 8 ) byref -> s1 this single-def
+; V01 loc0 [V01,T00] ( 9, 25.50) int -> a1
+; V02 loc1 [V02,T08] ( 4, 5.50) int -> a0
+; V03 loc2 [V03,T05] ( 5, 9.50) long -> a2
; V04 loc3 [V04,T02] ( 3, 12 ) long -> a4
; V05 loc4 [V05,T03] ( 3, 12 ) long -> a4
;* V06 loc5 [V06 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
@@ -32,15 +32,14 @@
;* V21 tmp12 [V21 ] ( 0, 0 ) int -> zero-ref "field V07._length (fldOffset=0x8)" P-INDEP
;* V22 tmp13 [V22 ] ( 0, 0 ) byref -> zero-ref single-def "field V08._reference (fldOffset=0x0)" P-INDEP
;* V23 tmp14 [V23 ] ( 0, 0 ) int -> zero-ref "field V08._length (fldOffset=0x8)" P-INDEP
-; V24 tmp15 [V24,T07] ( 2, 8 ) byref -> a4 "field V11._reference (fldOffset=0x0)" P-INDEP
+; V24 tmp15 [V24,T06] ( 2, 8 ) byref -> a4 "field V11._reference (fldOffset=0x0)" P-INDEP
;* V25 tmp16 [V25 ] ( 0, 0 ) int -> zero-ref "field V11._length (fldOffset=0x8)" P-INDEP
-; V26 tmp17 [V26,T08] ( 2, 8 ) byref -> a6 "field V13._reference (fldOffset=0x0)" P-INDEP
+; V26 tmp17 [V26,T07] ( 2, 8 ) byref -> a5 "field V13._reference (fldOffset=0x0)" P-INDEP
;* V27 tmp18 [V27 ] ( 0, 0 ) int -> zero-ref "field V13._length (fldOffset=0x8)" P-INDEP
-; V28 tmp19 [V28,T11] ( 2, 1 ) byref -> a3 single-def "field V17._reference (fldOffset=0x0)" P-INDEP
+; V28 tmp19 [V28,T10] ( 2, 1 ) byref -> a3 single-def "field V17._reference (fldOffset=0x0)" P-INDEP
;* V29 tmp20 [V29 ] ( 0, 0 ) int -> zero-ref "field V17._length (fldOffset=0x8)" P-INDEP
-; V30 cse0 [V30,T04] ( 3, 12 ) long -> a5 "CSE #04: aggressive"
-; V31 cse1 [V31,T01] ( 4, 12.50) byref -> a3 "CSE #02: aggressive"
-; V32 cse2 [V32,T10] ( 3, 2.50) int -> a0 "CSE #01: aggressive"
+; V30 cse0 [V30,T01] ( 4, 12.50) byref -> a3 "CSE #02: aggressive"
+; V31 cse1 [V31,T09] ( 3, 2.50) int -> a0 "CSE #01: aggressive"
;
; Lcl frame size = 8
Frame info. #outsz=0; #framesz=32; lcl=8
@@ -78,21 +77,23 @@ G_M24569_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0200 {s1}, byre
lw a4, 0xD1FFAB1E(t6)
; byrRegs -[a4]
zext.w a4, a4
- slli a6, a4, 1
- sh3add a4, a4, a6
+ slli a5, a4, 1
+ sh3add a4, a4, a5
add a4, a4, a2
srli a2, a4, 32
- mv a6, a3
- ; byrRegs +[a6]
- add t6, a6, a5
+ mv a5, a3
+ ; byrRegs +[a5]
+ slli.uw a6, a1, 2
+ add t6, a5, a6
sw a4, 0xD1FFAB1E(t6)
addiw a1, a1, 0xD1FFAB1E
sext.w a4, a1
sext.w a5, a0
+ ; byrRegs -[a5]
blt a4, a5, G_M24569_IG04
- ;; size=82 bbWeight=4 PerfScore 86.00
+ ;; size=86 bbWeight=4 PerfScore 88.00
G_M24569_IG05: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=2200 {s1 a3}, byref, isz
- ; byrRegs -[a6 t6]
+ ; byrRegs -[t6]
beqz a2, G_M24569_IG07
sext.w a4, a0
addi a5, zero, 0xD1FFAB1E
@@ -149,7 +150,7 @@ G_M24569_IG08: ; bbWeight=0, gcVars=0000000000000000 {}, gcrefRegs=0000 {
ebreak
;; size=28 bbWeight=0 PerfScore 0.00
-; Total bytes of code 290, prolog size 24, PerfScore 138.00, instruction count 60, allocated bytes for code 290 (MethodHash=90daa006) for method System.Number+BigInteger:Multiply10():this (FullOpts)
+; Total bytes of code 294, prolog size 24, PerfScore 140.00, instruction count 61, allocated bytes for code 294 (MethodHash=90daa006) for method System.Number+BigInteger:Multiply10():this (FullOpts)
; ============================================================
Unwind Info:
@@ -160,7 +161,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 145 (0x00091) Actual length = 290 (0x000122)
+ Function Length : 147 (0x00093) Actual length = 294 (0x000126)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)+4 (+0.81%) : 990.dasm - System.Number+BigInteger:Multiply(byref,uint,byref) (FullOpts)@@ -8,26 +8,26 @@
; 0 inlinees with PGO data; 23 single block inlinees; 8 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T04] ( 6, 8 ) byref -> a0 single-def
-; V01 arg1 [V01,T08] ( 6, 4 ) int -> a1 single-def
+; V00 arg0 [V00,T03] ( 6, 8 ) byref -> a0 single-def
+; V01 arg1 [V01,T07] ( 6, 4 ) int -> a1 single-def
; V02 arg2 [V02,T01] ( 14, 15 ) byref -> s1 single-def
-; V03 loc0 [V03,T09] ( 5, 6 ) int -> s2
-; V04 loc1 [V04,T00] ( 8, 21.50) int -> a2
-; V05 loc2 [V05,T05] ( 5, 9.50) int -> a3
-; V06 loc3 [V06,T14] ( 3, 1.50) int -> a0
+; V03 loc0 [V03,T08] ( 5, 6 ) int -> s2
+; V04 loc1 [V04,T00] ( 9, 25.50) int -> a2
+; V05 loc2 [V05,T04] ( 5, 9.50) int -> a3
+; V06 loc3 [V06,T13] ( 3, 1.50) int -> a0
; V07 loc4 [V07,T02] ( 3, 12 ) long -> a1
;* V08 loc5 [V08 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V09 loc6 [V09 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;* V10 loc7 [V10 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op <System.Span`1[uint]>
;# V11 OutArgs [V11 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
-; V12 tmp1 [V12,T15] ( 3, 1.50) int -> a2 "Inline return value spill temp"
+; V12 tmp1 [V12,T14] ( 3, 1.50) int -> a2 "Inline return value spill temp"
;* V13 tmp2 [V13 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
-; V14 tmp3 [V14,T11] ( 4, 4 ) long -> a0 "Inlining Arg"
-; V15 tmp4 [V15,T13] ( 3, 3 ) int -> a0 "Inlining Arg"
+; V14 tmp3 [V14,T10] ( 4, 4 ) long -> a0 "Inlining Arg"
+; V15 tmp4 [V15,T12] ( 3, 3 ) int -> a0 "Inlining Arg"
;* V16 tmp5 [V16 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V17 tmp6 [V17 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V18 tmp7 [V18 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
-; V19 tmp8 [V19,T16] ( 3, 1.50) int -> a2 "Inline stloc first use temp"
+; V19 tmp8 [V19,T15] ( 3, 1.50) int -> a2 "Inline stloc first use temp"
;* V20 tmp9 [V20 ] ( 0, 0 ) byref -> zero-ref "impAppendStmt"
;* V21 tmp10 [V21 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
;* V22 tmp11 [V22 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg"
@@ -46,16 +46,15 @@
;* V35 tmp24 [V35 ] ( 0, 0 ) int -> zero-ref "field V09._length (fldOffset=0x8)" P-INDEP
;* V36 tmp25 [V36 ] ( 0, 0 ) byref -> zero-ref single-def "field V10._reference (fldOffset=0x0)" P-INDEP
;* V37 tmp26 [V37 ] ( 0, 0 ) int -> zero-ref "field V10._length (fldOffset=0x8)" P-INDEP
-; V38 tmp27 [V38,T06] ( 2, 8 ) byref -> a1 "field V25._reference (fldOffset=0x0)" P-INDEP
+; V38 tmp27 [V38,T05] ( 2, 8 ) byref -> a1 "field V25._reference (fldOffset=0x0)" P-INDEP
;* V39 tmp28 [V39 ] ( 0, 0 ) int -> zero-ref "field V25._length (fldOffset=0x8)" P-INDEP
-; V40 tmp29 [V40,T07] ( 2, 8 ) byref -> a3 "field V27._reference (fldOffset=0x0)" P-INDEP
+; V40 tmp29 [V40,T06] ( 2, 8 ) byref -> a3 "field V27._reference (fldOffset=0x0)" P-INDEP
;* V41 tmp30 [V41 ] ( 0, 0 ) int -> zero-ref "field V27._length (fldOffset=0x8)" P-INDEP
-; V42 tmp31 [V42,T18] ( 2, 1 ) byref -> a0 single-def "field V31._reference (fldOffset=0x0)" P-INDEP
+; V42 tmp31 [V42,T17] ( 2, 1 ) byref -> a0 single-def "field V31._reference (fldOffset=0x0)" P-INDEP
;* V43 tmp32 [V43 ] ( 0, 0 ) int -> zero-ref "field V31._length (fldOffset=0x8)" P-INDEP
-; V44 cse0 [V44,T03] ( 3, 12 ) long -> a4 "CSE #07: aggressive"
-; V45 cse1 [V45,T12] ( 5, 3.50) int -> s2 "CSE #01: moderate"
-; V46 cse2 [V46,T17] ( 3, 1.50) long -> a1 "CSE #02: moderate"
-; V47 cse3 [V47,T10] ( 4, 5.50) long -> s3 hoist multi-def "CSE #03: aggressive"
+; V44 cse0 [V44,T11] ( 5, 3.50) int -> s2 "CSE #01: moderate"
+; V45 cse1 [V45,T16] ( 3, 1.50) long -> a1 "CSE #02: moderate"
+; V46 cse2 [V46,T09] ( 4, 5.50) long -> s3 hoist multi-def "CSE #03: aggressive"
;
; Lcl frame size = 8
Frame info. #outsz=0; #framesz=48; lcl=8
@@ -105,6 +104,7 @@ G_M6434_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0600 {s1 a0}, by
lb zero, 0xD1FFAB1E(s1)
addi a3, s1, 0xD1FFAB1E
; byrRegs +[a3]
+ slli.uw a4, a2, 2
add t6, a3, a4
sw a1, 0xD1FFAB1E(t6)
srli a1, a1, 32
@@ -114,7 +114,7 @@ G_M6434_IG04: ; bbWeight=4, gcrefRegs=0000 {}, byrefRegs=0600 {s1 a0}, by
sext.w a1, a2
sext.w a4, s2
blt a1, a4, G_M6434_IG04
- ;; size=86 bbWeight=4 PerfScore 104.00
+ ;; size=90 bbWeight=4 PerfScore 106.00
G_M6434_IG05: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0200 {s1}, byref, isz
; byrRegs -[a0 t6]
sext.w a0, s2
@@ -238,7 +238,7 @@ G_M6434_IG15: ; bbWeight=0, gcVars=0000000000000000 {}, gcrefRegs=0000 {}
ebreak
;; size=28 bbWeight=0 PerfScore 0.00
-; Total bytes of code 494, prolog size 32, PerfScore 204.50, instruction count 107, allocated bytes for code 494 (MethodHash=71b0e6dd) for method System.Number+BigInteger:Multiply(byref,uint,byref) (FullOpts)
+; Total bytes of code 498, prolog size 32, PerfScore 206.50, instruction count 108, allocated bytes for code 498 (MethodHash=71b0e6dd) for method System.Number+BigInteger:Multiply(byref,uint,byref) (FullOpts)
; ============================================================
Unwind Info:
@@ -249,7 +249,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 247 (0x000f7) Actual length = 494 (0x0001ee)
+ Function Length : 249 (0x000f9) Actual length = 498 (0x0001f2)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)DetailsSize improvements/regressions per collection
PerfScore improvements/regressions per collection
Context information
jit-analyze output |
Member
Yes :) #119634 (I'll resolve the conflict soon) |
Contributor
Author
|
Asmdiffs after merging #119634 into this.
The regression caused by LEA node has been disappeared after the merge. Some other regressions are caused by applying redundant sign-extension to a hoisted variable which is already sign-extended (s2). Diffs are based on 94,824 contexts (86,262 MinOpts, 8,562 FullOpts). Overall (-418 bytes)
MinOpts (+0 bytes)
FullOpts (-418 bytes)
Example diffsSystem.mch-16 (-4.08%) : 4055.dasm - System.RuntimeTypeHandle:CopyRuntimeTypeHandles(System.Type[],byref):nint[] (FullOpts)@@ -8,41 +8,39 @@
; 0 inlinees with PGO data; 0 single block inlinees; 1 inlinees without PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T05] ( 6, 7.50) ref -> s1 class-hnd single-def <System.Type[]>
-; V01 arg1 [V01,T08] ( 4, 3 ) byref -> s2 single-def
-; V02 loc0 [V02,T06] ( 7, 6.04) ref -> s4 class-hnd exact single-def <nint[]>
-; V03 loc1 [V03,T01] ( 11, 16.58) int -> s5
+; V00 arg0 [V00,T04] ( 6, 7.50) ref -> s1 class-hnd single-def <System.Type[]>
+; V01 arg1 [V01,T07] ( 4, 3 ) byref -> s2 single-def
+; V02 loc0 [V02,T05] ( 7, 6.04) ref -> s4 class-hnd exact single-def <nint[]>
+; V03 loc1 [V03,T01] ( 12, 20.54) int -> s5
;* V04 loc2 [V04 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op <System.RuntimeTypeHandle>
;# V05 OutArgs [V05 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
;* V06 tmp1 [V06 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewArr temp" <nint[]>
-; V07 tmp2 [V07,T02] ( 6, 16 ) long -> s7 "Strict ordering of exceptions for Array store"
+; V07 tmp2 [V07,T02] ( 6, 16 ) long -> s6 "Strict ordering of exceptions for Array store"
;* V08 tmp3 [V08 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "dup spill" <System.RuntimeType>
;* V09 tmp4 [V09 ] ( 0, 0 ) ref -> zero-ref
-; V10 tmp5 [V10,T04] ( 6, 10 ) ref -> a0 "field V04.m_type (fldOffset=0x0)" P-INDEP
+; V10 tmp5 [V10,T03] ( 6, 10 ) ref -> a0 "field V04.m_type (fldOffset=0x0)" P-INDEP
; V11 tmp6 [V11,T00] ( 6, 24 ) ref -> a0 "argument with side effect"
-; V12 cse0 [V12,T03] ( 3, 11.88) long -> s6 "CSE #03: aggressive"
-; V13 cse1 [V13,T07] ( 6, 6 ) int -> s3 "CSE #01: aggressive"
+; V12 cse0 [V12,T06] ( 6, 6 ) int -> s3 "CSE #01: aggressive"
;
-; Lcl frame size = 8
-Frame info. #outsz=0; #framesz=80; lcl=8
+; Lcl frame size = 0
+Frame info. #outsz=0; #framesz=64; lcl=0
G_M5038_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
- addi sp, sp, -80
- sd fp, 8(sp)
- sd ra, 16(sp)
- sd s1, 24(sp)
- sd s2, 32(sp)
- sd s3, 40(sp)
- sd s4, 48(sp)
- sd s5, 56(sp)
- sd s6, 64(sp)
- sd s7, 72(sp)
- addi fp, sp, 8
+ addi sp, sp, -64
+ sd fp, 0(sp)
+ sd ra, 8(sp)
+ sd s1, 16(sp)
+ sd s2, 24(sp)
+ sd s3, 32(sp)
+ sd s4, 40(sp)
+ sd s5, 48(sp)
+ sd s6, 56(sp)
+ mv fp, sp
mv s1, a0
; gcrRegs +[s1]
mv s2, a1
; byrRegs +[s2]
- ;; size=52 bbWeight=1 PerfScore 38.00
+ ;; size=48 bbWeight=1 PerfScore 34.00
G_M5038_IG02: ; bbWeight=1, gcrefRegs=0200 {s1}, byrefRegs=40000 {s2}, byref, isz
beqz s1, G_M5038_IG14
;; size=4 bbWeight=1 PerfScore 3.50
@@ -69,8 +67,7 @@ G_M5038_IG03: ; bbWeight=0.50, gcrefRegs=0200 {s1}, byrefRegs=40000 {s2},
blt a0, a1, G_M5038_IG12
;; size=68 bbWeight=0.50 PerfScore 11.50
G_M5038_IG04: ; bbWeight=3.96, gcrefRegs=100200 {s1 s4}, byrefRegs=40000 {s2}, byref, isz
- slli.uw s6, s5, 3
- add a0, s1, s6
+ sh3add.uw a0, s5, s1
; byrRegs +[a0]
ld a0, 0xD1FFAB1E(a0)
; gcrRegs +[a0]
@@ -80,19 +77,19 @@ G_M5038_IG04: ; bbWeight=3.96, gcrefRegs=100200 {s1 s4}, byrefRegs=40000
ld a1, 0xD1FFAB1E(a1)
jalr a1 // <unknown method>
beqz a0, G_M5038_IG06
- ;; size=32 bbWeight=3.96 PerfScore 61.38
+ ;; size=28 bbWeight=3.96 PerfScore 59.40
G_M5038_IG05: ; bbWeight=1.98, gcrefRegs=100600 {s1 a0 s4}, byrefRegs=40000 {s2}, byref, isz
- ld s7, 0xD1FFAB1E(a0)
+ ld s6, 0xD1FFAB1E(a0)
j G_M5038_IG07
;; size=8 bbWeight=1.98 PerfScore 6.93
G_M5038_IG06: ; bbWeight=1.98, gcrefRegs=100200 {s1 s4}, byrefRegs=40000 {s2}, byref
; gcrRegs -[a0]
- mv s7, zero
+ mv s6, zero
;; size=4 bbWeight=1.98 PerfScore 0.99
G_M5038_IG07: ; bbWeight=3.96, gcrefRegs=100200 {s1 s4}, byrefRegs=40000 {s2}, byref, isz
- add a0, s4, s6
+ sh3add.uw a0, s5, s4
; byrRegs +[a0]
- sd s7, 0xD1FFAB1E(a0)
+ sd s6, 0xD1FFAB1E(a0)
addiw s5, s5, 0xD1FFAB1E
sext.w a0, s3
; byrRegs -[a0]
@@ -107,20 +104,19 @@ G_M5038_IG08: ; bbWeight=0.50, gcrefRegs=100000 {s4}, byrefRegs=40000 {s2
; gcrRegs +[a0]
;; size=12 bbWeight=0.50 PerfScore 3.25
G_M5038_IG09: ; bbWeight=0.50, epilog, nogc, extend
- ld s7, 72(sp)
- ld s6, 64(sp)
- ld s5, 56(sp)
- ld s4, 48(sp)
- ld s3, 40(sp)
- ld s2, 32(sp)
- ld s1, 24(sp)
- ld ra, 16(sp)
- ld fp, 8(sp)
- addi sp, sp, 80
- ret ;; size=44 bbWeight=0.50 PerfScore 10.75
+ ld s6, 56(sp)
+ ld s5, 48(sp)
+ ld s4, 40(sp)
+ ld s3, 32(sp)
+ ld s2, 24(sp)
+ ld s1, 16(sp)
+ ld ra, 8(sp)
+ ld fp, 0(sp)
+ addi sp, sp, 64
+ ret ;; size=40 bbWeight=0.50 PerfScore 9.75
G_M5038_IG10: ; bbWeight=0.02, gcVars=0000000000000000 {}, gcrefRegs=100200 {s1 s4}, byrefRegs=40000 {s2}, gcvars, byref
; gcrRegs -[a0] +[s1]
- mv s7, zero
+ mv s6, zero
;; size=4 bbWeight=0.02 PerfScore 0.01
G_M5038_IG11: ; bbWeight=0.04, gcrefRegs=100200 {s1 s4}, byrefRegs=40000 {s2}, byref, isz
lw a0, 0xD1FFAB1E(s4)
@@ -129,7 +125,7 @@ G_M5038_IG11: ; bbWeight=0.04, gcrefRegs=100200 {s1 s4}, byrefRegs=40000
bgeu a2, a1, G_M5038_IG16
sh3add.uw a0, s5, s4
; byrRegs +[a0]
- sd s7, 0xD1FFAB1E(a0)
+ sd s6, 0xD1FFAB1E(a0)
addiw s5, s5, 0xD1FFAB1E
sext.w a0, s3
; byrRegs -[a0]
@@ -149,7 +145,7 @@ G_M5038_IG12: ; bbWeight=0.04, gcrefRegs=100200 {s1 s4}, byrefRegs=40000
beqz a0, G_M5038_IG10
;; size=28 bbWeight=0.04 PerfScore 0.60
G_M5038_IG13: ; bbWeight=0.02, gcrefRegs=100600 {s1 a0 s4}, byrefRegs=40000 {s2}, byref, isz
- ld s7, 0xD1FFAB1E(a0)
+ ld s6, 0xD1FFAB1E(a0)
j G_M5038_IG11
;; size=8 bbWeight=0.02 PerfScore 0.07
G_M5038_IG14: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=40000 {s2}, byref
@@ -159,17 +155,16 @@ G_M5038_IG14: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=40000 {s2}, b
; gcrRegs +[a0]
;; size=8 bbWeight=0.50 PerfScore 2.25
G_M5038_IG15: ; bbWeight=0.50, epilog, nogc, extend
- ld s7, 72(sp)
- ld s6, 64(sp)
- ld s5, 56(sp)
- ld s4, 48(sp)
- ld s3, 40(sp)
- ld s2, 32(sp)
- ld s1, 24(sp)
- ld ra, 16(sp)
- ld fp, 8(sp)
- addi sp, sp, 80
- ret ;; size=44 bbWeight=0.50 PerfScore 10.75
+ ld s6, 56(sp)
+ ld s5, 48(sp)
+ ld s4, 40(sp)
+ ld s3, 32(sp)
+ ld s2, 24(sp)
+ ld s1, 16(sp)
+ ld ra, 8(sp)
+ ld fp, 0(sp)
+ addi sp, sp, 64
+ ret ;; size=40 bbWeight=0.50 PerfScore 9.75
G_M5038_IG16: ; bbWeight=0, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
; gcrRegs -[a0]
; byrRegs -[s2]
@@ -178,37 +173,37 @@ G_M5038_IG16: ; bbWeight=0, gcVars=0000000000000000 {}, gcrefRegs=0000 {}
ebreak
;; size=12 bbWeight=0 PerfScore 0.00
-; Total bytes of code 392, prolog size 44, PerfScore 188.24, instruction count 92, allocated bytes for code 392 (MethodHash=fc39ec51) for method System.RuntimeTypeHandle:CopyRuntimeTypeHandles(System.Type[],byref):nint[] (FullOpts)
+; Total bytes of code 376, prolog size 40, PerfScore 180.26, instruction count 88, allocated bytes for code 376 (MethodHash=fc39ec51) for method System.RuntimeTypeHandle:CopyRuntimeTypeHandles(System.Type[],byref):nint[] (FullOpts)
; ============================================================
Unwind Info:
>> Start offset : 0x000000 (not in unwind data)
>> End offset : 0xd1ffab1e (not in unwind data)
- Code Words : 8
+ Code Words : 7
Epilog Count : 2
E bit : 0
X bit : 0
Vers : 0
- Function Length : 196 (0x000c4) Actual length = 392 (0x000188)
+ Function Length : 188 (0x000bc) Actual length = 376 (0x000178)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)
- Epilog Start Index : 3 (0x03)
+ Epilog Start Index : 1 (0x01)
---- Scope 1
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)
- Epilog Start Index : 3 (0x03)
+ Epilog Start Index : 1 (0x01)
---- Unwind codes ----
- E2 00 01 add_fp 1 (0x01); addi fp, sp, #8
- ---- Epilog start at index 3 ----
- D0 16 09 save_reg X#22 Z#9 (0x09); sd s7, sp, 72
- D0 15 08 save_reg X#21 Z#8 (0x08); sd s6, sp, 64
- D0 14 07 save_reg X#20 Z#7 (0x07); sd s5, sp, 56
- D0 13 06 save_reg X#19 Z#6 (0x06); sd s4, sp, 48
- D0 12 05 save_reg X#18 Z#5 (0x05); sd s3, sp, 40
- D0 11 04 save_reg X#17 Z#4 (0x04); sd s2, sp, 32
- D0 08 03 save_reg X#8 Z#3 (0x03); sd s1, sp, 24
- D0 00 02 save_reg X#0 Z#2 (0x02); sd ra, sp, 16
- D0 07 01 save_reg X#7 Z#1 (0x01); sd fp, sp, 8
- 05 alloc_s #5 (0x05); addi sp, sp, -80 (0x050)
+ E1 set_fp; move fp, sp
+ ---- Epilog start at index 1 ----
+ D0 15 07 save_reg X#21 Z#7 (0x07); sd s6, sp, 56
+ D0 14 06 save_reg X#20 Z#6 (0x06); sd s5, sp, 48
+ D0 13 05 save_reg X#19 Z#5 (0x05); sd s4, sp, 40
+ D0 12 04 save_reg X#18 Z#4 (0x04); sd s3, sp, 32
+ D0 11 03 save_reg X#17 Z#3 (0x03); sd s2, sp, 24
+ D0 08 02 save_reg X#8 Z#2 (0x02); sd s1, sp, 16
+ D0 00 01 save_reg X#0 Z#1 (0x01); sd ra, sp, 8
+ D0 07 00 save_reg X#7 Z#0 (0x00); sd fp, sp, 0
+ 04 alloc_s #4 (0x04); addi sp, sp, -64 (0x040)
+ E4 end
E4 end
-8 (-4.00%) : 15091.dasm - System.CommandLine.Invocation.ParseErrorAction:g__GetStartsWithDistance|11_1(System.String,System.String):int (FullOpts)@@ -7,14 +7,12 @@
; No matching PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T03] ( 5, 7 ) ref -> a0 class-hnd single-def <System.String>
-; V01 arg1 [V01,T02] ( 7, 7.04) ref -> a1 class-hnd single-def <System.String>
-; V02 loc0 [V02,T00] ( 12, 22 ) int -> a2
+; V00 arg0 [V00,T02] ( 5, 7 ) ref -> a0 class-hnd single-def <System.String>
+; V01 arg1 [V01,T01] ( 7, 7.04) ref -> a1 class-hnd single-def <System.String>
+; V02 loc0 [V02,T00] ( 14, 26 ) int -> a2
;# V03 OutArgs [V03 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
-; V04 cse0 [V04,T01] ( 3, 11.88) long -> a5 "CSE #04: aggressive"
-; V05 cse1 [V05,T06] ( 3, 0.12) long -> a4 "CSE #06: conservative"
-; V06 cse2 [V06,T04] ( 5, 6.50) int -> a3 "CSE #01: aggressive"
-; V07 cse3 [V07,T05] ( 5, 5.04) int -> a4 multi-def "CSE #02: aggressive"
+; V04 cse0 [V04,T03] ( 5, 6.50) int -> a3 "CSE #01: aggressive"
+; V05 cse1 [V05,T04] ( 5, 5.04) int -> a4 multi-def "CSE #02: aggressive"
;
; Lcl frame size = 0
Frame info. #outsz=0; #framesz=16; lcl=0
@@ -43,23 +41,22 @@ G_M8352_IG04: ; bbWeight=3.96, gcrefRegs=0C00 {a0 a1}, byrefRegs=0000 {},
sext.w a5, a4
sext.w a6, a2
bge a6, a5, G_M8352_IG05
- slli.uw a5, a2, 1
- add a6, a0, a5
- ; byrRegs +[a6]
- lhu a6, 0xD1FFAB1E(a6)
- ; byrRegs -[a6]
- sext.w a6, a6
- add a5, a1, a5
+ sh1add.uw a5, a2, a0
; byrRegs +[a5]
lhu a5, 0xD1FFAB1E(a5)
; byrRegs -[a5]
sext.w a5, a5
- bne a6, a5, G_M8352_IG05
+ sh1add.uw a6, a2, a1
+ ; byrRegs +[a6]
+ lhu a6, 0xD1FFAB1E(a6)
+ ; byrRegs -[a6]
+ sext.w a6, a6
+ bne a5, a6, G_M8352_IG05
addiw a2, a2, 0xD1FFAB1E
sext.w a5, a3
sext.w a6, a2
blt a6, a5, G_M8352_IG04
- ;; size=60 bbWeight=3.96 PerfScore 85.14
+ ;; size=56 bbWeight=3.96 PerfScore 83.16
G_M8352_IG05: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
; gcrRegs -[a0-a1]
sext.w a0, a2
@@ -75,26 +72,25 @@ G_M8352_IG07: ; bbWeight=0.04, gcVars=0000000000000000 {}, gcrefRegs=0C00
sext.w a4, a4
sext.w a5, a2
bge a5, a4, G_M8352_IG05
- slli.uw a4, a2, 1
- add a5, a0, a4
- ; byrRegs +[a5]
- lhu a5, 0xD1FFAB1E(a5)
- ; byrRegs -[a5]
- sext.w a5, a5
- add a4, a1, a4
+ sh1add.uw a4, a2, a0
; byrRegs +[a4]
lhu a4, 0xD1FFAB1E(a4)
; byrRegs -[a4]
sext.w a4, a4
- bne a5, a4, G_M8352_IG05
+ sh1add.uw a5, a2, a1
+ ; byrRegs +[a5]
+ lhu a5, 0xD1FFAB1E(a5)
+ ; byrRegs -[a5]
+ sext.w a5, a5
+ bne a4, a5, G_M8352_IG05
addiw a2, a2, 0xD1FFAB1E
sext.w a4, a3
sext.w a5, a2
bge a5, a4, G_M8352_IG05
j G_M8352_IG07
- ;; size=68 bbWeight=0.04 PerfScore 1.00
+ ;; size=64 bbWeight=0.04 PerfScore 0.98
-; Total bytes of code 200, prolog size 16, PerfScore 114.64, instruction count 50, allocated bytes for code 200 (MethodHash=aa3edf5f) for method System.CommandLine.Invocation.ParseErrorAction:<WriteTypoCorrectionSuggestions>g__GetStartsWithDistance|11_1(System.String,System.String):int (FullOpts)
+; Total bytes of code 192, prolog size 16, PerfScore 112.64, instruction count 48, allocated bytes for code 192 (MethodHash=aa3edf5f) for method System.CommandLine.Invocation.ParseErrorAction:<WriteTypoCorrectionSuggestions>g__GetStartsWithDistance|11_1(System.String,System.String):int (FullOpts)
; ============================================================
Unwind Info:
@@ -105,7 +101,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 100 (0x00064) Actual length = 200 (0x0000c8)
+ Function Length : 96 (0x00060) Actual length = 192 (0x0000c0)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)-12 (-3.57%) : 2960.dasm - System.Reflection.Metadata.MetadataReader:CombineRowCounts(int[],int[],byte):int[] (FullOpts)@@ -7,22 +7,19 @@
; No matching PGO data
; Final local variable assignments
;
-; V00 arg0 [V00,T08] ( 7, 7.54) ref -> s1 class-hnd single-def <int[]>
-; V01 arg1 [V01,T09] ( 4, 6.50) ref -> s2 class-hnd single-def <int[]>
-; V02 arg2 [V02,T11] ( 3, 3 ) ubyte -> s3 single-def
+; V00 arg0 [V00,T06] ( 7, 7.54) ref -> s1 class-hnd single-def <int[]>
+; V01 arg1 [V01,T07] ( 4, 6.50) ref -> s2 class-hnd single-def <int[]>
+; V02 arg2 [V02,T09] ( 3, 3 ) ubyte -> s3 single-def
; V03 loc0 [V03,T04] ( 7, 15 ) ref -> a0 class-hnd exact single-def <int[]>
-; V04 loc1 [V04,T00] ( 7, 25 ) int -> a1
-; V05 loc2 [V05,T01] ( 12, 18.08) int -> a2
+; V04 loc1 [V04,T00] ( 8, 29 ) int -> a1
+; V05 loc2 [V05,T01] ( 14, 22.08) int -> a2
;# V06 OutArgs [V06 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
;* V07 tmp1 [V07 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewArr temp" <int[]>
-; V08 tmp2 [V08,T03] ( 2, 16 ) int -> a5 "Strict ordering of exceptions for Array store"
-; V09 tmp3 [V09,T02] ( 4, 16 ) int -> a3 "Strict ordering of exceptions for Array store"
-; V10 cse0 [V10,T06] ( 3, 12 ) long -> a4 "CSE #04: aggressive"
-; V11 cse1 [V11,T07] ( 3, 11.88) long -> a1 "CSE #08: aggressive"
-; V12 cse2 [V12,T13] ( 3, 0.12) long -> a1 "CSE #10: conservative"
-; V13 cse3 [V13,T10] ( 4, 7 ) int -> a2 "CSE #01: aggressive"
-; V14 cse4 [V14,T05] ( 8, 14.54) int -> a6 multi-def "CSE #05: aggressive"
-; V15 cse5 [V15,T12] ( 2, 4.50) int -> a3 hoist "CSE #02: aggressive"
+; V08 tmp2 [V08,T03] ( 2, 16 ) int -> a4 "Strict ordering of exceptions for Array store"
+; V09 tmp3 [V09,T02] ( 4, 16 ) int -> a1 "Strict ordering of exceptions for Array store"
+; V10 cse0 [V10,T08] ( 4, 7 ) int -> a2 "CSE #01: aggressive"
+; V11 cse1 [V11,T05] ( 8, 14.54) int -> a5 multi-def "CSE #03: aggressive"
+; V12 cse2 [V12,T10] ( 2, 4.50) int -> a3 hoist "CSE #02: aggressive"
;
; Lcl frame size = 8
Frame info. #outsz=0; #framesz=48; lcl=8
@@ -65,52 +62,50 @@ G_M36214_IG04: ; bbWeight=4, gcrefRegs=40600 {s1 a0 s2}, byrefRegs=0000 {
sext.w a4, a3
sext.w a5, a1
bgeu a5, a4, G_M36214_IG10
- slli.uw a4, a1, 2
- add a5, s2, a4
- ; byrRegs +[a5]
- lw a5, 0xD1FFAB1E(a5)
- ; byrRegs -[a5]
- lw a6, 0xD1FFAB1E(a0)
- sext.w t0, a6
+ sh2add.uw a4, a1, s2
+ ; byrRegs +[a4]
+ lw a4, 0xD1FFAB1E(a4)
+ ; byrRegs -[a4]
+ lw a5, 0xD1FFAB1E(a0)
+ sext.w a6, a5
sext.w a7, a1
- bgeu a7, t0, G_M36214_IG10
- add a6, a0, a4
- ; byrRegs +[a6]
- sw a5, 0xD1FFAB1E(a6)
+ bgeu a7, a6, G_M36214_IG10
+ sh2add.uw a5, a1, a0
+ ; byrRegs +[a5]
+ sw a4, 0xD1FFAB1E(a5)
addiw a1, a1, 0xD1FFAB1E
sext.w a4, a1
sext.w a5, a2
+ ; byrRegs -[a5]
blt a4, a5, G_M36214_IG04
- ;; size=64 bbWeight=4 PerfScore 94.00
+ ;; size=60 bbWeight=4 PerfScore 92.00
G_M36214_IG05: ; bbWeight=1, gcrefRegs=0600 {s1 a0}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[s2]
- ; byrRegs -[a6]
- lw a6, 0xD1FFAB1E(a0)
- sext.w a1, a6
+ lw a5, 0xD1FFAB1E(a0)
+ sext.w a1, a5
sext.w a3, a2
bge a3, a1, G_M36214_IG08
;; size=16 bbWeight=1 PerfScore 6.50
G_M36214_IG06: ; bbWeight=0.50, gcrefRegs=0600 {s1 a0}, byrefRegs=0000 {}, byref, isz
lw a1, 0xD1FFAB1E(s1)
sext.w a1, a1
- sext.w a3, a6
+ sext.w a3, a5
blt a1, a3, G_M36214_IG09
;; size=16 bbWeight=0.50 PerfScore 3.25
G_M36214_IG07: ; bbWeight=3.96, gcrefRegs=0600 {s1 a0}, byrefRegs=0000 {}, byref, isz
- slli.uw a1, a2, 2
- add a3, s1, a1
- ; byrRegs +[a3]
- lw a3, 0xD1FFAB1E(a3)
- ; byrRegs -[a3]
- add a1, a0, a1
+ sh2add.uw a1, a2, s1
; byrRegs +[a1]
- sw a3, 0xD1FFAB1E(a1)
- addiw a2, a2, 0xD1FFAB1E
- sext.w a3, a6
- sext.w a1, a2
+ lw a1, 0xD1FFAB1E(a1)
; byrRegs -[a1]
- blt a1, a3, G_M36214_IG07
- ;; size=36 bbWeight=3.96 PerfScore 49.50
+ sh2add.uw a3, a2, a0
+ ; byrRegs +[a3]
+ sw a1, 0xD1FFAB1E(a3)
+ addiw a2, a2, 0xD1FFAB1E
+ sext.w a1, a5
+ sext.w a3, a2
+ ; byrRegs -[a3]
+ blt a3, a1, G_M36214_IG07
+ ;; size=32 bbWeight=3.96 PerfScore 47.52
G_M36214_IG08: ; bbWeight=1, gcrefRegs=0400 {a0}, byrefRegs=0000 {}, byref, epilog, nogc
; gcrRegs -[s1]
ld s3, 40(sp)
@@ -126,24 +121,23 @@ G_M36214_IG09: ; bbWeight=0.04, gcVars=0000000000000000 {}, gcrefRegs=060
sext.w a3, a1
sext.w a4, a2
bgeu a4, a3, G_M36214_IG10
- slli.uw a1, a2, 2
- add a3, s1, a1
- ; byrRegs +[a3]
- lw a3, 0xD1FFAB1E(a3)
- ; byrRegs -[a3]
- sext.w a4, a6
- sext.w a5, a2
- bgeu a5, a4, G_M36214_IG10
- add a1, a0, a1
+ sh2add.uw a1, a2, s1
; byrRegs +[a1]
- sw a3, 0xD1FFAB1E(a1)
- addiw a2, a2, 0xD1FFAB1E
- sext.w a1, a6
+ lw a1, 0xD1FFAB1E(a1)
; byrRegs -[a1]
+ sext.w a3, a5
+ sext.w a4, a2
+ bgeu a4, a3, G_M36214_IG10
+ sh2add.uw a3, a2, a0
+ ; byrRegs +[a3]
+ sw a1, 0xD1FFAB1E(a3)
+ addiw a2, a2, 0xD1FFAB1E
+ sext.w a1, a5
sext.w a3, a2
+ ; byrRegs -[a3]
blt a3, a1, G_M36214_IG09
j G_M36214_IG08
- ;; size=68 bbWeight=0.04 PerfScore 1.00
+ ;; size=64 bbWeight=0.04 PerfScore 0.98
G_M36214_IG10: ; bbWeight=0, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
; gcrRegs -[s1-a0]
auipc ra, 0xD1FFAB1E
@@ -152,7 +146,7 @@ G_M36214_IG10: ; bbWeight=0, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
ebreak
;; size=12 bbWeight=0 PerfScore 0.00
-; Total bytes of code 336, prolog size 40, PerfScore 207.75, instruction count 78, allocated bytes for code 336 (MethodHash=0ae17289) for method System.Reflection.Metadata.MetadataReader:CombineRowCounts(int[],int[],byte):int[] (FullOpts)
+; Total bytes of code 324, prolog size 40, PerfScore 203.75, instruction count 75, allocated bytes for code 324 (MethodHash=0ae17289) for method System.Reflection.Metadata.MetadataReader:CombineRowCounts(int[],int[],byte):int[] (FullOpts)
; ============================================================
Unwind Info:
@@ -163,7 +157,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 168 (0x000a8) Actual length = 336 (0x000150)
+ Function Length : 162 (0x000a2) Actual length = 324 (0x000144)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)+8 (+0.54%) : 81.dasm - System.RuntimeType:MakeGenericType(System.Type[]):System.Type:this (FullOpts)@@ -10,49 +10,47 @@
;
; V00 this [V00,T05] ( 11, 6 ) ref -> [fp-0x10] this class-hnd EH-live single-def <System.RuntimeType>
; V01 arg1 [V01,T03] ( 9, 9.50) ref -> s1 class-hnd single-def <System.Type[]>
-; V02 loc0 [V02,T14] ( 3, 2.50) ref -> s2 class-hnd exact single-def <System.RuntimeType[]>
-; V03 loc1 [V03,T16] ( 4, 1.50) ref -> [fp-0x18] do-not-enreg[M] class-hnd exact EH-live <System.RuntimeType>
+; V02 loc0 [V02,T13] ( 3, 2.50) ref -> s2 class-hnd exact single-def <System.RuntimeType[]>
+; V03 loc1 [V03,T15] ( 4, 1.50) ref -> [fp-0x18] do-not-enreg[M] class-hnd exact EH-live <System.RuntimeType>
; V04 loc2 [V04,T07] ( 8, 5.54) ref -> [fp-0x20] class-hnd exact EH-live single-def <System.RuntimeType[]>
-; V05 loc3 [V05,T11] ( 4, 3 ) ubyte -> s4
-; V06 loc4 [V06,T12] ( 4, 3 ) ubyte -> s5
-; V07 loc5 [V07,T17] ( 2, 1 ) ref -> a0 class-hnd exact single-def <System.RuntimeType>
+; V05 loc3 [V05,T10] ( 4, 3 ) ubyte -> s4
+; V06 loc4 [V06,T11] ( 4, 3 ) ubyte -> s5
+; V07 loc5 [V07,T16] ( 2, 1 ) ref -> a0 class-hnd exact single-def <System.RuntimeType>
; V08 loc6 [V08 ] ( 4, 2 ) struct ( 8) [fp-0x08] do-not-enreg[XS] must-init addr-exposed ld-addr-op <System.RuntimeTypeHandle>
-; V09 loc7 [V09,T18] ( 2, 1 ) ref -> a0 class-hnd exact single-def <System.RuntimeType>
+; V09 loc7 [V09,T17] ( 2, 1 ) ref -> a0 class-hnd exact single-def <System.RuntimeType>
;* V10 loc8 [V10 ] ( 0, 0 ) ref -> zero-ref class-hnd single-def <<unknown class>>
-; V11 loc9 [V11,T19] ( 6, 0.70) int -> s6
+; V11 loc9 [V11,T18] ( 7, 0.74) int -> s6
;* V12 loc10 [V12 ] ( 0, 0 ) ref -> zero-ref class-hnd <System.Type>
; V13 loc11 [V13,T06] ( 6, 8 ) ref -> registers class-hnd exact <System.RuntimeType>
;* V14 loc12 [V14 ] ( 0, 0 ) ref -> zero-ref class-hnd exact <System.RuntimeType[]>
;* V15 loc13 [V15 ] ( 0, 0 ) ref -> zero-ref class-hnd <<unknown class>>
;# V16 OutArgs [V16 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
;* V17 tmp1 [V17 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "NewArr temp" <System.RuntimeType[]>
-; V18 tmp2 [V18,T00] ( 11, 32.04) ref -> registers class-hnd "dup spill" <System.Type>
+; V18 tmp2 [V18,T00] ( 11, 32.04) ref -> s7 class-hnd "dup spill" <System.Type>
;* V19 tmp3 [V19 ] ( 0, 0 ) ref -> zero-ref
;* V20 tmp4 [V20 ] ( 0, 0 ) ref -> zero-ref class-hnd "spilling qmarkNull" <System.RuntimeType>
-; V21 tmp5 [V21,T21] ( 3, 0 ) ref -> s1 class-hnd exact "NewObj constructor temp" <System.ArgumentNullException>
+; V21 tmp5 [V21,T19] ( 3, 0 ) ref -> s1 class-hnd exact "NewObj constructor temp" <System.ArgumentNullException>
;* V22 tmp6 [V22 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op "NewObj constructor temp" <System.RuntimeTypeHandle>
-; V23 tmp7 [V23,T25] ( 2, 0 ) ref -> a2 class-hnd single-def "impSpillSpecialSideEff" <<unknown class>>
-; V24 tmp8 [V24,T13] ( 3, 3 ) ref -> s2 class-hnd exact single-def "NewObj constructor temp" <System.Reflection.SignatureConstructedGenericType>
-; V25 tmp9 [V25,T10] ( 4, 3.50) ref -> a0 single-def "ISINST eval op1"
+; V23 tmp7 [V23,T23] ( 2, 0 ) ref -> a2 class-hnd single-def "impSpillSpecialSideEff" <<unknown class>>
+; V24 tmp8 [V24,T12] ( 3, 3 ) ref -> s2 class-hnd exact single-def "NewObj constructor temp" <System.Reflection.SignatureConstructedGenericType>
+; V25 tmp9 [V25,T09] ( 4, 3.50) ref -> a0 single-def "ISINST eval op1"
;* V26 tmp10 [V26 ] ( 0, 0 ) ref -> zero-ref class-hnd "spilling qmarkNull" <System.RuntimeType>
;* V27 tmp11 [V27 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op "NewObj constructor temp" <System.RuntimeTypeHandle>
-; V28 tmp12 [V28,T26] ( 2, 0 ) ref -> s3 class-hnd single-def "impSpillSpecialSideEff" <<unknown class>>
-; V29 tmp13 [V29,T22] ( 3, 0 ) ref -> a1 class-hnd exact single-def "NewArr temp" <System.RuntimeType[]>
-; V30 tmp14 [V30,T23] ( 3, 0 ) ref -> s1 class-hnd exact single-def "NewObj constructor temp" <<unknown class>>
-; V31 tmp15 [V31,T24] ( 3, 0 ) ref -> s1 class-hnd exact single-def "NewObj constructor temp" <<unknown class>>
+; V28 tmp12 [V28,T24] ( 2, 0 ) ref -> s3 class-hnd single-def "impSpillSpecialSideEff" <<unknown class>>
+; V29 tmp13 [V29,T20] ( 3, 0 ) ref -> a1 class-hnd exact single-def "NewArr temp" <System.RuntimeType[]>
+; V30 tmp14 [V30,T21] ( 3, 0 ) ref -> s1 class-hnd exact single-def "NewObj constructor temp" <<unknown class>>
+; V31 tmp15 [V31,T22] ( 3, 0 ) ref -> s1 class-hnd exact single-def "NewObj constructor temp" <<unknown class>>
; V32 tmp16 [V32 ] ( 4, 2 ) ref -> [fp-0x08] do-not-enreg[X] addr-exposed "field V08.m_type (fldOffset=0x0)" P-DEP
;* V33 tmp17 [V33 ] ( 0, 0 ) ref -> zero-ref single-def "field V22.m_type (fldOffset=0x0)" P-INDEP
;* V34 tmp18 [V34 ] ( 0, 0 ) ref -> zero-ref single-def "field V27.m_type (fldOffset=0x0)" P-INDEP
-; V35 tmp19 [V35,T15] ( 2, 2 ) ref -> a1 single-def "argument with side effect"
-; V36 tmp20 [V36,T27] ( 2, 0 ) ref -> a1 single-def "argument with side effect"
-; V37 tmp21 [V37,T28] ( 2, 0 ) ref -> a0 single-def "argument with side effect"
-; V38 tmp22 [V38,T29] ( 2, 0 ) ref -> a1 single-def "argument with side effect"
-;* V39 cse0 [V39,T09] ( 0, 0 ) long -> zero-ref "CSE #04: aggressive"
-; V40 cse1 [V40,T20] ( 3, 0.12) long -> s7 "CSE #08: conservative"
-; V41 cse2 [V41,T08] ( 8, 5.04) int -> s3 "CSE #01: aggressive"
-; V42 cse3 [V42,T04] ( 3, 9.90) long -> a2 "CSE #02: aggressive"
-; V43 rat0 [V43,T01] ( 5, 16.34) long -> s6 "Strength reduced derived IV"
-; V44 rat1 [V44,T02] ( 4, 12.38) int -> s3 "Trip count IV"
+; V35 tmp19 [V35,T14] ( 2, 2 ) ref -> a1 single-def "argument with side effect"
+; V36 tmp20 [V36,T25] ( 2, 0 ) ref -> a1 single-def "argument with side effect"
+; V37 tmp21 [V37,T26] ( 2, 0 ) ref -> a0 single-def "argument with side effect"
+; V38 tmp22 [V38,T27] ( 2, 0 ) ref -> a1 single-def "argument with side effect"
+; V39 cse0 [V39,T08] ( 8, 5.04) int -> s3 "CSE #01: aggressive"
+; V40 cse1 [V40,T04] ( 3, 9.90) long -> a2 "CSE #02: aggressive"
+; V41 rat0 [V41,T01] ( 5, 16.34) long -> s6 "Strength reduced derived IV"
+; V42 rat1 [V42,T02] ( 4, 12.38) int -> s3 "Trip count IV"
;
; Lcl frame size = 32
Frame info. #outsz=0; #framesz=112; lcl=32
@@ -79,7 +77,7 @@ G_M40101_IG01: ; bbWeight=1, gcVars=0000000000000000 {}, gcrefRegs=0000 {
; gcrRegs +[a1]
;; size=64 bbWeight=1 PerfScore 50.00
G_M40101_IG02: ; bbWeight=1, gcVars=0000000000000020 {V00}, gcrefRegs=0A00 {s1 a1}, byrefRegs=0000 {}, gcvars, byref, isz
- beqz s1, G_M40101_IG24
+ beqz s1, G_M40101_IG26
mv a0, a1
; gcrRegs +[a0]
auipc a2, 0xD1FFAB1E
@@ -89,7 +87,7 @@ G_M40101_IG02: ; bbWeight=1, gcVars=0000000000000020 {V00}, gcrefRegs=0A0
; gcrRegs -[a0-a1]
; gcr arg pop 0
sext.w a0, a0
- beqz a0, G_M40101_IG25
+ beqz a0, G_M40101_IG27
ld a0, -16(fp)
; gcrRegs +[a0]
auipc a1, 0xD1FFAB1E
@@ -103,7 +101,7 @@ G_M40101_IG02: ; bbWeight=1, gcVars=0000000000000020 {V00}, gcrefRegs=0A0
sext.w a0, a0
lw s3, 0xD1FFAB1E(s1)
sext.w a1, s3
- bne a0, a1, G_M40101_IG26
+ bne a0, a1, G_M40101_IG28
sext.w a0, s3
addi a1, zero, 0xD1FFAB1E
bne a0, a1, G_M40101_IG08
@@ -188,7 +186,7 @@ G_M40101_IG08: ; bbWeight=0.50, gcVars=0000000000000020 {V00}, gcrefRegs=
lw a0, 0xD1FFAB1E(a1)
sext.w a0, a0
sext.w a2, s3
- blt a0, a2, G_M40101_IG17
+ blt a0, a2, G_M40101_IG19
mv s6, zero
;; size=80 bbWeight=0.50 PerfScore 14.00
G_M40101_IG09: ; bbWeight=3.96, gcVars=00000000000000A0 {V00 V04}, gcrefRegs=40200 {s1 s2}, byrefRegs=0000 {}, gcvars, byref, isz
@@ -201,7 +199,7 @@ G_M40101_IG09: ; bbWeight=3.96, gcVars=00000000000000A0 {V00 V04}, gcrefR
; byrRegs -[a0]
mv s7, a0
; gcrRegs +[s7]
- beqz s7, G_M40101_IG27
+ beqz s7, G_M40101_IG29
ld a2, 0xD1FFAB1E(s7)
lui a0, 0xD1FFAB1E
addiw a0, a0, 0xD1FFAB1E
@@ -253,9 +251,9 @@ G_M40101_IG13: ; bbWeight=0.50, gcrefRegs=40200 {s1 s2}, byrefRegs=0000 {
ld a1, -32(fp)
; gcrRegs +[a1]
sext.w a0, s5
- beqz a0, G_M40101_IG19
+ beqz a0, G_M40101_IG21
sext.w a0, s4
- beqz a0, G_M40101_IG22
+ beqz a0, G_M40101_IG24
lui a0, 0xD1FFAB1E
addiw a0, a0, 0xD1FFAB1E
slli a0, a0, 12
@@ -295,67 +293,77 @@ G_M40101_IG14: ; bbWeight=0.50, epilog, nogc, extend
ld fp, 32(sp)
addi sp, sp, 112
ret ;; size=48 bbWeight=0.50 PerfScore 11.75
-G_M40101_IG15: ; bbWeight=0.02, gcVars=00000000000000A0 {V00 V04}, gcrefRegs=40600 {s1 a0 s2}, byrefRegs=0000 {}, gcvars, byref, isz
- ; gcrRegs +[s1]
+G_M40101_IG15: ; bbWeight=0.02, gcVars=00000000000000A0 {V00 V04}, gcrefRegs=840200 {s1 s2 s7}, byrefRegs=0000 {}, gcvars, byref, isz
+ ; gcrRegs -[a0] +[s1 s7]
; GC ptr vars +{V00 V04 V05 V07}
mv s8, zero
; gcrRegs +[s8]
addi s5, zero, 0xD1FFAB1E
- ld a2, 0xD1FFAB1E(a0)
+ mv a0, s7
+ ; gcrRegs +[a0]
+ ld a2, 0xD1FFAB1E(s7)
ld a2, 0xD1FFAB1E(a2)
ld a2, 0xD1FFAB1E(a2)
jalr a2 // <unknown method>
- ; gcrRegs -[a0]
+ ; gcrRegs -[a0 s7]
; gcr arg pop 0
sext.w t3, a0
- beqz t3, G_M40101_IG16
- addi s4, zero, 0xD1FFAB1E
+ bnez t3, G_M40101_IG17
;; size=36 bbWeight=0.02 PerfScore 0.29
-G_M40101_IG16: ; bbWeight=0.04, gcrefRegs=1040200 {s1 s2 s8}, byrefRegs=0000 {}, byref, isz
+G_M40101_IG16: ; bbWeight=0.01, gcrefRegs=1040200 {s1 s2 s8}, byrefRegs=0000 {}, byref, isz
+ mv s7, s8
+ ; gcrRegs +[s7]
+ j G_M40101_IG18
+ ;; size=8 bbWeight=0.01 PerfScore 0.02
+G_M40101_IG17: ; bbWeight=0.02, gcrefRegs=1040200 {s1 s2 s8}, byrefRegs=0000 {}, byref
+ ; gcrRegs -[s7]
+ addi s4, zero, 0xD1FFAB1E
+ mv s7, s8
+ ; gcrRegs +[s7]
+ ;; size=8 bbWeight=0.02 PerfScore 0.02
+G_M40101_IG18: ; bbWeight=0.04, gcrefRegs=840200 {s1 s2 s7}, byrefRegs=0000 {}, byref, isz
+ ; gcrRegs -[s8]
ld a1, -32(fp)
; gcrRegs +[a1]
lw t3, 0xD1FFAB1E(a1)
sext.w t0, t3
sext.w t4, s6
- bgeu t4, t0, G_M40101_IG28
- add t3, a1, s7
+ bgeu t4, t0, G_M40101_IG30
+ sh3add.uw t3, s6, a1
; byrRegs +[t3]
addi t3, t3, 0xD1FFAB1E
- mv t4, s8
+ mv t4, s7
; gcrRegs +[t4]
auipc ra, 0xD1FFAB1E
jalr ra // CORINFO_HELP_ASSIGN_REF
- ; gcrRegs -[s8 t4]
+ ; gcrRegs -[s7 t4]
; byrRegs -[t3]
addiw s6, s6, 0xD1FFAB1E
sext.w a0, s3
sext.w a2, s6
bge a2, a0, G_M40101_IG13
;; size=56 bbWeight=0.04 PerfScore 0.76
-G_M40101_IG17: ; bbWeight=0.04, gcrefRegs=40200 {s1 s2}, byrefRegs=0000 {}, byref, isz
+G_M40101_IG19: ; bbWeight=0.04, gcrefRegs=40200 {s1 s2}, byrefRegs=0000 {}, byref, isz
; gcrRegs -[a1]
- slli.uw s7, s6, 3
- add a0, s1, s7
+ sh3add.uw a0, s6, s1
; byrRegs +[a0]
- ld a0, 0xD1FFAB1E(a0)
- ; gcrRegs +[a0]
+ ld s7, 0xD1FFAB1E(a0)
+ ; gcrRegs +[s7]
+ beqz s7, G_M40101_IG29
+ ld a0, 0xD1FFAB1E(s7)
; byrRegs -[a0]
- beqz a0, G_M40101_IG27
- ld a2, 0xD1FFAB1E(a0)
- lui a3, 0xD1FFAB1E
- addiw a3, a3, 0xD1FFAB1E
- slli a3, a3, 14
- addi a3, a3, 0xD1FFAB1E
- slli a3, a3, 1
- bne a2, a3, G_M40101_IG15
- ;; size=44 bbWeight=0.04 PerfScore 0.68
-G_M40101_IG18: ; bbWeight=0.02, gcrefRegs=40600 {s1 a0 s2}, byrefRegs=0000 {}, byref, isz
- mv s8, a0
- ; gcrRegs +[s8]
- j G_M40101_IG16
- ;; size=8 bbWeight=0.02 PerfScore 0.04
-G_M40101_IG19: ; bbWeight=0.50, gcrefRegs=40800 {a1 s2}, byrefRegs=0000 {}, byref
- ; gcrRegs -[s1-a0 s8] +[a1]
+ lui a2, 0xD1FFAB1E
+ addiw a2, a2, 0xD1FFAB1E
+ slli a2, a2, 14
+ addi a2, a2, 0xD1FFAB1E
+ slli a2, a2, 1
+ bne a0, a2, G_M40101_IG15
+ ;; size=40 bbWeight=0.04 PerfScore 0.66
+G_M40101_IG20: ; bbWeight=0.02, gcrefRegs=840200 {s1 s2 s7}, byrefRegs=0000 {}, byref, isz
+ j G_M40101_IG18
+ ;; size=4 bbWeight=0.02 PerfScore 0.03
+G_M40101_IG21: ; bbWeight=0.50, gcrefRegs=40800 {a1 s2}, byrefRegs=0000 {}, byref
+ ; gcrRegs -[s1 s7] +[a1]
mv a0, a1
; gcrRegs +[a0]
mv a1, s2
@@ -365,7 +373,7 @@ G_M40101_IG19: ; bbWeight=0.50, gcrefRegs=40800 {a1 s2}, byrefRegs=0000 {
; gcrRegs -[a0-a1 s2]
; gcr arg pop 0
;; size=20 bbWeight=0.50 PerfScore 3.00
-G_M40101_IG20: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
+G_M40101_IG22: ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
ld a0, -16(fp)
; gcrRegs +[a0]
sd a0, -8(fp)
...+2 (+0.05%) : 9393.dasm - System.Diagnostics.StackTrace:ToString(int,System.Text.StringBuilder):this (FullOpts)@@ -8,183 +8,182 @@
; 0 inlinees with PGO data; 46 single block inlinees; 42 inlinees without PGO data
; Final local variable assignments
;
-; V00 this [V00,T37] ( 6, 30 ) ref -> [fp-0x78] this class-hnd EH-live single-def <System.Diagnostics.StackTrace>
-; V01 arg1 [V01,T114] ( 3, 3 ) int -> [fp-0x04] EH-live single-def
+; V00 this [V00,T36] ( 6, 30 ) ref -> [fp-0x78] this class-hnd EH-live single-def <System.Diagnostics.StackTrace>
+; V01 arg1 [V01,T113] ( 3, 3 ) int -> [fp-0x04] EH-live single-def
; V02 arg2 [V02,T00] ( 89,610 ) ref -> [fp-0x80] class-hnd EH-live single-def <System.Text.StringBuilder>
-; V03 loc0 [V03,T64] ( 4, 12 ) ref -> [fp-0x88] class-hnd EH-live spill-single-def <System.String>
-; V04 loc1 [V04,T116] ( 2, 4 ) ref -> [fp-0x90] class-hnd EH-live single-def <System.String>
-; V05 loc2 [V05,T117] ( 2, 4 ) ref -> [fp-0x98] class-hnd EH-live single-def <System.String>
-; V06 loc3 [V06,T109] ( 3, 9 ) ubyte -> [fp-0x08] do-not-enreg[Z] EH-live
-; V07 loc4 [V07,T36] ( 6, 37 ) int -> [fp-0x0C] do-not-enreg[Z] EH-live
-; V08 loc5 [V08,T24] ( 10, 48 ) ref -> [fp-0xA0] do-not-enreg[Z] class-hnd EH-live <System.Diagnostics.StackFrame>
+; V03 loc0 [V03,T63] ( 4, 12 ) ref -> [fp-0x88] class-hnd EH-live spill-single-def <System.String>
+; V04 loc1 [V04,T115] ( 2, 4 ) ref -> [fp-0x90] class-hnd EH-live single-def <System.String>
+; V05 loc2 [V05,T116] ( 2, 4 ) ref -> [fp-0x98] class-hnd EH-live single-def <System.String>
+; V06 loc3 [V06,T108] ( 3, 9 ) ubyte -> [fp-0x08] do-not-enreg[Z] EH-live
+; V07 loc4 [V07,T35] ( 6, 37 ) int -> [fp-0x0C] do-not-enreg[Z] EH-live
+; V08 loc5 [V08,T23] ( 10, 48 ) ref -> [fp-0xA0] do-not-enreg[Z] class-hnd EH-live <System.Diagnostics.StackFrame>
; V09 loc6 [V09 ] ( 19, 84 ) ref -> [fp-0x18] do-not-enreg[X] must-init addr-exposed ld-addr-op class-hnd <System.Reflection.MethodBase>
-; V10 loc7 [V10,T82] ( 3, 12 ) ubyte -> [fp-0x1C] do-not-enreg[Z] EH-live
+; V10 loc7 [V10,T81] ( 3, 12 ) ubyte -> [fp-0x1C] do-not-enreg[Z] EH-live
; V11 loc8 [V11 ] ( 9, 36 ) ref -> [fp-0x28] do-not-enreg[X] must-init addr-exposed ld-addr-op class-hnd <System.Type>
-; V12 loc9 [V12,T53] ( 4, 16 ) ref -> [fp-0xA8] do-not-enreg[Z] class-hnd exact EH-live <System.String>
-; V13 loc10 [V13,T83] ( 3, 12 ) ubyte -> [fp-0x2C] do-not-enreg[Z] EH-live
-; V14 loc11 [V14,T51] ( 5, 20 ) ref -> s2 class-hnd <<unknown class>>
+; V12 loc9 [V12,T52] ( 4, 16 ) ref -> [fp-0xA8] do-not-enreg[Z] class-hnd exact EH-live <System.String>
+; V13 loc10 [V13,T82] ( 3, 12 ) ubyte -> [fp-0x2C] do-not-enreg[Z] EH-live
+; V14 loc11 [V14,T50] ( 5, 20 ) ref -> s2 class-hnd <<unknown class>>
; V15 loc12 [V15 ] ( 9, 0 ) struct (16) [fp-0x40] do-not-enreg[SBRM] multireg-ret multireg-dest must-init ld-addr-op <System.ReadOnlySpan`1[System.Reflection.ParameterInfo]>
-; V16 loc13 [V16,T110] ( 3, 8 ) ubyte -> [fp-0x44] do-not-enreg[Z] EH-live
-; V17 loc14 [V17,T65] ( 3, 12 ) ref -> a0 class-hnd exact <System.String>
-;* V18 loc15 [V18,T121] ( 0, 0 ) int -> zero-ref
-; V19 loc16 [V19,T18] ( 3, 80 ) ushort -> a0
-; V20 loc17 [V20,T66] ( 3, 12 ) ref -> s2 class-hnd <<unknown class>>
-;* V21 loc18 [V21,T122] ( 0, 0 ) int -> zero-ref
-; V22 loc19 [V22,T22] ( 3, 52 ) ubyte -> s3
-; V23 loc20 [V23,T23] ( 3, 52 ) ubyte -> s2
-; V24 loc21 [V24,T05] ( 6,136 ) int -> s3
+; V16 loc13 [V16,T109] ( 3, 8 ) ubyte -> [fp-0x44] do-not-enreg[Z] EH-live
+; V17 loc14 [V17,T64] ( 3, 12 ) ref -> a0 class-hnd exact <System.String>
+;* V18 loc15 [V18,T120] ( 0, 0 ) int -> zero-ref
+; V19 loc16 [V19,T17] ( 3, 80 ) ushort -> a0
+; V20 loc17 [V20,T65] ( 3, 12 ) ref -> s2 class-hnd <<unknown class>>
+;* V21 loc18 [V21,T121] ( 0, 0 ) int -> zero-ref
+; V22 loc19 [V22,T21] ( 3, 52 ) ubyte -> s3
+; V23 loc20 [V23,T22] ( 3, 52 ) ubyte -> s2
+; V24 loc21 [V24,T05] ( 8,184 ) int -> s3
; V25 loc22 [V25,T07] ( 5,112 ) ref -> s4 class-hnd <System.String>
-; V26 loc23 [V26,T13] ( 4, 96 ) ref -> s4 class-hnd exact <System.String>
-; V27 loc24 [V27,T67] ( 3, 12 ) ref -> s4 class-hnd exact <System.String>
-; V28 loc25 [V28,T111] ( 2, 8 ) ref -> s2 class-hnd exact <System.String>
-; V29 loc26 [V29,T112] ( 2, 8 ) int -> s4
+; V26 loc23 [V26,T12] ( 4, 96 ) ref -> s4 class-hnd exact <System.String>
+; V27 loc24 [V27,T66] ( 3, 12 ) ref -> s4 class-hnd exact <System.String>
+; V28 loc25 [V28,T110] ( 2, 8 ) ref -> s2 class-hnd exact <System.String>
+; V29 loc26 [V29,T111] ( 2, 8 ) int -> s4
;# V30 OutArgs [V30 ] ( 1, 1 ) struct ( 0) [sp+0x00] do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
;* V31 tmp1 [V31 ] ( 0, 0 ) ref -> zero-ref
;* V32 tmp2 [V32 ] ( 0, 0 ) ref -> zero-ref
;* V33 tmp3 [V33 ] ( 0, 0 ) ref -> zero-ref
-; V34 tmp4 [V34,T58] ( 3, 16 ) ref -> a0
+; V34 tmp4 [V34,T57] ( 3, 16 ) ref -> a0
;* V35 tmp5 [V35 ] ( 0, 0 ) struct (16) zero-ref do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return" <System.ReadOnlySpan`1[System.Reflection.ParameterInfo]>
;* V36 tmp6 [V36 ] ( 0, 0 ) ref -> zero-ref
;* V37 tmp7 [V37 ] ( 0, 0 ) ref -> zero-ref
-; V38 tmp8 [V38,T54] ( 4, 16 ) ref -> a0
-; V39 tmp9 [V39,T43] ( 3, 24 ) ref -> s5 class-hnd exact "Single-def Box Helper" <<unknown class>>
-; V40 tmp10 [V40,T59] ( 2, 16 ) ref -> s6 class-hnd "impImportAndPushBox" <System.Globalization.CultureInfo>
-; V41 tmp11 [V41,T44] ( 3, 24 ) ref -> s4 class-hnd exact "Single-def Box Helper" <<unknown class>>
+; V38 tmp8 [V38,T53] ( 4, 16 ) ref -> a0
+; V39 tmp9 [V39,T42] ( 3, 24 ) ref -> s5 class-hnd exact "Single-def Box Helper" <<unknown class>>
+; V40 tmp10 [V40,T58] ( 2, 16 ) ref -> s6 class-hnd "impImportAndPushBox" <System.Globalization.CultureInfo>
+; V41 tmp11 [V41,T43] ( 3, 24 ) ref -> s4 class-hnd exact "Single-def Box Helper" <<unknown class>>
;* V42 tmp12 [V42 ] ( 0, 0 ) ref -> zero-ref class-hnd "impSpillSpecialSideEff" <<unknown class>>
-; V43 tmp13 [V43,T60] ( 2, 16 ) ref -> s3 class-hnd "non-inline candidate call" <System.Globalization.CultureInfo>
-; V44 tmp14 [V44,T45] ( 3, 24 ) ref -> s5 class-hnd exact "Single-def Box Helper" <<unknown class>>
+; V43 tmp13 [V43,T59] ( 2, 16 ) ref -> s3 class-hnd "non-inline candidate call" <System.Globalization.CultureInfo>
+; V44 tmp14 [V44,T44] ( 3, 24 ) ref -> s5 class-hnd exact "Single-def Box Helper" <<unknown class>>
;* V45 tmp15 [V45 ] ( 0, 0 ) ref -> zero-ref class-hnd "impSpillSpecialSideEff" <System.Object>
;* V46 tmp16 [V46 ] ( 0, 0 ) ref -> zero-ref
;* V47 tmp17 [V47 ] ( 0, 0 ) ref -> zero-ref
-; V48 tmp18 [V48,T20] ( 3, 64 ) int -> a1
-; V49 tmp19 [V49,T39] ( 2, 32 ) ref -> a0 class-hnd "Inlining Arg" <System.Reflection.MethodBase>
+; V48 tmp18 [V48,T19] ( 3, 64 ) int -> a1
+; V49 tmp19 [V49,T38] ( 2, 32 ) ref -> a0 class-hnd "Inlining Arg" <System.Reflection.MethodBase>
;* V50 tmp20 [V50 ] ( 0, 0 ) ubyte -> zero-ref "Inline return value spill temp"
-; V51 tmp21 [V51,T68] ( 3, 12 ) ref -> s2 class-hnd "Inline stloc first use temp" <char[]>
-; V52 tmp22 [V52,T55] ( 4, 16 ) int -> s3 "Inline stloc first use temp"
-; V53 tmp23 [V53,T61] ( 2, 16 ) byref -> a1 "Inlining Arg"
+; V51 tmp21 [V51,T67] ( 3, 12 ) ref -> s2 class-hnd "Inline stloc first use temp" <char[]>
+; V52 tmp22 [V52,T54] ( 4, 16 ) int -> s3 "Inline stloc first use temp"
+; V53 tmp23 [V53,T60] ( 2, 16 ) byref -> a1 "Inlining Arg"
;* V54 tmp24 [V54 ] ( 0, 0 ) byref -> zero-ref "Inline stloc first use temp"
-; V55 tmp25 [V55,T69] ( 3, 12 ) ref -> s2 class-hnd "Inline stloc first use temp" <char[]>
-; V56 tmp26 [V56,T56] ( 4, 16 ) int -> s3 "Inline stloc first use temp"
-; V57 tmp27 [V57,T62] ( 2, 16 ) byref -> a1 "Inlining Arg"
+; V55 tmp25 [V55,T68] ( 3, 12 ) ref -> s2 class-hnd "Inline stloc first use temp" <char[]>
+; V56 tmp26 [V56,T55] ( 4, 16 ) int -> s3 "Inline stloc first use temp"
+; V57 tmp27 [V57,T61] ( 2, 16 ) byref -> a1 "Inlining Arg"
;* V58 tmp28 [V58 ] ( 0, 0 ) byref -> zero-ref "Inline stloc first use temp"
;* V59 tmp29 [V59 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "Inline return value spill temp" <System.Text.StringBuilder>
-; V60 tmp30 [V60,T84] ( 3, 12 ) int -> a2 "Inline stloc first use temp"
-; V61 tmp31 [V61,T70] ( 3, 12 ) ref -> s3 class-hnd "Inline stloc first use temp" <char[]>
-; V62 tmp32 [V62,T85] ( 3, 12 ) ubyte -> a0 "Inline return value spill temp"
-; V63 tmp33 [V63,T46] ( 3, 24 ) ref -> a1 class-hnd "Inlining Arg" <System.Type>
-; V64 tmp34 [V64,T113] ( 2, 8 ) ubyte -> a0 "Inline return value spill temp"
-; V65 tmp35 [V65,T47] ( 3, 24 ) ref -> a1 class-hnd "Inlining Arg" <System.Type>
+; V60 tmp30 [V60,T83] ( 3, 12 ) int -> a2 "Inline stloc first use temp"
+; V61 tmp31 [V61,T69] ( 3, 12 ) ref -> s3 class-hnd "Inline stloc first use temp" <char[]>
+; V62 tmp32 [V62,T84] ( 3, 12 ) ubyte -> a0 "Inline return value spill temp"
+; V63 tmp33 [V63,T45] ( 3, 24 ) ref -> a1 class-hnd "Inlining Arg" <System.Type>
+; V64 tmp34 [V64,T112] ( 2, 8 ) ubyte -> a0 "Inline return value spill temp"
+; V65 tmp35 [V65,T46] ( 3, 24 ) ref -> a1 class-hnd "Inlining Arg" <System.Type>
;* V66 tmp36 [V66 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "Inline return value spill temp" <System.Text.StringBuilder>
;* V67 tmp37 [V67 ] ( 0, 0 ) ref -> zero-ref class-hnd "Inlining Arg" <System.Text.StringBuilder>
-; V68 tmp38 [V68,T19] ( 3, 80 ) int -> s4 "Inline stloc first use temp"
-; V69 tmp39 [V69,T17] ( 3, 80 ) ref -> s5 class-hnd "Inline stloc first use temp" <char[]>
+; V68 tmp38 [V68,T18] ( 3, 80 ) int -> s4 "Inline stloc first use temp"
+; V69 tmp39 [V69,T16] ( 3, 80 ) ref -> s5 class-hnd "Inline stloc first use temp" <char[]>
; V70 tmp40 [V70,T06] ( 3,128 ) ushort -> a1 "Inlining Arg"
;* V71 tmp41 [V71 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "Inline return value spill temp" <System.Text.StringBuilder>
-; V72 tmp42 [V72,T86] ( 3, 12 ) int -> a2 "Inline stloc first use temp"
-; V73 tmp43 [V73,T71] ( 3, 12 ) ref -> s3 class-hnd "Inline stloc first use temp" <char[]>
-; V74 tmp44 [V74,T38] ( 4, 32 ) ref -> a0 class-hnd exact "Inlining Arg" <System.String>
+; V72 tmp42 [V72,T85] ( 3, 12 ) int -> a2 "Inline stloc first use temp"
+; V73 tmp43 [V73,T70] ( 3, 12 ) ref -> s3 class-hnd "Inline stloc first use temp" <char[]>
+; V74 tmp44 [V74,T37] ( 4, 32 ) ref -> a0 class-hnd exact "Inlining Arg" <System.String>
;* V75 tmp45 [V75 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "Inline return value spill temp" <System.Text.StringBuilder>
-; V76 tmp46 [V76,T87] ( 3, 12 ) int -> a2 "Inline stloc first use temp"
-; V77 tmp47 [V77,T72] ( 3, 12 ) ref -> s4 class-hnd "Inline stloc first use temp" <char[]>
+; V76 tmp46 [V76,T86] ( 3, 12 ) int -> a2 "Inline stloc first use temp"
+; V77 tmp47 [V77,T71] ( 3, 12 ) ref -> s4 class-hnd "Inline stloc first use temp" <char[]>
;* V78 tmp48 [V78 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "Inline return value spill temp" <System.Text.StringBuilder>
-; V79 tmp49 [V79,T29] ( 3, 48 ) int -> a2 "Inline stloc first use temp"
-; V80 tmp50 [V80,T25] ( 3, 48 ) ref -> s6 class-hnd "Inline stloc first use temp" <char[]>
+; V79 tmp49 [V79,T28] ( 3, 48 ) int -> a2 "Inline stloc first use temp"
+; V80 tmp50 [V80,T24] ( 3, 48 ) ref -> s6 class-hnd "Inline stloc first use temp" <char[]>
; V81 tmp51 [V81,T01] ( 4,192 ) ref -> a0 class-hnd exact "Inlining Arg" <System.String>
;* V82 tmp52 [V82 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "Inline return value spill temp" <System.Text.StringBuilder>
-; V83 tmp53 [V83,T88] ( 3, 12 ) int -> a2 "Inline stloc first use temp"
-; V84 tmp54 [V84,T73] ( 3, 12 ) ref -> s3 class-hnd "Inline stloc first use temp" <char[]>
+; V83 tmp53 [V83,T87] ( 3, 12 ) int -> a2 "Inline stloc first use temp"
+; V84 tmp54 [V84,T72] ( 3, 12 ) ref -> s3 class-hnd "Inline stloc first use temp" <char[]>
;* V85 tmp55 [V85 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "Inline return value spill temp" <System.Text.StringBuilder>
-; V86 tmp56 [V86,T89] ( 3, 12 ) int -> a2 "Inline stloc first use temp"
-; V87 tmp57 [V87,T74] ( 3, 12 ) ref -> s3 class-hnd "Inline stloc first use temp" <char[]>
-; V88 tmp58 [V88,T26] ( 3, 48 ) ref -> s4 class-hnd "Inline stloc first use temp" <char[]>
-; V89 tmp59 [V89,T30] ( 3, 48 ) int -> s5 "Inline stloc first use temp"
-; V90 tmp60 [V90,T21] ( 2, 64 ) byref -> a1 "Inlining Arg"
-; V91 tmp61 [V91,T27] ( 3, 48 ) byref -> a0 "Inline stloc first use temp"
+; V86 tmp56 [V86,T88] ( 3, 12 ) int -> a2 "Inline stloc first use temp"
+; V87 tmp57 [V87,T73] ( 3, 12 ) ref -> s3 class-hnd "Inline stloc first use temp" <char[]>
+; V88 tmp58 [V88,T25] ( 3, 48 ) ref -> s4 class-hnd "Inline stloc first use temp" <char[]>
+; V89 tmp59 [V89,T29] ( 3, 48 ) int -> s5 "Inline stloc first use temp"
+; V90 tmp60 [V90,T20] ( 2, 64 ) byref -> a1 "Inlining Arg"
+; V91 tmp61 [V91,T26] ( 3, 48 ) byref -> a0 "Inline stloc first use temp"
;* V92 tmp62 [V92 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "Inline return value spill temp" <System.Text.StringBuilder>
-; V93 tmp63 [V93,T31] ( 3, 48 ) int -> a2 "Inline stloc first use temp"
-; V94 tmp64 [V94,T28] ( 3, 48 ) ref -> s6 class-hnd "Inline stloc first use temp" <char[]>
+; V93 tmp63 [V93,T30] ( 3, 48 ) int -> a2 "Inline stloc first use temp"
+; V94 tmp64 [V94,T27] ( 3, 48 ) ref -> s6 class-hnd "Inline stloc first use temp" <char[]>
;* V95 tmp65 [V95 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "Inline return value spill temp" <System.Text.StringBuilder>
-; V96 tmp66 [V96,T90] ( 3, 12 ) int -> s2 "Inline stloc first use temp"
-; V97 tmp67 [V97,T75] ( 3, 12 ) ref -> s3 class-hnd "Inline stloc first use temp" <char[]>
+; V96 tmp66 [V96,T89] ( 3, 12 ) int -> s2 "Inline stloc first use temp"
+; V97 tmp67 [V97,T74] ( 3, 12 ) ref -> s3 class-hnd "Inline stloc first use temp" <char[]>
;* V98 tmp68 [V98 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "Inline return value spill temp" <System.Text.StringBuilder>
-; V99 tmp69 [V99,T91] ( 3, 12 ) int -> a2 "Inline stloc first use temp"
-; V100 tmp70 [V100,T76] ( 3, 12 ) ref -> s3 class-hnd "Inline stloc first use temp" <char[]>
+; V99 tmp69 [V99,T90] ( 3, 12 ) int -> a2 "Inline stloc first use temp"
+; V100 tmp70 [V100,T75] ( 3, 12 ) ref -> s3 class-hnd "Inline stloc first use temp" <char[]>
;* V101 tmp71 [V101 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "Inline return value spill temp" <System.Text.StringBuilder>
-; V102 tmp72 [V102,T92] ( 3, 12 ) int -> a2 "Inline stloc first use temp"
-; V103 tmp73 [V103,T77] ( 3, 12 ) ref -> s3 class-hnd "Inline stloc first use temp" <char[]>
+; V102 tmp72 [V102,T91] ( 3, 12 ) int -> a2 "Inline stloc first use temp"
+; V103 tmp73 [V103,T76] ( 3, 12 ) ref -> s3 class-hnd "Inline stloc first use temp" <char[]>
;* V104 tmp74 [V104 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "Inline return value spill temp" <System.Text.StringBuilder>
-; V105 tmp75 [V105,T93] ( 3, 12 ) int -> a2 "Inline stloc first use temp"
-; V106 tmp76 [V106,T78] ( 3, 12 ) ref -> s3 class-hnd "Inline stloc first use temp" <char[]>
+; V105 tmp75 [V105,T92] ( 3, 12 ) int -> a2 "Inline stloc first use temp"
+; V106 tmp76 [V106,T77] ( 3, 12 ) ref -> s3 class-hnd "Inline stloc first use temp" <char[]>
;* V107 tmp77 [V107 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "Inline return value spill temp" <System.Text.StringBuilder>
-; V108 tmp78 [V108,T94] ( 3, 12 ) int -> a2 "Inline stloc first use temp"
-; V109 tmp79 [V109,T79] ( 3, 12 ) ref -> s5 class-hnd "Inline stloc first use temp" <char[]>
+; V108 tmp78 [V108,T93] ( 3, 12 ) int -> a2 "Inline stloc first use temp"
+; V109 tmp79 [V109,T78] ( 3, 12 ) ref -> s5 class-hnd "Inline stloc first use temp" <char[]>
; V110 tmp80 [V110 ] ( 4, 16 ) struct (16) [fp-0x58] do-not-enreg[XSF] must-init addr-exposed ld-addr-op "Inline ldloca(s) first use temp" <<>y__InlineArray2`1[System.Object]>
;* V111 tmp81 [V111 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "Inlining Arg" <<unknown class>>
;* V112 tmp82 [V112 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.ReadOnlySpan`1[System.__Canon]>
;* V113 tmp83 [V113 ] ( 0, 0 ) struct (16) zero-ref multireg-arg ld-addr-op "NewObj constructor temp" <System.ReadOnlySpan`1[System.Object]>
;* V114 tmp84 [V114 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "Inline return value spill temp" <System.Text.StringBuilder>
-; V115 tmp85 [V115,T95] ( 3, 12 ) int -> a2 "Inline stloc first use temp"
-; V116 tmp86 [V116,T80] ( 3, 12 ) ref -> s6 class-hnd "Inline stloc first use temp" <char[]>
+; V115 tmp85 [V115,T94] ( 3, 12 ) int -> a2 "Inline stloc first use temp"
+; V116 tmp86 [V116,T79] ( 3, 12 ) ref -> s6 class-hnd "Inline stloc first use temp" <char[]>
; V117 tmp87 [V117 ] ( 5, 20 ) struct (24) [fp-0x70] do-not-enreg[XSF] must-init addr-exposed ld-addr-op "Inline ldloca(s) first use temp" <<>y__InlineArray3`1[System.Object]>
;* V118 tmp88 [V118 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "Inlining Arg" <<unknown class>>
;* V119 tmp89 [V119 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "Inlining Arg" <<unknown class>>
;* V120 tmp90 [V120 ] ( 0, 0 ) struct (16) zero-ref "spilled call-like call argument" <System.ReadOnlySpan`1[System.__Canon]>
;* V121 tmp91 [V121 ] ( 0, 0 ) struct (16) zero-ref multireg-arg ld-addr-op "NewObj constructor temp" <System.ReadOnlySpan`1[System.Object]>
-; V122 tmp92 [V122,T81] ( 3, 12 ) ref -> s2 class-hnd "Inline stloc first use temp" <char[]>
-; V123 tmp93 [V123,T57] ( 4, 16 ) int -> s3 "Inline stloc first use temp"
-; V124 tmp94 [V124,T63] ( 2, 16 ) byref -> a1 "Inlining Arg"
+; V122 tmp92 [V122,T80] ( 3, 12 ) ref -> s2 class-hnd "Inline stloc first use temp" <char[]>
+; V123 tmp93 [V123,T56] ( 4, 16 ) int -> s3 "Inline stloc first use temp"
+; V124 tmp94 [V124,T62] ( 2, 16 ) byref -> a1 "Inlining Arg"
;* V125 tmp95 [V125 ] ( 0, 0 ) byref -> zero-ref "Inline stloc first use temp"
;* V126 tmp96 [V126 ] ( 0, 0 ) ref -> zero-ref class-hnd "Inlining Arg" <System.String>
;* V127 tmp97 [V127 ] ( 0, 0 ) ref -> zero-ref class-hnd "Inlining Arg" <System.Text.StringBuilder>
-; V128 tmp98 [V128,T123] ( 3, 3 ) ref -> s2 class-hnd single-def "Inline stloc first use temp" <char[]>
-; V129 tmp99 [V129,T115] ( 4, 4 ) int -> s3 "Inline stloc first use temp"
-; V130 tmp100 [V130,T118] ( 2, 4 ) byref -> a1 single-def "Inlining Arg"
+; V128 tmp98 [V128,T122] ( 3, 3 ) ref -> s2 class-hnd single-def "Inline stloc first use temp" <char[]>
+; V129 tmp99 [V129,T114] ( 4, 4 ) int -> s3 "Inline stloc first use temp"
+; V130 tmp100 [V130,T117] ( 2, 4 ) byref -> a1 single-def "Inlining Arg"
;* V131 tmp101 [V131 ] ( 0, 0 ) byref -> zero-ref "Inline stloc first use temp"
-; V132 tmp102 [V132,T16] ( 5, 88 ) byref -> [fp-0x40] do-not-enreg[Z] EH-live "field V15._reference (fldOffset=0x0)" P-DEP
-; V133 tmp103 [V133,T35] ( 4, 44 ) int -> [fp-0x38] do-not-enreg[Z] EH-live "field V15._length (fldOffset=0x8)" P-DEP
+; V132 tmp102 [V132,T15] ( 5, 88 ) byref -> [fp-0x40] do-not-enreg[Z] EH-live "field V15._reference (fldOffset=0x0)" P-DEP
+; V133 tmp103 [V133,T34] ( 4, 44 ) int -> [fp-0x38] do-not-enreg[Z] EH-live "field V15._length (fldOffset=0x8)" P-DEP
;* V134 tmp104 [V134 ] ( 0, 0 ) byref -> zero-ref "field V35._reference (fldOffset=0x0)" P-DEP
;* V135 tmp105 [V135 ] ( 0, 0 ) int -> zero-ref "field V35._length (fldOffset=0x8)" P-DEP
;* V136 tmp106 [V136 ] ( 0, 0 ) byref -> zero-ref "field V112._reference (fldOffset=0x0)" P-INDEP
;* V137 tmp107 [V137 ] ( 0, 0 ) int -> zero-ref "field V112._length (fldOffset=0x8)" P-INDEP
-;* V138 tmp108 [V138,T119] ( 0, 0 ) byref -> zero-ref "field V113._reference (fldOffset=0x0)" P-INDEP
+;* V138 tmp108 [V138,T118] ( 0, 0 ) byref -> zero-ref "field V113._reference (fldOffset=0x0)" P-INDEP
;* V139 tmp109 [V139 ] ( 0, 0 ) int -> zero-ref "field V113._length (fldOffset=0x8)" P-INDEP
;* V140 tmp110 [V140 ] ( 0, 0 ) byref -> zero-ref "field V120._reference (fldOffset=0x0)" P-INDEP
;* V141 tmp111 [V141 ] ( 0, 0 ) int -> zero-ref "field V120._length (fldOffset=0x8)" P-INDEP
-;* V142 tmp112 [V142,T120] ( 0, 0 ) byref -> zero-ref "field V121._reference (fldOffset=0x0)" P-INDEP
+;* V142 tmp112 [V142,T119] ( 0, 0 ) byref -> zero-ref "field V121._reference (fldOffset=0x0)" P-INDEP
;* V143 tmp113 [V143 ] ( 0, 0 ) int -> zero-ref "field V121._length (fldOffset=0x8)" P-INDEP
; V144 tmp114 [V144,T02] ( 3,192 ) ref -> a0 "argument with side effect"
; V145 tmp115 [V145,T03] ( 3,192 ) ref -> a0 "argument with side effect"
-; V146 tmp116 [V146,T14] ( 3, 96 ) ref -> a0 "argument with side effect"
-; V147 tmp117 [V147,T15] ( 3, 96 ) ref -> a0 "argument with side effect"
+; V146 tmp116 [V146,T13] ( 3, 96 ) ref -> a0 "argument with side effect"
+; V147 tmp117 [V147,T14] ( 3, 96 ) ref -> a0 "argument with side effect"
; V148 tmp118 [V148,T04] ( 3,192 ) ref -> a0 "argument with side effect"
-; V149 tmp119 [V149,T48] ( 3, 24 ) ref -> a0 "argument with side effect"
-; V150 tmp120 [V150,T49] ( 3, 24 ) ref -> a0 "argument with side effect"
-; V151 cse0 [V151,T42] ( 6, 24 ) long -> s3 multi-def "CSE #36: moderate"
-; V152 cse1 [V152,T96] ( 3, 12 ) long -> s3 "CSE #11: conservative"
-; V153 cse2 [V153,T08] ( 4,112 ) long -> s5 "CSE #23: aggressive"
-; V154 cse3 [V154,T32] ( 3, 48 ) int -> s5 "CSE #15: moderate"
-; V155 cse4 [V155,T33] ( 3, 48 ) int -> s5 "CSE #25: moderate"
-; V156 cse5 [V156,T97] ( 3, 12 ) int -> s2 "CSE #04: conservative"
...+0 (0.00%) : 94768.dasm - System.Threading.AsyncMutex:g__OnCancellation|7_2(System.Object,System.Threading.CancellationToken) (MinOpts)No diffs found? DetailsSize improvements/regressions per collection
PerfScore improvements/regressions per collection
Context information
jit-analyze output |
tomeksowi
approved these changes
Dec 9, 2025
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The addressing mode nodes are optimized by CSE, which causes some inefficient address synthesis for indirections.
The current implementation of Zba extension allows generating the GT_SHXADD(.UW) node in
Lowering::TryLowerShiftAddToShxadd. However the CSE-optimized addressing mode nodes are replaced with GT_LCL_VAR so that it prevents this lower process and eventually generates aslli(.uw)+addinstead of ashXadd(.uw).This PR improves the code quality by preventing the CSE applied to addressing mode nodes.
Prevent the addressing mode nodes(GT_CAST, GT_LSH and GT_MUL) being optimized by the CSE in RISCV64.
Previously the nodes (GT_CAST + GT_LSH + GT_ADD) were lowered into (slli.uw + add). Now it is emitted with a single shXadd.
Part of #84834, cc @dotnet/samsung
@credo-quia-absurdum