Elide redundant test instruction for signed comparison predicates

src/coreclr/jit/emitxarch.cpp

@@ -709,6 +709,22 @@ bool emitter::HasRegularWideImmediateForm(instruction ins)
     return (flags & INS_FLAGS_Has_Sbit) != 0;
 }
 
+//------------------------------------------------------------------------
+// DoesWriteOverflowFlag: check if the instruction write the
+//     OF flag.
+//
+// Arguments:
+//    ins - instruction to test
+//
+// Return Value:
+//    true if instruction writes the OF flag, false otherwise.
+//
+bool emitter::DoesWriteOverflowFlag(instruction ins)
+{
+    insFlags flags = CodeGenInterface::instInfo[ins];
+    return (flags & Writes_OF) != 0;
+}
+
 //------------------------------------------------------------------------
 // DoesWriteZeroFlag: check if the instruction write the
 //     ZF flag.
@@ -1472,6 +1488,23 @@ bool emitter::AreFlagsSetToZeroCmp(regNumber reg, emitAttr opSize, GenCondition
         }
     }
 
+    if ((cond.GetCode() == GenCondition::SLT) || (cond.GetCode() == GenCondition::SGE))
+    {
+        if (DoesWriteSignFlag(lastIns) && DoesWriteOverflowFlag(lastIns) && IsFlagsAlwaysModified(id))
+        {
+            return id->idOpSize() == opSize;
+        }
+    }
+
+    if ((cond.GetCode() == GenCondition::SGT) || (cond.GetCode() == GenCondition::SLE))
+    {
+        if (DoesWriteZeroFlag(lastIns) && DoesWriteSignFlag(lastIns) && DoesWriteOverflowFlag(lastIns) &&
+            IsFlagsAlwaysModified(id))
+        {
+            return id->idOpSize() == opSize;
+        }
+    }
+
     return false;
 }
 

src/coreclr/jit/emitxarch.h

@@ -767,6 +767,7 @@ bool        IsDstSrcSrcAVXInstruction(instruction ins) const;
 bool        IsThreeOperandAVXInstruction(instruction ins) const;
 static bool HasRegularWideForm(instruction ins);
 static bool HasRegularWideImmediateForm(instruction ins);
+static bool DoesWriteOverflowFlag(instruction ins);
 static bool DoesWriteZeroFlag(instruction ins);
 static bool DoesWriteParityFlag(instruction ins);
 static bool DoesWriteSignFlag(instruction ins);