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17 changes: 16 additions & 1 deletion src/coreclr/jit/unwindamd64.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -423,7 +423,22 @@ void Compiler::unwindSaveRegWindows(regNumber reg, unsigned offset)
code = (UNWIND_CODE*)&func->unwindCodes[func->unwindCodeSlot -= sizeof(UNWIND_CODE)];
code->UnwindOp = (genIsValidFloatReg(reg)) ? UWOP_SAVE_XMM128_FAR : UWOP_SAVE_NONVOL_FAR;
}
code->OpInfo = (BYTE)(genIsValidFloatReg(reg) ? reg - XMMBASE : reg);
unsigned unwindRegNum;
if (genIsValidFloatReg(reg))
{
unwindRegNum = reg - XMMBASE;
}
else
{
assert(genIsValidIntReg(reg));
unwindRegNum = reg;
}
// We only add unwind codes for non-volatile registers and for x86/x64,
// the max registers index for a non-volatile register is 15.
assert(unwindRegNum <= 15);
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Is this correct?

We have 32 float registers with AVX512 and can have up to 32 general-purpose registers with APX.

If we're relying on something like this only being non-volatile registers, then I'd think we want a comment explaining that.

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OpInfo only has 4 bits, so it can only fit up to 15, so if there were ever callee-saves with a higher index it would also need some other unwind code.

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From this link

We propose to define the new GPRs as caller-saved (volatile) states in application binary interfaces (ABIs), facilitating interoperability with legacy binaries.

The callee-saved state is unchanged, but will add a comment that @tannergooding asked.

code->OpInfo = (UCHAR)unwindRegNum;
assert((unsigned)code->OpInfo == unwindRegNum);

unsigned int cbProlog = unwindGetCurrentOffset(func);
noway_assert((BYTE)cbProlog == cbProlog);
code->CodeOffset = (BYTE)cbProlog;
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