remove unnecessary Avx512VL ISA flags. #103144

Ruihan-Yin · 2024-06-06T21:38:24Z

To save some space in XArchIntrinsicConstants, this PR turns Avx512*_VL ISA flags per subset into a converged flag: Avx512F_VL, such that we can hold more ISAs within this enum, this will be the pre-work for the ongoing APX project.

tannergooding · 2024-06-06T21:40:33Z

src/coreclr/tools/Common/Compiler/HardwareIntrinsicHelpers.cs

@@ -73,17 +73,13 @@ private static class XArchIntrinsicConstants
            public const int Avx512f = 0x8000;
            public const int Avx512f_vl = 0x10000;


Can we just have this be Avx512vl, as that's the actual CPUID feature name and matches the casing we use elsewhere?

I agree, will rename this part accordingly.

tannergooding · 2024-06-06T21:41:57Z

src/coreclr/tools/Common/Compiler/HardwareIntrinsicHelpers.cs

+            public const int Avx10v1_v256 = 0x800000;
+            public const int Avx10v1_v512 = 0x1000000;


It'd be nice to remove these as well.

The former is unnecessary and the latter is implied by Avx512F existing.

I can make this change, and just make sure, does this part have conflicting changes with the ongoing Avx10 PR? I know some changes happening there for this as well, but didn't follow closely.

That PR is removing Avx10v1_v256, so removing it here as well should help avoid a conflict.

I saw Avx10v1_V256 was removed from InstructionSetDesc.txt, so what we want here is don't even define Avx10v1_V256 and Avx10v1_V512, and rely on EVEX to make sure JIT backend will correctly handle Avx10 nodes? Just to confirm.

Right. Avx10v1_v256 is just part of Avx10v1, so it's unnecessary.

Likewise, Avx10v1_v512 is really just Avx10v1 + Avx512, so doing those checks instead fits the need and saves us bits.

Thanks for the inputs,

There are duplicated implications there: https://github.com/dotnet/runtime/blob/main/src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetDesc.txt#L141

Are they intended to be like this, or this shall be removed, I can make the changes if needed.

Edit:
If we remove Avx10v1_V512, then the node definitions here might need some refactoring? It looks fine to just remove it from XArchIntrinsicConstants but keep the definition as an ISA, and as mentioned, set InstructionSet_Avx10v1_V512 based on XArchIntrinsicConstants_Avx10v1 and XArchIntrinsicConstants_Avx512f

Are they intended to be like this, or this shall be removed, I can make the changes if needed.

No and I'm actually fixing that in #103241

It looks fine to just remove it from XArchIntrinsicConstants but keep the definition as an ISA, and as mentioned, set InstructionSet_Avx10v1_V512 based on XArchIntrinsicConstants_Avx10v1 and XArchIntrinsicConstants_Avx512f

Right, this is what I had meant should happen.

Any refactoring that changes how InstructionSet_* works might be possible but would be a more involved change.

Thanks for the explanation, in that case, I can wait for this PR go in first, and I will handle the conflict accordingly.

jkotas · 2024-06-06T23:27:14Z

You will also need to fix this to check that all feature bits are present for features described by multiple bits.

jkotas · 2024-06-11T20:05:42Z

src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/HardwareIntrinsicHelpers.Aot.cs

+            switch (instructionSet)
+            {
+                case InstructionSet.X64_AVX10v1_V512:
+                case InstructionSet.X64_AVX10v1_V512_X64:
+                case InstructionSet.X64_AVX512F_VL:
+                case InstructionSet.X64_AVX512F_VL_X64:
+                case InstructionSet.X64_AVX512BW_VL:
+                case InstructionSet.X64_AVX512BW_VL_X64:
+                case InstructionSet.X64_AVX512CD_VL:
+                case InstructionSet.X64_AVX512CD_VL_X64:
+                case InstructionSet.X64_AVX512DQ_VL:
+                case InstructionSet.X64_AVX512DQ_VL_X64:
+                case InstructionSet.X64_AVX512VBMI_VL:
+                case InstructionSet.X64_AVX512VBMI_VL_X64:


Suggested change

switch (instructionSet)

{

case InstructionSet.X64_AVX10v1_V512:

case InstructionSet.X64_AVX10v1_V512_X64:

case InstructionSet.X64_AVX512F_VL:

case InstructionSet.X64_AVX512F_VL_X64:

case InstructionSet.X64_AVX512BW_VL:

case InstructionSet.X64_AVX512BW_VL_X64:

case InstructionSet.X64_AVX512CD_VL:

case InstructionSet.X64_AVX512CD_VL_X64:

case InstructionSet.X64_AVX512DQ_VL:

case InstructionSet.X64_AVX512DQ_VL_X64:

case InstructionSet.X64_AVX512VBMI_VL:

case InstructionSet.X64_AVX512VBMI_VL_X64:

if (!uint.IsPow2((uint)flag))

{

You should be able to just check whether the flag has one or more bits.

jkotas · 2024-06-12T01:16:08Z

src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/HardwareIntrinsicHelpers.Aot.cs

+                codeStream.EmitLdc(flag);
+                codeStream.Emit(ILOpcode.and);
+                codeStream.EmitLdc(flag);
+                codeStream.Emit(ILOpcode.beq);


Suggested change

codeStream.Emit(ILOpcode.beq);

codeStream.Emit(ILOpcode.ceq);

beq is "branch on equal". This is needs to be compare instead.

Corrected, thanks for pointing out!

Ruihan-Yin · 2024-06-12T16:30:17Z

rebased the branch to resolve conflicts.

I kept Avx10v1_V512 as an ISA to make it consistent with the node definition in hwintrinsicxarchlist.h. If we need further changes, I can try to make it within this PR.

The fails look like connection issue.

Ruihan-Yin · 2024-06-18T21:44:29Z

Hi @tannergooding,

Just making sure, I am looking at the #103241, in that PR, we have folded all the Avx512 bits into 1, is that expected moving on, or we are still looking for separate them out to be F+VL+BW+CD+DQ as discussed here. If not, I suppose the only thing left for this PR would be removing Avx10v1_V512?

Edit:
Conflicts have been resolved, I have only pushed the changes for Avx10v1 part first. For Avx512, I kept it to what has been changes in #103241, if we want to expand Avx512 flags, I will make the changes accordingly.

…12 and Avx10v1.

src/native/minipal/cpufeatures.c

dotnet-policy-service · 2024-06-18T23:58:11Z

Tagging subscribers to this area: @dotnet/area-system-runtime-intrinsics
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src/native/minipal/cpufeatures.c

Ruihan-Yin · 2024-06-26T17:08:40Z

Except known failures, the build fail looks like due to timeout, and not related the changes.

tannergooding · 2024-06-27T15:35:12Z

Rerunning CI to get it in a clean state

Ruihan-Yin · 2024-06-28T17:13:44Z

Build Analysis has shown green, PR should be in clean state.

tannergooding · 2024-06-28T17:15:32Z

@jkotas, did you have any other feedback here or can I merge once CI is showing green?

jkotas · 2024-06-28T17:19:02Z

LGTM

Ruihan-Yin · 2024-06-29T01:49:55Z

I was not able to reproduce the CI fail locally.

From the call stack, it is more likely to be connection issue.

Ruihan-Yin · 2024-07-01T16:38:50Z

Thanks for all the suggestions and help!

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Wasm test failure: Unable to evaluate script: target frame detached #102957

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Ruihan-Yin marked this pull request as ready for review June 12, 2024 16:30

Ruihan-Yin requested a review from MichalStrehovsky as a code owner June 12, 2024 16:30

remove Avx10v1_V512 from XArchIntrisicConstants, let it imply by Avx5…

613494e

…12 and Avx10v1.

Ruihan-Yin force-pushed the compress-avx512-flags branch from ad4b0f9 to 613494e Compare June 18, 2024 22:23

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assert Avx10/V512 can be inferred from Avx10v1 and Avx512.

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[NO REVIEW] Update the CPUID and XSAVE logics for APX #103019

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remove unnecessary Avx512VL ISA flags. #103144

remove unnecessary Avx512VL ISA flags. #103144

Ruihan-Yin commented Jun 6, 2024

tannergooding Jun 6, 2024

Ruihan-Yin Jun 6, 2024

tannergooding Jun 6, 2024

Ruihan-Yin Jun 6, 2024

tannergooding Jun 6, 2024

Ruihan-Yin Jun 11, 2024

tannergooding Jun 11, 2024

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jkotas commented Jun 6, 2024

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tannergooding commented Jun 28, 2024

jkotas commented Jun 28, 2024

Ruihan-Yin commented Jun 29, 2024

Ruihan-Yin commented Jul 1, 2024

		@@ -73,17 +73,13 @@ private static class XArchIntrinsicConstants
		public const int Avx512f = 0x8000;
		public const int Avx512f_vl = 0x10000;

		public const int Avx10v1_v256 = 0x800000;
		public const int Avx10v1_v512 = 0x1000000;

	codeStream.Emit(ILOpcode.beq);
	codeStream.Emit(ILOpcode.ceq);

remove unnecessary Avx512VL ISA flags. #103144

remove unnecessary Avx512VL ISA flags. #103144

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Ruihan-Yin commented Jun 6, 2024

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