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Add regTypeTag in register*.h files
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@kunalspathak
kunalspathak committed May 29, 2024
1 parent 27b8170 commit 4fe1caa
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Showing 12 changed files with 358 additions and 343 deletions.
4 changes: 2 additions & 2 deletions src/coreclr/jit/emitarm64.cpp
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Expand Up @@ -1309,13 +1309,13 @@ emitAttr emitter::emitInsLoadStoreSize(instrDesc* id)
// clang-format off
static const char * const xRegNames[] =
{
#define REGDEF(name, rnum, mask, xname, wname) xname,
#define REGDEF(name, rnum, mask, xname, wname, regTypeTag) xname,
#include "register.h"
};

static const char * const wRegNames[] =
{
#define REGDEF(name, rnum, mask, xname, wname) wname,
#define REGDEF(name, rnum, mask, xname, wname, regTypeTag) wname,
#include "register.h"
};

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2 changes: 1 addition & 1 deletion src/coreclr/jit/emitloongarch64.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -3909,7 +3909,7 @@ size_t emitter::emitOutputInstr(insGroup* ig, instrDesc* id, BYTE** dp)
// clang-format off
static const char* const RegNames[] =
{
#define REGDEF(name, rnum, mask, sname) sname,
#define REGDEF(name, rnum, mask, sname, regTypeTag) sname,
#include "register.h"
};
// clang-format on
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6 changes: 3 additions & 3 deletions src/coreclr/jit/emitxarch.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -10413,7 +10413,7 @@ const char* emitter::emitRegName(regNumber reg, emitAttr attr, bool varName) con
const char* emitter::emitXMMregName(unsigned reg) const
{
static const char* const regNames[] = {
#define REGDEF(name, rnum, mask, sname) "x" sname,
#define REGDEF(name, rnum, mask, sname, regTypeTag) "x" sname,
#include "register.h"
};

Expand All @@ -10431,7 +10431,7 @@ const char* emitter::emitXMMregName(unsigned reg) const
const char* emitter::emitYMMregName(unsigned reg) const
{
static const char* const regNames[] = {
#define REGDEF(name, rnum, mask, sname) "y" sname,
#define REGDEF(name, rnum, mask, sname, regTypeTag) "y" sname,
#include "register.h"
};

Expand All @@ -10449,7 +10449,7 @@ const char* emitter::emitYMMregName(unsigned reg) const
const char* emitter::emitZMMregName(unsigned reg) const
{
static const char* const regNames[] = {
#define REGDEF(name, rnum, mask, sname) "z" sname,
#define REGDEF(name, rnum, mask, sname, regTypeTag) "z" sname,
#include "register.h"
};

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14 changes: 14 additions & 0 deletions src/coreclr/jit/regMaskTPOps.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -26,3 +26,17 @@ bool regMaskTP::IsRegNumInMask(regNumber reg)
{
return (low & genRegMask(reg)) != 0;
}

/* static */ const int regMaskTP::getRegisterTypeIndex(regNumber reg)
{
static const BYTE _registerTypeIndex[] = {
#ifdef TARGET_ARM64
#define REGDEF(name, rnum, mask, xname, wname, regTypeTag) regTypeTag,
#else
#define REGDEF(name, rnum, mask, sname, regTypeTag) regTypeTag,
#endif
#include "register.h"
};

return _registerTypeIndex[reg];
}
138 changes: 69 additions & 69 deletions src/coreclr/jit/register.h
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Original file line number Diff line number Diff line change
Expand Up @@ -16,15 +16,15 @@

#if defined(TARGET_X86)
/*
REGDEF(name, rnum, mask, sname) */
REGDEF(EAX, 0, 0x01, "eax" )
REGDEF(ECX, 1, 0x02, "ecx" )
REGDEF(EDX, 2, 0x04, "edx" )
REGDEF(EBX, 3, 0x08, "ebx" )
REGDEF(ESP, 4, 0x10, "esp" )
REGDEF(EBP, 5, 0x20, "ebp" )
REGDEF(ESI, 6, 0x40, "esi" )
REGDEF(EDI, 7, 0x80, "edi" )
REGDEF(name, rnum, mask, sname, regTypeTag) */
REGDEF(EAX, 0, 0x01, "eax", 0)
REGDEF(ECX, 1, 0x02, "ecx", 0)
REGDEF(EDX, 2, 0x04, "edx", 0)
REGDEF(EBX, 3, 0x08, "ebx", 0)
REGDEF(ESP, 4, 0x10, "esp", 0)
REGDEF(EBP, 5, 0x20, "ebp", 0)
REGDEF(ESI, 6, 0x40, "esi", 0)
REGDEF(EDI, 7, 0x80, "edi", 0)
REGALIAS(RAX, EAX)
REGALIAS(RCX, ECX)
REGALIAS(RDX, EDX)
Expand All @@ -37,23 +37,23 @@ REGALIAS(RDI, EDI)
#else // !defined(TARGET_X86)

/*
REGDEF(name, rnum, mask, sname) */
REGDEF(RAX, 0, 0x0001, "rax" )
REGDEF(RCX, 1, 0x0002, "rcx" )
REGDEF(RDX, 2, 0x0004, "rdx" )
REGDEF(RBX, 3, 0x0008, "rbx" )
REGDEF(RSP, 4, 0x0010, "rsp" )
REGDEF(RBP, 5, 0x0020, "rbp" )
REGDEF(RSI, 6, 0x0040, "rsi" )
REGDEF(RDI, 7, 0x0080, "rdi" )
REGDEF(R8, 8, 0x0100, "r8" )
REGDEF(R9, 9, 0x0200, "r9" )
REGDEF(R10, 10, 0x0400, "r10" )
REGDEF(R11, 11, 0x0800, "r11" )
REGDEF(R12, 12, 0x1000, "r12" )
REGDEF(R13, 13, 0x2000, "r13" )
REGDEF(R14, 14, 0x4000, "r14" )
REGDEF(R15, 15, 0x8000, "r15" )
REGDEF(name, rnum, mask, sname, regTypeTag) */
REGDEF(RAX, 0, 0x0001, "rax", 0)
REGDEF(RCX, 1, 0x0002, "rcx", 0)
REGDEF(RDX, 2, 0x0004, "rdx", 0)
REGDEF(RBX, 3, 0x0008, "rbx", 0)
REGDEF(RSP, 4, 0x0010, "rsp", 0)
REGDEF(RBP, 5, 0x0020, "rbp", 0)
REGDEF(RSI, 6, 0x0040, "rsi", 0)
REGDEF(RDI, 7, 0x0080, "rdi", 0)
REGDEF(R8, 8, 0x0100, "r8" , 0)
REGDEF(R9, 9, 0x0200, "r9" , 0)
REGDEF(R10, 10, 0x0400, "r10", 0)
REGDEF(R11, 11, 0x0800, "r11", 0)
REGDEF(R12, 12, 0x1000, "r12", 0)
REGDEF(R13, 13, 0x2000, "r13", 0)
REGDEF(R14, 14, 0x4000, "r14", 0)
REGDEF(R15, 15, 0x8000, "r15", 0)

REGALIAS(EAX, RAX)
REGALIAS(ECX, RCX)
Expand Down Expand Up @@ -83,55 +83,55 @@ REGALIAS(EDI, RDI)

#endif // !TARGET_AMD64

REGDEF(XMM0, 0+XMMBASE, XMMMASK(0), "mm0" )
REGDEF(XMM1, 1+XMMBASE, XMMMASK(1), "mm1" )
REGDEF(XMM2, 2+XMMBASE, XMMMASK(2), "mm2" )
REGDEF(XMM3, 3+XMMBASE, XMMMASK(3), "mm3" )
REGDEF(XMM4, 4+XMMBASE, XMMMASK(4), "mm4" )
REGDEF(XMM5, 5+XMMBASE, XMMMASK(5), "mm5" )
REGDEF(XMM6, 6+XMMBASE, XMMMASK(6), "mm6" )
REGDEF(XMM7, 7+XMMBASE, XMMMASK(7), "mm7" )
REGDEF(XMM0, 0+XMMBASE, XMMMASK(0), "mm0", 1)
REGDEF(XMM1, 1+XMMBASE, XMMMASK(1), "mm1", 1)
REGDEF(XMM2, 2+XMMBASE, XMMMASK(2), "mm2", 1)
REGDEF(XMM3, 3+XMMBASE, XMMMASK(3), "mm3", 1)
REGDEF(XMM4, 4+XMMBASE, XMMMASK(4), "mm4", 1)
REGDEF(XMM5, 5+XMMBASE, XMMMASK(5), "mm5", 1)
REGDEF(XMM6, 6+XMMBASE, XMMMASK(6), "mm6", 1)
REGDEF(XMM7, 7+XMMBASE, XMMMASK(7), "mm7", 1)

#ifdef TARGET_AMD64
REGDEF(XMM8, 8+XMMBASE, XMMMASK(8), "mm8" )
REGDEF(XMM9, 9+XMMBASE, XMMMASK(9), "mm9" )
REGDEF(XMM10, 10+XMMBASE, XMMMASK(10), "mm10" )
REGDEF(XMM11, 11+XMMBASE, XMMMASK(11), "mm11" )
REGDEF(XMM12, 12+XMMBASE, XMMMASK(12), "mm12" )
REGDEF(XMM13, 13+XMMBASE, XMMMASK(13), "mm13" )
REGDEF(XMM14, 14+XMMBASE, XMMMASK(14), "mm14" )
REGDEF(XMM15, 15+XMMBASE, XMMMASK(15), "mm15" )

REGDEF(XMM16, 16+XMMBASE, XMMMASK(16), "mm16" )
REGDEF(XMM17, 17+XMMBASE, XMMMASK(17), "mm17" )
REGDEF(XMM18, 18+XMMBASE, XMMMASK(18), "mm18" )
REGDEF(XMM19, 19+XMMBASE, XMMMASK(19), "mm19" )
REGDEF(XMM20, 20+XMMBASE, XMMMASK(20), "mm20" )
REGDEF(XMM21, 21+XMMBASE, XMMMASK(21), "mm21" )
REGDEF(XMM22, 22+XMMBASE, XMMMASK(22), "mm22" )
REGDEF(XMM23, 23+XMMBASE, XMMMASK(23), "mm23" )

REGDEF(XMM24, 24+XMMBASE, XMMMASK(24), "mm24" )
REGDEF(XMM25, 25+XMMBASE, XMMMASK(25), "mm25" )
REGDEF(XMM26, 26+XMMBASE, XMMMASK(26), "mm26" )
REGDEF(XMM27, 27+XMMBASE, XMMMASK(27), "mm27" )
REGDEF(XMM28, 28+XMMBASE, XMMMASK(28), "mm28" )
REGDEF(XMM29, 29+XMMBASE, XMMMASK(29), "mm29" )
REGDEF(XMM30, 30+XMMBASE, XMMMASK(30), "mm30" )
REGDEF(XMM31, 31+XMMBASE, XMMMASK(31), "mm31" )
REGDEF(XMM8, 8+XMMBASE, XMMMASK(8), "mm8", 1)
REGDEF(XMM9, 9+XMMBASE, XMMMASK(9), "mm9", 1)
REGDEF(XMM10, 10+XMMBASE, XMMMASK(10), "mm10", 1)
REGDEF(XMM11, 11+XMMBASE, XMMMASK(11), "mm11", 1)
REGDEF(XMM12, 12+XMMBASE, XMMMASK(12), "mm12", 1)
REGDEF(XMM13, 13+XMMBASE, XMMMASK(13), "mm13", 1)
REGDEF(XMM14, 14+XMMBASE, XMMMASK(14), "mm14", 1)
REGDEF(XMM15, 15+XMMBASE, XMMMASK(15), "mm15", 1)

REGDEF(XMM16, 16+XMMBASE, XMMMASK(16), "mm16", 1)
REGDEF(XMM17, 17+XMMBASE, XMMMASK(17), "mm17", 1)
REGDEF(XMM18, 18+XMMBASE, XMMMASK(18), "mm18", 1)
REGDEF(XMM19, 19+XMMBASE, XMMMASK(19), "mm19", 1)
REGDEF(XMM20, 20+XMMBASE, XMMMASK(20), "mm20", 1)
REGDEF(XMM21, 21+XMMBASE, XMMMASK(21), "mm21", 1)
REGDEF(XMM22, 22+XMMBASE, XMMMASK(22), "mm22", 1)
REGDEF(XMM23, 23+XMMBASE, XMMMASK(23), "mm23", 1)

REGDEF(XMM24, 24+XMMBASE, XMMMASK(24), "mm24", 1)
REGDEF(XMM25, 25+XMMBASE, XMMMASK(25), "mm25", 1)
REGDEF(XMM26, 26+XMMBASE, XMMMASK(26), "mm26", 1)
REGDEF(XMM27, 27+XMMBASE, XMMMASK(27), "mm27", 1)
REGDEF(XMM28, 28+XMMBASE, XMMMASK(28), "mm28", 1)
REGDEF(XMM29, 29+XMMBASE, XMMMASK(29), "mm29", 1)
REGDEF(XMM30, 30+XMMBASE, XMMMASK(30), "mm30", 1)
REGDEF(XMM31, 31+XMMBASE, XMMMASK(31), "mm31", 1)

#endif // !TARGET_AMD64

REGDEF(K0, 0+KBASE, KMASK(0), "k0" )
REGDEF(K1, 1+KBASE, KMASK(1), "k1" )
REGDEF(K2, 2+KBASE, KMASK(2), "k2" )
REGDEF(K3, 3+KBASE, KMASK(3), "k3" )
REGDEF(K4, 4+KBASE, KMASK(4), "k4" )
REGDEF(K5, 5+KBASE, KMASK(5), "k5" )
REGDEF(K6, 6+KBASE, KMASK(6), "k6" )
REGDEF(K7, 7+KBASE, KMASK(7), "k7" )
REGDEF(K0, 0+KBASE, KMASK(0), "k0", 2)
REGDEF(K1, 1+KBASE, KMASK(1), "k1", 2)
REGDEF(K2, 2+KBASE, KMASK(2), "k2", 2)
REGDEF(K3, 3+KBASE, KMASK(3), "k3", 2)
REGDEF(K4, 4+KBASE, KMASK(4), "k4", 2)
REGDEF(K5, 5+KBASE, KMASK(5), "k5", 2)
REGDEF(K6, 6+KBASE, KMASK(6), "k6", 2)
REGDEF(K7, 7+KBASE, KMASK(7), "k7", 2)

REGDEF(STK, 8+KBASE, 0x0000, "STK" )
REGDEF(STK, 8+KBASE, 0x0000, "STK", 3)

#elif defined(TARGET_ARM)
#include "registerarm.h"
Expand Down
100 changes: 50 additions & 50 deletions src/coreclr/jit/registerarm.h
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Original file line number Diff line number Diff line change
Expand Up @@ -13,59 +13,59 @@
#endif

/*
REGDEF(name, rnum, mask, sname) */
REGDEF(R0, 0, 0x0001, "r0" )
REGDEF(R1, 1, 0x0002, "r1" )
REGDEF(R2, 2, 0x0004, "r2" )
REGDEF(R3, 3, 0x0008, "r3" )
REGDEF(R4, 4, 0x0010, "r4" )
REGDEF(R5, 5, 0x0020, "r5" )
REGDEF(R6, 6, 0x0040, "r6" )
REGDEF(R7, 7, 0x0080, "r7" )
REGDEF(R8, 8, 0x0100, "r8" )
REGDEF(R9, 9, 0x0200, "r9" )
REGDEF(R10, 10, 0x0400, "r10" )
REGDEF(R11, 11, 0x0800, "r11" )
REGDEF(R12, 12, 0x1000, "r12" )
REGDEF(SP, 13, 0x2000, "sp" )
REGDEF(LR, 14, 0x4000, "lr" )
REGDEF(PC, 15, 0x8000, "pc" )
REGDEF(name, rnum, mask, sname, regTypeTag) */
REGDEF(R0, 0, 0x0001, "r0", 0)
REGDEF(R1, 1, 0x0002, "r1", 0)
REGDEF(R2, 2, 0x0004, "r2", 0)
REGDEF(R3, 3, 0x0008, "r3", 0)
REGDEF(R4, 4, 0x0010, "r4", 0)
REGDEF(R5, 5, 0x0020, "r5", 0)
REGDEF(R6, 6, 0x0040, "r6", 0)
REGDEF(R7, 7, 0x0080, "r7", 0)
REGDEF(R8, 8, 0x0100, "r8", 0)
REGDEF(R9, 9, 0x0200, "r9", 0)
REGDEF(R10, 10, 0x0400, "r10",0)
REGDEF(R11, 11, 0x0800, "r11",0)
REGDEF(R12, 12, 0x1000, "r12",0)
REGDEF(SP, 13, 0x2000, "sp", 0)
REGDEF(LR, 14, 0x4000, "lr", 0)
REGDEF(PC, 15, 0x8000, "pc", 0)

#define FPBASE 16
#define VFPMASK(x) (((int64_t)1) << (x+FPBASE))

REGDEF(F0, 0+FPBASE, VFPMASK(0), "f0")
REGDEF(F1, 1+FPBASE, VFPMASK(1), "f1")
REGDEF(F2, 2+FPBASE, VFPMASK(2), "f2")
REGDEF(F3, 3+FPBASE, VFPMASK(3), "f3")
REGDEF(F4, 4+FPBASE, VFPMASK(4), "f4")
REGDEF(F5, 5+FPBASE, VFPMASK(5), "f5")
REGDEF(F6, 6+FPBASE, VFPMASK(6), "f6")
REGDEF(F7, 7+FPBASE, VFPMASK(7), "f7")
REGDEF(F8, 8+FPBASE, VFPMASK(8), "f8")
REGDEF(F9, 9+FPBASE, VFPMASK(9), "f9")
REGDEF(F10, 10+FPBASE, VFPMASK(10), "f10")
REGDEF(F11, 11+FPBASE, VFPMASK(11), "f11")
REGDEF(F12, 12+FPBASE, VFPMASK(12), "f12")
REGDEF(F13, 13+FPBASE, VFPMASK(13), "f13")
REGDEF(F14, 14+FPBASE, VFPMASK(14), "f14")
REGDEF(F15, 15+FPBASE, VFPMASK(15), "f15")
REGDEF(F16, 16+FPBASE, VFPMASK(16), "f16")
REGDEF(F17, 17+FPBASE, VFPMASK(17), "f17")
REGDEF(F18, 18+FPBASE, VFPMASK(18), "f18")
REGDEF(F19, 19+FPBASE, VFPMASK(19), "f19")
REGDEF(F20, 20+FPBASE, VFPMASK(20), "f20")
REGDEF(F21, 21+FPBASE, VFPMASK(21), "f21")
REGDEF(F22, 22+FPBASE, VFPMASK(22), "f22")
REGDEF(F23, 23+FPBASE, VFPMASK(23), "f23")
REGDEF(F24, 24+FPBASE, VFPMASK(24), "f24")
REGDEF(F25, 25+FPBASE, VFPMASK(25), "f25")
REGDEF(F26, 26+FPBASE, VFPMASK(26), "f26")
REGDEF(F27, 27+FPBASE, VFPMASK(27), "f27")
REGDEF(F28, 28+FPBASE, VFPMASK(28), "f28")
REGDEF(F29, 29+FPBASE, VFPMASK(29), "f29")
REGDEF(F30, 30+FPBASE, VFPMASK(30), "f30")
REGDEF(F31, 31+FPBASE, VFPMASK(31), "f31")
REGDEF(F0, 0+FPBASE, VFPMASK(0), "f0", 1)
REGDEF(F1, 1+FPBASE, VFPMASK(1), "f1", 1)
REGDEF(F2, 2+FPBASE, VFPMASK(2), "f2", 1)
REGDEF(F3, 3+FPBASE, VFPMASK(3), "f3", 1)
REGDEF(F4, 4+FPBASE, VFPMASK(4), "f4", 1)
REGDEF(F5, 5+FPBASE, VFPMASK(5), "f5", 1)
REGDEF(F6, 6+FPBASE, VFPMASK(6), "f6", 1)
REGDEF(F7, 7+FPBASE, VFPMASK(7), "f7", 1)
REGDEF(F8, 8+FPBASE, VFPMASK(8), "f8", 1)
REGDEF(F9, 9+FPBASE, VFPMASK(9), "f9", 1)
REGDEF(F10, 10+FPBASE, VFPMASK(10), "f10", 1)
REGDEF(F11, 11+FPBASE, VFPMASK(11), "f11", 1)
REGDEF(F12, 12+FPBASE, VFPMASK(12), "f12", 1)
REGDEF(F13, 13+FPBASE, VFPMASK(13), "f13", 1)
REGDEF(F14, 14+FPBASE, VFPMASK(14), "f14", 1)
REGDEF(F15, 15+FPBASE, VFPMASK(15), "f15", 1)
REGDEF(F16, 16+FPBASE, VFPMASK(16), "f16", 1)
REGDEF(F17, 17+FPBASE, VFPMASK(17), "f17", 1)
REGDEF(F18, 18+FPBASE, VFPMASK(18), "f18", 1)
REGDEF(F19, 19+FPBASE, VFPMASK(19), "f19", 1)
REGDEF(F20, 20+FPBASE, VFPMASK(20), "f20", 1)
REGDEF(F21, 21+FPBASE, VFPMASK(21), "f21", 1)
REGDEF(F22, 22+FPBASE, VFPMASK(22), "f22", 1)
REGDEF(F23, 23+FPBASE, VFPMASK(23), "f23", 1)
REGDEF(F24, 24+FPBASE, VFPMASK(24), "f24", 1)
REGDEF(F25, 25+FPBASE, VFPMASK(25), "f25", 1)
REGDEF(F26, 26+FPBASE, VFPMASK(26), "f26", 1)
REGDEF(F27, 27+FPBASE, VFPMASK(27), "f27", 1)
REGDEF(F28, 28+FPBASE, VFPMASK(28), "f28", 1)
REGDEF(F29, 29+FPBASE, VFPMASK(29), "f29", 1)
REGDEF(F30, 30+FPBASE, VFPMASK(30), "f30", 1)
REGDEF(F31, 31+FPBASE, VFPMASK(31), "f31", 1)


// Allow us to call R11/FP, SP, LR and PC by their register number names
Expand All @@ -75,7 +75,7 @@ REGALIAS(R14, LR)
REGALIAS(R15, PC)

// This must be last!
REGDEF(STK, 32+FPBASE, 0x0000, "STK")
REGDEF(STK, 32+FPBASE, 0x0000, "STK", 2)

/*****************************************************************************/
#undef REGDEF
Expand Down
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