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[linux-6.6.y] x86/mce: Add Centaur MCA support #254

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merged 1 commit into from
Jun 14, 2024

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leoliu-oc
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zhaoxin inclusion
category: feature


Add MCA support for some Zhaoxin CPUs which use X86_VENDOR_CENTAUR as vendor ID.

zhaoxin inclusion
category: feature

-------------------
Add MCA support for some Zhaoxin CPUs which use X86_VENDOR_CENTAUR
as vendor ID.

Signed-off-by: leoliu-oc <[email protected]>
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Hi @leoliu-oc. Thanks for your PR.

I'm waiting for a deepin-community member to verify that this patch is reasonable to test. If it is, they should reply with /ok-to-test on its own line. Until that is done, I will not automatically test new commits in this PR, but the usual testing commands by org members will still work. Regular contributors should join the org to skip this step.

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opsiff commented Jun 12, 2024

/ok-to-test

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opsiff commented Jun 14, 2024

/ok-to-test

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opsiff commented Jun 14, 2024

/lgtm

@opsiff opsiff merged commit 78c153a into deepin-community:linux-6.6.y Jun 14, 2024
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deepin pr auto review

关键摘要:

  • mce_usable_address函数中,新增的boot_cpu_data.x86_vendor != X86_VENDOR_CENTAUR条件可能不会按预期工作,因为X86_VENDOR_CENTAURinclude/linux/compiler.h中定义为__linux_cpu_vendor_unknown,这意味着它实际上是一个未知的处理器 vendor。如果X86_VENDOR_CENTAUR是一个有效的 vendor 值,那么这个条件应该被移除或者重新定义。
  • mce_is_memory_error函数中,新增的boot_cpu_data.x86_vendor != X86_VENDOR_CENTAUR条件同样可能存在问题,因为X86_VENDOR_CENTAUR的定义方式与X86_VENDOR_ZHAOXIN相似,都是通过__linux_cpu_vendor_unknown来表示未知的 vendor。
  • do_machine_check函数中,新增的m.cpuvendor == X86_VENDOR_CENTAUR || m.cpuvendor == X86_VENDOR_ZHAOXIN条件与m.cpuvendor == X86_VENDOR_INTEL条件重复,这可能是一个错误,应该检查是否需要保留这个条件。
  • __mcheck_cpu_apply_quirks函数中,新增的c->x86_vendor == X86_VENDOR_CENTAUR || c->x86_vendor == X86_VENDOR_ZHAOXIN条件与c->x86_vendor == X86_VENDOR_INTEL条件重复,这同样可能是一个错误,应该检查是否需要保留这个条件。
  • __mcheck_cpu_clear_vendor函数中,新增的case X86_VENDOR_CENTAUR:条件与case X86_VENDOR_ZHAOXIN:条件重复,这同样可能是一个错误,应该检查是否需要保留这个条件。
  • vendor_disable_error_reporting函数中,新增的boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR || boot_cpu_data.x86_vendor == X86_VENDOR_ZHAOXIN条件与boot_cpu_data.x86_vendor == X86_VENDOR_INTEL条件重复,这同样可能是一个错误,应该检查是否需要保留这个条件。

是否建议立即修改:

MingcongBai pushed a commit to MingcongBai/deepin-kernel that referenced this pull request Jun 17, 2024
… rules

[ Upstream commit 16d66a4 ]

rx_create no longer allocates a modify_hdr instance that needs to be
cleaned up. The mlx5_modify_header_dealloc call will lead to a NULL pointer
dereference. A leak in the rules also previously occurred since there are
now two rules populated related to status.

  BUG: kernel NULL pointer dereference, address: 0000000000000000
  #PF: supervisor read access in kernel mode
  #PF: error_code(0x0000) - not-present page
  PGD 109907067 P4D 109907067 PUD 116890067 PMD 0
  Oops: 0000 [deepin-community#1] SMP
  CPU: 1 PID: 484 Comm: ip Not tainted 6.9.0-rc2-rrameshbabu+ deepin-community#254
  Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS Arch Linux 1.16.3-1-1 04/01/2014
  RIP: 0010:mlx5_modify_header_dealloc+0xd/0x70
  <snip>
  Call Trace:
   <TASK>
   ? show_regs+0x60/0x70
   ? __die+0x24/0x70
   ? page_fault_oops+0x15f/0x430
   ? free_to_partial_list.constprop.0+0x79/0x150
   ? do_user_addr_fault+0x2c9/0x5c0
   ? exc_page_fault+0x63/0x110
   ? asm_exc_page_fault+0x27/0x30
   ? mlx5_modify_header_dealloc+0xd/0x70
   rx_create+0x374/0x590
   rx_add_rule+0x3ad/0x500
   ? rx_add_rule+0x3ad/0x500
   ? mlx5_cmd_exec+0x2c/0x40
   ? mlx5_create_ipsec_obj+0xd6/0x200
   mlx5e_accel_ipsec_fs_add_rule+0x31/0xf0
   mlx5e_xfrm_add_state+0x426/0xc00
  <snip>

Fixes: 94af50c ("net/mlx5e: Unify esw and normal IPsec status table creation/destruction")
Signed-off-by: Rahul Rameshbabu <[email protected]>
Signed-off-by: Tariq Toukan <[email protected]>
Reviewed-by: Simon Horman <[email protected]>
Signed-off-by: David S. Miller <[email protected]>
Signed-off-by: Sasha Levin <[email protected]>
Avenger-285714 pushed a commit to Avenger-285714/DeepinKernel that referenced this pull request Jun 21, 2024
… rules

[ Upstream commit 16d66a4 ]

rx_create no longer allocates a modify_hdr instance that needs to be
cleaned up. The mlx5_modify_header_dealloc call will lead to a NULL pointer
dereference. A leak in the rules also previously occurred since there are
now two rules populated related to status.

  BUG: kernel NULL pointer dereference, address: 0000000000000000
  #PF: supervisor read access in kernel mode
  #PF: error_code(0x0000) - not-present page
  PGD 109907067 P4D 109907067 PUD 116890067 PMD 0
  Oops: 0000 [#1] SMP
  CPU: 1 PID: 484 Comm: ip Not tainted 6.9.0-rc2-rrameshbabu+ deepin-community#254
  Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS Arch Linux 1.16.3-1-1 04/01/2014
  RIP: 0010:mlx5_modify_header_dealloc+0xd/0x70
  <snip>
  Call Trace:
   <TASK>
   ? show_regs+0x60/0x70
   ? __die+0x24/0x70
   ? page_fault_oops+0x15f/0x430
   ? free_to_partial_list.constprop.0+0x79/0x150
   ? do_user_addr_fault+0x2c9/0x5c0
   ? exc_page_fault+0x63/0x110
   ? asm_exc_page_fault+0x27/0x30
   ? mlx5_modify_header_dealloc+0xd/0x70
   rx_create+0x374/0x590
   rx_add_rule+0x3ad/0x500
   ? rx_add_rule+0x3ad/0x500
   ? mlx5_cmd_exec+0x2c/0x40
   ? mlx5_create_ipsec_obj+0xd6/0x200
   mlx5e_accel_ipsec_fs_add_rule+0x31/0xf0
   mlx5e_xfrm_add_state+0x426/0xc00
  <snip>

Fixes: 94af50c ("net/mlx5e: Unify esw and normal IPsec status table creation/destruction")
Signed-off-by: Rahul Rameshbabu <[email protected]>
Signed-off-by: Tariq Toukan <[email protected]>
Reviewed-by: Simon Horman <[email protected]>
Signed-off-by: David S. Miller <[email protected]>
Signed-off-by: Sasha Levin <[email protected]>
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