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Release v1.4: Grid188 decode and runtime synchronization fixes - #2

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davidsyoung merged 1 commit into
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release/v1.4
Jul 16, 2026
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davidsyoung merged 1 commit into
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release/v1.4

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Summary

  • Build v1.4 directly on the immutable public v1.3 image digest.
  • Default-enable the exact M4 heterogeneous W4A16 Grid188 path, with direct128 and serial fail-closed fallbacks.
  • Carry the fixed FC1/FC2 tile geometry through the registered custom-op boundary.
  • Remove recurring MTP/DCP metadata synchronizations and redundant MXFP8 scale initialization.
  • Release warmup-only allocator cache once, retain AOT mode without loading/saving the serialized standalone-AOT function, and reduce avoidable Triton specialization/temp storage.
  • Replace the experiment history in the docs with the current mechanisms and verified benchmark results.

How the optimizations work

Area Change
Hybrid MoE decode One 188-CTA grid executes NVFP4+NF3 FC1, gated SiLU, and weighted FC2 accumulation from global expert IDs. Exact device/resource/tensor admission protects the path.
MTP metadata A CPU-resident optimistic sequence-length bound is propagated through draft-step attention metadata, avoiding a lazy device-to-host length copy.
DCP metadata The constant rank-offset tensor is cached by device/rank instead of rebuilt on CUDA every call.
Dense MXFP8 Scale buffers skip unity initialization immediately before the quantizer overwrites every logical scale used by GEMM.
Runtime lifecycle Unused allocator-cache blocks are released after warmup/capture; AOT stays enabled while standalone serialized-function load/save is bypassed.
Auxiliary kernels Route count remains a runtime Triton argument, and native small-batch filtering uses bounded Triton workspace when available.

The hybrid decode and post-warmup paths are enabled in source and in the image. Explicit 0/false environment overrides remain available for diagnosis; normal operation no longer depends on Compose-only gates.

Benchmarks

Measured on 4× RTX PRO 6000 Blackwell 96 GB, TP4+DCP4, MTP3 probabilistic draft sampling:

  • Exact-32k prefill: 2,128 / 2,128 tok/s, versus the public v1.3 reference of 2,131.
  • Deterministic C1/ctx0, five 60 s cells: median 105.703 client aggregate / 112.153 per-user active-decode tok/s.
  • Stochastic C1/ctx0: 102.895 aggregate / 107.575 per-user tok/s.
  • Stochastic C8 aggregate at 0 / 32k / 64k: 318.535 / 307.744 / 293.774 tok/s.
  • KV pool: 637,440 tokens.

Aggregate and per-user throughput are distinct metrics. Deterministic and stochastic payloads are reported separately, not compared as an A/B. BENCHMARKS.md contains the run-level values and interpretation limits.

Verification

  • Built the final Dockerfile successfully from the pinned public v1.3 digest; all nine overlays passed in-image py_compile.
  • docker compose config -q passed for the final Compose file.
  • Standalone image environment confirmed the three hybrid gates, post-warmup cache release, and the two AOT lifecycle defaults are image-owned and enabled.
  • Repository-wide publication scan found no private/internal naming, hosts, image tags, or artifact paths.

No new regression-test framework is included; the source-equivalent runtime stack is covered by the recorded full-model benchmark evidence, and the PR packaging was verified through the final image build.

@davidsyoung
davidsyoung merged commit cfe43b0 into main Jul 16, 2026
lukealonso added a commit to local-inference-lab/b12x that referenced this pull request Jul 18, 2026
Add a two-tier heterogeneous-quantization mode to the W4A16 fused MoE as
trace-time specialization of the existing kernel instead of a parallel
kernel path:

- emit_tile hook at _run_persistent_gemm's expert-resolution seam and a
  schedule_whole_tiles constexpr mode; every existing config compiles to
  byte-identical objects (verified against a captured baseline matrix).
- W4A16FusedMoeHybridKernel composes two per-tier W4A16FusedMoeKernels and
  dispatches per-route via a global-expert descriptor map (tier<<8|local),
  reusing _moe_body, the grid barrier, activation, and _run_tile unchanged.
- compile_w4a16_fused_moe_hybrid with fail-closed spill admission, a
  graph-safe b12x::w4a16_fused_moe_hybrid_launch op, run_w4a16_moe_hybrid,
  and build_w4a16_tier_local_map.
- _w4a16_fused_persistent_grid_x minimizes the FC1+FC2 whole-tile critical
  path (cap grid beats FC1-right-sizing: 95.9us vs 107.1us at m=4).

GLM-5.2 TP4 shard geometry (64 NVFP4 + 192 NF3, H6144/I512/topk8), graph
replays vs the serial two-launch path: 1.75x at m=4 (167.5 -> 95.9us),
1.98x at m=1. Parity suite covers mixed/single-tier/invalid routes, both
schedules, partial batches; 122 regs/thread, zero local memory.

One-grid schedule and exact-geometry admission concepts derived from the
Grid188 port in PR #36 by voipmonitor (davidsyoung/vllm-glm52#2).

Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01JLscs7Yzm5B6Gxfij72md5
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