cpu: restrict IPI-based TLB flush to multi-proc environments #600
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To accommodate platforms that cannot make use of SVSM interrupts, TLB flushes should avoid attempts to send flush IPIs unless a second CPU is actually started. Signed-off-by: Jon Lange <[email protected]>
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To accommodate platforms that cannot make use of SVSM interrupts, TLB flushes should avoid attempts to send flush IPIs unless a second CPU is actually started.