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Add a shared KV connector and an embedded runtime for single-engine, single-node offloading to MORI-managed host DRAM. Shared connector / base: - Register UMBPStoreConnector and separate scheduler, worker, transfer metadata, runtime contract, and statistics responsibilities. - Plan hash-keyed, cache-group-scoped objects with rank-local identities and logical completeness checks across participating workers. - Integrate external lookup, asynchronous load completion, ranged and partial-prefix transfer plans, and hybrid cache hit-window semantics. - Implement eager stores and free-queue/store-event-driven lazy offload, retaining GPU block ownership until transfer completion. - Track request preemption, cancellation, partial failures, cache resets, eviction events, and transfer metrics through the connector lifecycle. Embedded runtime: - Register GPU KV buffers and use MORI ranged pointer APIs for stores to host DRAM and restores to GPU memory. - Keep DRAM allocation, residency, publication, capacity, and eviction authoritative in MORI rather than maintaining a connector-owned cache. - Configure per-rank or total DRAM capacity, watermarks, NUMA placement, huge pages, prefaulting, shared-memory backing, and bounded execution. - Handle asynchronous lookup and transfer completion, timeouts, retries under DRAM pressure, and per-object errors. - Limit embedded scope to DRAM offloading; standalone and distributed runtimes, cross-engine sharing, and SSD tiers are outside this change. - Keep pipeline parallelism rejected and layer-wise stores disabled until a safe native full-object publication protocol exists. Tests and documentation: - Include shared and embedded unit suites, runtime contracts, MORI GPU range and eviction tests, token-restore integration tests, and a status guide describing configuration, supported scope, and remaining work. - Test coverage does not imply every model or topology case passes. This consolidates the functional snapshot at 264c17e without changing tracked contents. Subsequent simplification and performance work remains a separate commit. History and message changes are verified by exact Git tree equality; no new unit tests, GPU tests, or model evaluations are claimed by this rewrite. AI assistance was used in development and commit-history consolidation. Co-authored-by: Codex <codex@openai.com> Co-authored-by: Cursor Agent <agent@cursor.com> Signed-off-by: CharlesWu <Charles.Wu@amd.com>
Simplify the connector and lifecycle handling, and reduce repeated work in external lookup and batched load preparation. MORI remains authoritative for object residency; no potentially stale hit-state cache is introduced. Shared connector / base: - Remove unused identity and capability scaffolding and consolidate transfer state, completion accounting, and materialization fallbacks. - Preserve lazy free-queue/store-event ownership and all-rank completion; finalize stores exactly once even when a no-forward step skips the normal model-runner save hook. - Reuse request-local lookup identities. Apply the unchanged core KVCacheCoordinator to a read-only per-query hit view instead of allocating, indexing, and freeing shadow cache blocks. - Carry whole-block loads in compact columns with shared request and generation metadata. Preserve rank localization, failure-to-block mapping, byte accounting, and fallbacks for special layouts. - Filter null GPU source blocks before eager residency checks and store plan construction. Valid sources still require authoritative MORI lookup. Embedded runtime: - Keep DRAM-specific option validation and rank-capacity resolution in the adapter, and move the CPU byte-copy fake into test utilities. - Reuse registered per-group layouts to construct batched load addresses directly and consume compact load metadata through native completion. - Retain transfer buffer ownership across timeout and cancellation, and preserve safe teardown and scheduler/worker lookup communication. - Do not change native MORI, model code, kernels, or core cache algorithms. Native scoped write admission remains unimplemented. Add precise annotations, avoid conflicting local variable types, use monkeypatch for test method replacement, and test metadata serialization through vLLM Msgpack rather than a direct pickle import. Historical validation of the GPU-tested snapshot before lint cleanup, using MI355X hardware, a pinned ROCm development image, and real weights: - Unit and runtime contracts: 208 passed, 1 skipped. The skipped case requires four visible GPUs for TP2/PP2. - Differential checks: 206 passed, including 1,600 changing-residency windows. This overlaps the unit suite; unsupported DCP+SWA cases are rejection tests, not evidence of support. - Llama-3.2-1B TP1 eager, lazy, synchronous lookup, and TP2: actual external restore; identical 32 decoded tokens, text, and finish reason; chosen-logprob error below 0.02; clean engine exits. - GPT-OSS C8/C32: 240 replay requests with external hits and no failed load. - Same-GPU GPT-OSS eager restore without diagnostic hooks, 20 replays per aggregate: baseline 25.8554 ms, candidate 24.2346 ms, Simple 18.1520 ms. Each candidate replay restores 10,000 tokens, 633 objects, and 248,905,728 bytes. This is not the full serving test plan or a claim of Simple parity. Historical validation after lint cleanup, on the committed source tree: - Combined unit, contract, and differential suites: 252 passed, 5 GPU-required tests skipped; run without GPU device access. - Pre-commit checks, including mypy 3.10 and forbidden imports, passed; the manual mypy 3.12 hook passed. Only Actionlint was skipped because an unrelated Go dependency download failed TLS certificate verification. This change does not modify workflow files. - The preceding GPU and performance results describe the pre-lint snapshot, not a post-lint rerun of those same cases. Known limitation: strict GPT-OSS cold/replay numerical checks still fail the unchanged 0.02 logprob tolerance. Simple and old UMBP controls also fail, but the cause is unresolved and an additional regression is not ruled out. A diagnostic verifies identical stored/restored bytes for all 39 objects (15,335,424 bytes); added HIP synchronization means it does not prove uninstrumented async ordering or strict output equivalence. This preserves the tracked tree and optimization diff of 954d661. History and message changes are verified by exact Git tree equality; the validation above is historical, not a new test run performed for this rewrite. Co-authored-by: Codex <codex@openai.com> Signed-off-by: CharlesWu <Charles.Wu@amd.com>
Use committed core boundary handoffs for align-mode recurrent state and complete asynchronous loads before state/indexer execution. Keep block mappings current and report hybrid load failures at request granularity. The boundary and failure changes adapt the relevant parts of upstream commit 2d2615a. Canonicalize uniform-type groups for scheduler/worker lookup namespaces and transfer each layer's own page size rather than the aggregate group size. Preserve group IDs when filtering recurrent pages from store plans. Validation: 213 CPU tests passed with one GPU-only skip; grouped namespace and restored-state regressions also pass. Real Qwen TP4 external loads work; longer-context model numerical validation is tracked separately. Co-authored-by: Yichao Zhu <Yichao.Zhu@amd.com> Co-authored-by: OpenAI Codex <noreply@openai.com> Signed-off-by: tjtanaa <tunjian.tan@embeddedllm.com>
Allow UMBP in the AMD Qwen4Exp QSA path and reject other connectors or partial-hash restores that cannot reconstruct the raw-key ring safely. Document the grouped attention, compressed-key, GDN and PLE state contract, the pinned MoRI build, and the required Triton MoE fallback on the tested ROCm image. Add real-weight TP4 retrieval regressions for eager and lazy offload at 1025, 4099 and 8193 prompt tokens. Prove actual external loads after GPU cache pressure/reset, exact cold/native/restored tokens and expected answers, bounded log probabilities, and connector reset recomputation. Use cacheable pressure prompts and wait for asynchronous store pins to drain before cache reset. Validation on MI355X: 213 CPU tests passed (one GPU-only skip), 16 GPU transfer/state/QSA tests passed, both real-model modes passed, and pre-commit passed. Repetitive long-prompt native-prefix numerical variance and the AITER MoE warmup failure are retained as documented limitations. Co-authored-by: OpenAI Codex <noreply@openai.com> Signed-off-by: tjtanaa <tunjian.tan@embeddedllm.com>
Apply transfer deadlines to embedded loads as well as stores. A running native transfer that exceeds its deadline fails the engine step without completing its job or releasing registered destination buffers. Shutdown joins native work before deregistration; only completed backend errors report safe request failures for scheduler recomputation. Cover bulk/range load timeouts, cancellation and shutdown ownership, completed backend timeout failures, and hybrid scheduler retry from zero. Co-authored-by: OpenAI Codex <noreply@openai.com> Signed-off-by: tjtanaa <tunjian.tan@embeddedllm.com>
Require successful fresh stores and a second external restore after connector reset, with matched native-prefix output and per-stage transfer health checks for eager and lazy offload. Bundle the pinned MoRI no-master clear acknowledgment repair and document its source tree, reproduction steps, and Qwen backend accuracy limits. Co-authored-by: Codex <noreply@openai.com> Signed-off-by: tjtanaa <tunjian.tan@embeddedllm.com>
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Overview
Enable AMD Qwen3.8-Flash-Next hybrid-cache restoration with
UMBPStoreConnector, building on the embedded UMBP runtime in vllm-project#58568. This supports embedded DRAM offload without adding a new model implementation.Claims
Validation
Local validation on MI355X, TP4 BF16, Triton MoE and
FULL_DECODE_ONLY, using vLLMf05f7a22and repaired MoRIcd9772b5. Prefill runs eagerly.NIAH uses five lengths, five needle depths and two cases per cell, with a pinned Paul Graham corpus and adapted RULER generator. These are focused retrieval results, not broad model-accuracy or performance claims. Graph-restored requests exercised batch size 1.
Earlier runtime validation at
e4314a19: 239 CPU tests passed with one GPU-only skip, plus 16 focused GPU tests. These suites are historical coverage, not claimed as a fresh full-suite run at the final HEAD. Final changed-file hooks passed.Details
The base runtime can disagree on grouped cache keys and transfer sizes, or restore recurrent state after input preparation. The change reuses existing cache specifications and committed boundary hand-offs, updates block mappings, and forces asynchronous loads for hybrid caches.
The validated request flow is:
Full-block QSA boundaries allow the non-prefix-cacheable raw-key scratch ring to rebuild. Timed-out native loads retain destination ownership and fail the engine; this is not cancellable/recoverable I/O. Permanent native stalls still require process/container supervision.
Requires the separate MoRI no-master clear-acknowledgment fix: otherwise reset succeeds but later stores remain blocked by
CLEAR_PENDING. Build instructions and the portable patch are tracked indocs/features/umbp_embedded_dram.mdandtools/umbp/mori-no-master-reset.patch. Selected hybrid work is adapted from vllm-project#59275 commit2d2615af.Limits: text-only embedded DRAM, TP4 and full-block restores. Production QSA ordering is unchanged and repetitive-prompt numerical variability remains. TP8+AITER fails weight preparation even without UMBP. Prefill graphs, broader concurrent correctness, speculative decoding, multimodal and distributed-runtime configurations are not qualified. No speedup claim.
AI assistance was used for implementation, validation and this description. Human review remains required.
Pull Request Checklist
I used vLLM's
/pr-checklistskill. (Mandatory for agents, optional for humans).AI assistance was used during the creation of this PR.
Design Fit: Minimizes impact on core components, reuses existing functionality, and justifies added complexity.
Testing and Validation: Validates the change and ensures any added tests are meaningful and reliable, with CI coverage or documented CI resource constraints and validation performed outside CI.
Code Quality and Style: Keeps code and comments clear and concise, and updates relevant documentation and examples.
Pull Request Contents: Includes a brief summary and relevant links, supports claims with evidence, explains root causes and implementation trade-offs, and follows the contributing guide.
BEFORE SUBMITTING, PLEASE READ https://docs.vllm.ai/en/latest/contributing (anything written below this line will be removed by GitHub Actions)