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The "Practice60" Board, Blue Pill powered (qmk#4407)
* Starting point for blue pill based practice60 * Changes * add * try raw bin no botloader * swap back to bootloader version * edit * Remove debug LED flash * Disable JTAG to open up B3 and B4 * Add led backlight support (no breathing yet) * Update matrix for correctness * RGB Underglow working in a very simple state * not as bright * Move to handwired * revert ChibiOS_Test changes * Changes based on PR comments * Address PR comments v2 * Move files
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keyboards/handwired/practice60/boards/GENERIC_STM32_F103/board.c
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/* | ||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio | ||
Licensed under the Apache License, Version 2.0 (the "License"); | ||
you may not use this file except in compliance with the License. | ||
You may obtain a copy of the License at | ||
http://www.apache.org/licenses/LICENSE-2.0 | ||
Unless required by applicable law or agreed to in writing, software | ||
distributed under the License is distributed on an "AS IS" BASIS, | ||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
See the License for the specific language governing permissions and | ||
limitations under the License. | ||
*/ | ||
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#include "hal.h" | ||
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// Value to place in RTC backup register 10 for persistent bootloader mode | ||
#define RTC_BOOTLOADER_FLAG 0x424C | ||
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/** | ||
* @brief PAL setup. | ||
* @details Digital I/O ports static configuration as defined in @p board.h. | ||
* This variable is used by the HAL when initializing the PAL driver. | ||
*/ | ||
#if HAL_USE_PAL || defined(__DOXYGEN__) | ||
const PALConfig pal_default_config = | ||
{ | ||
{VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH}, | ||
{VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH}, | ||
{VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH}, | ||
{VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH}, | ||
{VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH}, | ||
}; | ||
#endif | ||
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/* | ||
* Early initialization code. | ||
* This initialization must be performed just after stack setup and before | ||
* any other initialization. | ||
*/ | ||
void __early_init(void) { | ||
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stm32_clock_init(); | ||
} | ||
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/* | ||
* Board-specific initialization code. | ||
*/ | ||
void boardInit(void) { | ||
//JTAG-DP Disabled and SW-DP Enabled | ||
AFIO->MAPR |= AFIO_MAPR_SWJ_CFG_JTAGDISABLE; | ||
//Set backup register DR10 to enter bootloader on reset | ||
BKP->DR10 = RTC_BOOTLOADER_FLAG; | ||
} |
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keyboards/handwired/practice60/boards/GENERIC_STM32_F103/board.h
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/* | ||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio | ||
Licensed under the Apache License, Version 2.0 (the "License"); | ||
you may not use this file except in compliance with the License. | ||
You may obtain a copy of the License at | ||
http://www.apache.org/licenses/LICENSE-2.0 | ||
Unless required by applicable law or agreed to in writing, software | ||
distributed under the License is distributed on an "AS IS" BASIS, | ||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
See the License for the specific language governing permissions and | ||
limitations under the License. | ||
*/ | ||
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#ifndef _BOARD_H_ | ||
#define _BOARD_H_ | ||
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/* | ||
* Setup for a Generic STM32F103 board. | ||
*/ | ||
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/* | ||
* Board identifier. | ||
*/ | ||
#define BOARD_GENERIC_STM32_F103 | ||
#define BOARD_NAME "Generic STM32F103x board" | ||
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/* | ||
* Board frequencies. | ||
*/ | ||
#define STM32_LSECLK 32768 | ||
#define STM32_HSECLK 8000000 | ||
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/* | ||
* MCU type, supported types are defined in ./os/hal/platforms/hal_lld.h. | ||
*/ | ||
#define STM32F103xB | ||
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/* | ||
* IO pins assignments | ||
*/ | ||
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/* on-board */ | ||
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#define GPIOA_LED 8 | ||
#define GPIOD_OSC_IN 0 | ||
#define GPIOD_OSC_OUT 1 | ||
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/* In case your board has a "USB enable" hardware | ||
controlled by a pin, define it here. (It could be just | ||
a 1.5k resistor connected to D+ line.) | ||
*/ | ||
/* | ||
#define GPIOB_USB_DISC 10 | ||
*/ | ||
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/* | ||
* I/O ports initial setup, this configuration is established soon after reset | ||
* in the initialization code. | ||
* | ||
* The digits have the following meaning: | ||
* 0 - Analog input. | ||
* 1 - Push Pull output 10MHz. | ||
* 2 - Push Pull output 2MHz. | ||
* 3 - Push Pull output 50MHz. | ||
* 4 - Digital input. | ||
* 5 - Open Drain output 10MHz. | ||
* 6 - Open Drain output 2MHz. | ||
* 7 - Open Drain output 50MHz. | ||
* 8 - Digital input with PullUp or PullDown resistor depending on ODR. | ||
* 9 - Alternate Push Pull output 10MHz. | ||
* A - Alternate Push Pull output 2MHz. | ||
* B - Alternate Push Pull output 50MHz. | ||
* C - Reserved. | ||
* D - Alternate Open Drain output 10MHz. | ||
* E - Alternate Open Drain output 2MHz. | ||
* F - Alternate Open Drain output 50MHz. | ||
* Please refer to the STM32 Reference Manual for details. | ||
*/ | ||
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/* | ||
* Port A setup. | ||
* Everything input with pull-up except: | ||
* PA2 - Alternate output (USART2 TX). | ||
* PA3 - Normal input (USART2 RX). | ||
* PA9 - Alternate output (USART1 TX). | ||
* PA10 - Normal input (USART1 RX). | ||
*/ | ||
#define VAL_GPIOACRL 0x88884B88 /* PA7...PA0 */ | ||
#define VAL_GPIOACRH 0x888884B8 /* PA15...PA8 */ | ||
#define VAL_GPIOAODR 0xFFFFFFFF | ||
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/* | ||
* Port B setup. | ||
* Everything input with pull-up except: | ||
* PB10 - Push Pull output (USB switch). | ||
*/ | ||
#define VAL_GPIOBCRL 0x88888888 /* PB7...PB0 */ | ||
#define VAL_GPIOBCRH 0x88888388 /* PB15...PB8 */ | ||
#define VAL_GPIOBODR 0xFFFFFFFF | ||
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/* | ||
* Port C setup. | ||
* Everything input with pull-up except: | ||
* PC13 - Push Pull output (LED). | ||
*/ | ||
#define VAL_GPIOCCRL 0x88888888 /* PC7...PC0 */ | ||
#define VAL_GPIOCCRH 0x88388888 /* PC15...PC8 */ | ||
#define VAL_GPIOCODR 0xFFFFFFFF | ||
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/* | ||
* Port D setup. | ||
* Everything input with pull-up except: | ||
* PD0 - Normal input (XTAL). | ||
* PD1 - Normal input (XTAL). | ||
*/ | ||
#define VAL_GPIODCRL 0x88888844 /* PD7...PD0 */ | ||
#define VAL_GPIODCRH 0x88888888 /* PD15...PD8 */ | ||
#define VAL_GPIODODR 0xFFFFFFFF | ||
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/* | ||
* Port E setup. | ||
* Everything input with pull-up except: | ||
*/ | ||
#define VAL_GPIOECRL 0x88888888 /* PE7...PE0 */ | ||
#define VAL_GPIOECRH 0x88888888 /* PE15...PE8 */ | ||
#define VAL_GPIOEODR 0xFFFFFFFF | ||
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/* | ||
* USB bus activation macro, required by the USB driver. | ||
*/ | ||
/* The point is that most of the generic STM32F103* boards | ||
have a 1.5k resistor connected on one end to the D+ line | ||
and on the other end to some pin. Or even a slightly more | ||
complicated "USB enable" circuit, controlled by a pin. | ||
That should go here. | ||
However on some boards (e.g. one that I have), there's no | ||
such hardware. In which case it's better to not do anything. | ||
*/ | ||
/* | ||
#define usb_lld_connect_bus(usbp) palClearPad(GPIOB, GPIOB_USB_DISC) | ||
*/ | ||
#define usb_lld_connect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_INPUT); | ||
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/* | ||
* USB bus de-activation macro, required by the USB driver. | ||
*/ | ||
/* | ||
#define usb_lld_disconnect_bus(usbp) palSetPad(GPIOB, GPIOB_USB_DISC) | ||
*/ | ||
#define usb_lld_disconnect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_OUTPUT_PUSHPULL); palClearPad(GPIOA, 12); | ||
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#if !defined(_FROM_ASM_) | ||
#ifdef __cplusplus | ||
extern "C" { | ||
#endif | ||
void boardInit(void); | ||
#ifdef __cplusplus | ||
} | ||
#endif | ||
#endif /* _FROM_ASM_ */ | ||
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#endif /* _BOARD_H_ */ |
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keyboards/handwired/practice60/boards/GENERIC_STM32_F103/board.mk
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# List of all the board related files. | ||
BOARDSRC = $(BOARD_PATH)/boards/GENERIC_STM32_F103/board.c | ||
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# Required include directories | ||
BOARDINC = $(BOARD_PATH)/boards/GENERIC_STM32_F103 |
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/* Address for jumping to bootloader on STM32 chips. */ | ||
/* It is chip dependent, the correct number can be looked up here (page 175): | ||
* http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf | ||
* This also requires a patch to chibios: | ||
* <tmk_dir>/tmk_core/tool/chibios/ch-bootloader-jump.patch | ||
*/ | ||
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// STM32F103* does NOT have an USB bootloader in ROM (only serial), | ||
// so setting anything here does not make much sense | ||
// #define STM32_BOOTLOADER_ADDRESS 0x1FFFC800 |
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