Add Alpha architecture

CMakeLists.txt

@@ -45,8 +45,8 @@ option(CAPSTONE_ARCHITECTURE_DEFAULT "Whether architectures are enabled by defau
 option(CAPSTONE_DEBUG "Whether to enable extra debug assertions" OFF)
 option(CAPSTONE_INSTALL "Generate install target" ${PROJECT_IS_TOP_LEVEL})
 
-set(SUPPORTED_ARCHITECTURES ARM AARCH64 M68K MIPS PPC SPARC SYSZ XCORE X86 TMS320C64X M680X EVM MOS65XX WASM BPF RISCV SH TRICORE)
-set(SUPPORTED_ARCHITECTURE_LABELS ARM AARCH64 M68K MIPS PowerPC Sparc SystemZ XCore x86 TMS320C64x M680x EVM MOS65XX WASM BPF RISCV SH TriCore)
+set(SUPPORTED_ARCHITECTURES ARM AARCH64 M68K MIPS PPC SPARC SYSZ XCORE X86 TMS320C64X M680X EVM MOS65XX WASM BPF RISCV SH TRICORE ALPHA)
+set(SUPPORTED_ARCHITECTURE_LABELS ARM AARCH64 M68K MIPS PowerPC Sparc SystemZ XCore x86 TMS320C64x M680x EVM MOS65XX WASM BPF RISCV SH TriCore Alpha)
 
 list(LENGTH SUPPORTED_ARCHITECTURES count)
 math(EXPR count "${count}-1")
@@ -145,6 +145,7 @@ set(HEADERS_COMMON
     include/capstone/tricore.h
     include/capstone/platform.h
     include/capstone/sh.h
+    include/capstone/alpha.h
 )
 
 set(TEST_SOURCES test_basic.c test_detail.c test_skipdata.c test_iter.c)
@@ -569,6 +570,30 @@ if (CAPSTONE_TRICORE_SUPPORT)
     set(TEST_SOURCES ${TEST_SOURCES} test_tricore.c)
 endif ()
 
+if (CAPSTONE_ALPHA_SUPPORT)
+    add_definitions(-DCAPSTONE_HAS_ALPHA)
+    set(SOURCES_ALPHA
+            arch/Alpha/AlphaDisassembler.c
+            arch/Alpha/AlphaInstPrinter.c
+            arch/Alpha/AlphaMapping.c
+            arch/Alpha/AlphaModule.c
+            )
+    set(HEADERS_ALPHA
+            arch/Alpha/AlphaDisassembler.h
+            arch/Alpha/AlphaGenAsmWriter.inc
+            arch/Alpha/AlphaGenDisassemblerTables.inc
+            arch/Alpha/AlphaGenInstrInfo.inc
+            arch/Alpha/AlphaGenRegisterInfo.inc
+            arch/Alpha/AlphaLinkage.h
+            arch/Alpha/AlphaMapping.h
+            arch/Alpha/AlphaModule.h
+            arch/Alpha/AlphaGenCSMappingInsnOp.inc
+            arch/Alpha/AlphaGenCSMappingInsn.inc
+            arch/Alpha/AlphaGenCSMappingInsnName.inc
+            )
+    set(TEST_SOURCES ${TEST_SOURCES} test_alpha.c)
+endif ()
+
 if (CAPSTONE_OSXKERNEL_SUPPORT)
     add_definitions(-DCAPSTONE_HAS_OSXKERNEL)
 endif()
@@ -593,6 +618,7 @@ set(ALL_SOURCES
     ${SOURCES_RISCV}
     ${SOURCES_SH}
     ${SOURCES_TRICORE}
+    ${SOURCES_ALPHA}
 )
 
 set(ALL_HEADERS
@@ -616,6 +642,7 @@ set(ALL_HEADERS
     ${HEADERS_RISCV}
     ${HEADERS_SH}
     ${HEADERS_TRICORE}
+    ${HEADERS_ALPHA}
 )
 
 ## properties
@@ -679,6 +706,7 @@ source_group("Source\\BPF" FILES ${SOURCES_BPF})
 source_group("Source\\RISCV" FILES ${SOURCES_RISCV})
 source_group("Source\\SH" FILES ${SOURCES_SH})
 source_group("Source\\TriCore" FILES ${SOURCES_TRICORE})
+source_group("Source\\Alpha" FILES ${SOURCES_ALPHA})
 
 source_group("Include\\Common" FILES ${HEADERS_COMMON})
 source_group("Include\\Engine" FILES ${HEADERS_ENGINE})
@@ -700,6 +728,7 @@ source_group("Include\\BPF" FILES ${HEADERS_BPF})
 source_group("Include\\RISCV" FILES ${HEADERS_RISCV})
 source_group("Include\\SH" FILES ${HEADERS_SH})
 source_group("Include\\TriCore" FILES ${HEADERS_TRICORE})
+source_group("Include\\Alpha" FILES ${HEADERS_ALPHA})
 
 ## installation
 if(CAPSTONE_INSTALL)

CREDITS.TXT

@@ -88,3 +88,4 @@ fanfuqiang & citypw & porto703 : RISCV architecture.
 Josh "blacktop" Maine: Arm64 architecture improvements.
 Finn Wilkinson: AArch64 update to Armv9.2-a (SME + SVE2 support)
 Billow & Sidneyp : TriCore architecture.
+Dmitry Sibirtsev: Alpha architecture.

Makefile

@@ -325,12 +325,21 @@ ifneq (,$(findstring tricore,$(CAPSTONE_ARCHS)))
 	LIBOBJ_TRICORE += $(LIBSRC_TRICORE:%.c=$(OBJDIR)/%.o)
 endif
 
+DEP_ALPHA =
+DEP_ALPHA +=$(wildcard arch/Alpha/Alpha*.inc)
+
+LIBOBJ_ALPHA =
+ifneq (,$(findstring alpha,$(CAPSTONE_ARCHS)))
+	CFLAGS += -DCAPSTONE_HAS_ALPHA
+	LIBSRC_ALPHA += $(wildcard arch/Alpha/Alpha*.c)
+	LIBOBJ_ALPHA += $(LIBSRC_ALPHA:%.c=$(OBJDIR)/%.o)
+endif
 
 LIBOBJ =
 LIBOBJ += $(OBJDIR)/cs.o $(OBJDIR)/utils.o $(OBJDIR)/SStream.o $(OBJDIR)/MCInstrDesc.o $(OBJDIR)/MCRegisterInfo.o $(OBJDIR)/MCInst.o $(OBJDIR)/MCInstPrinter.o $(OBJDIR)/Mapping.o
 LIBOBJ += $(LIBOBJ_ARM) $(LIBOBJ_AARCH64) $(LIBOBJ_M68K) $(LIBOBJ_MIPS) $(LIBOBJ_PPC) $(LIBOBJ_RISCV) $(LIBOBJ_SPARC) $(LIBOBJ_SYSZ) $(LIBOBJ_SH)
 LIBOBJ += $(LIBOBJ_X86) $(LIBOBJ_XCORE) $(LIBOBJ_TMS320C64X) $(LIBOBJ_M680X) $(LIBOBJ_EVM) $(LIBOBJ_MOS65XX) $(LIBOBJ_WASM) $(LIBOBJ_BPF)
-LIBOBJ += $(LIBOBJ_TRICORE)
+LIBOBJ += $(LIBOBJ_TRICORE) $(LIBOBJ_ALPHA)
 
 
 ifeq ($(PKG_EXTRA),)
@@ -466,6 +475,7 @@ $(LIBOBJ_WASM): $(DEP_WASM)
 $(LIBOBJ_MOS65XX): $(DEP_MOS65XX)
 $(LIBOBJ_BPF): $(DEP_BPF)
 $(LIBOBJ_TRICORE): $(DEP_TRICORE)
+$(LIBOBJ_ALPHA): $(DEP_ALPHA)
 
 ifeq ($(CAPSTONE_STATIC),yes)
 $(ARCHIVE): $(LIBOBJ)
@@ -552,12 +562,12 @@ dist:
 	git archive --format=zip --prefix=capstone-$(DIST_VERSION)/ $(TAG) > capstone-$(DIST_VERSION).zip
 
 TESTS  = test_basic test_detail test_arm test_aarch64 test_m68k test_mips test_ppc test_sparc test_tricore
-TESTS += test_systemz test_x86 test_xcore test_iter test_evm test_riscv test_mos65xx test_wasm test_bpf
+TESTS += test_systemz test_x86 test_xcore test_iter test_evm test_riscv test_mos65xx test_wasm test_bpf test_alpha
 TESTS += test_basic.static test_detail.static test_arm.static test_aarch64.static
 TESTS += test_m68k.static test_mips.static test_ppc.static test_sparc.static
 TESTS += test_systemz.static test_x86.static test_xcore.static test_m680x.static
 TESTS += test_skipdata test_skipdata.static test_iter.static test_evm.static test_riscv.static
-TESTS += test_mos65xx.static test_wasm.static test_bpf.static
+TESTS += test_mos65xx.static test_wasm.static test_bpf.static test_alpha.static
 
 check: $(TESTS)
 

Mapping.c

@@ -313,6 +313,7 @@ DEFINE_get_detail_op(arm, ARM);
 DEFINE_get_detail_op(ppc, PPC);
 DEFINE_get_detail_op(tricore, TriCore);
 DEFINE_get_detail_op(aarch64, AArch64);
+DEFINE_get_detail_op(alpha, Alpha);
 
 /// Returns true if for this architecture the
 /// alias operands should be filled.

Mapping.h

@@ -121,6 +121,7 @@ DECL_get_detail_op(arm, ARM);
 DECL_get_detail_op(ppc, PPC);
 DECL_get_detail_op(tricore, TriCore);
 DECL_get_detail_op(aarch64, AArch64);
+DECL_get_detail_op(alpha, Alpha);
 
 /// Increments the detail->arch.op_count by one.
 #define DEFINE_inc_detail_op_count(arch, ARCH) \
@@ -144,6 +145,8 @@ DEFINE_inc_detail_op_count(tricore, TriCore);
 DEFINE_dec_detail_op_count(tricore, TriCore);
 DEFINE_inc_detail_op_count(aarch64, AArch64);
 DEFINE_dec_detail_op_count(aarch64, AArch64);
+DEFINE_inc_detail_op_count(alpha, Alpha);
+DEFINE_dec_detail_op_count(alpha, Alpha);
 
 /// Returns true if a memory operand is currently edited.
 static inline bool doing_mem(const MCInst *MI)
@@ -169,6 +172,7 @@ DEFINE_get_arch_detail(arm, ARM);
 DEFINE_get_arch_detail(ppc, PPC);
 DEFINE_get_arch_detail(tricore, TriCore);
 DEFINE_get_arch_detail(aarch64, AArch64);
+DEFINE_get_arch_detail(alpha, Alpha);
 
 static inline bool detail_is_set(const MCInst *MI)
 {

arch/Alpha/AlphaDisassembler.c

@@ -0,0 +1,113 @@
+/* Capstone Disassembly Engine */
+/* By Dmitry Sibirtsev  <[email protected]>, 2023 */
+
+#ifdef CAPSTONE_HAS_ALPHA
+
+#include <stdio.h> // DEBUG
+#include <stdlib.h>
+#include <string.h>
+
+#include "../../utils.h"
+
+#include "../../MCFixedLenDisassembler.h"
+#include "../../Mapping.h"
+
+#include "AlphaDisassembler.h"
+#include "AlphaLinkage.h"
+
+static DecodeStatus DecodeGPRCRegisterClass(MCInst *Inst, unsigned RegNo,
+											uint64_t Address,
+											const void *Decoder);
+
+static DecodeStatus DecodeF4RCRegisterClass(MCInst *Inst, unsigned RegNo,
+											uint64_t Address,
+											const void *Decoder);
+
+static DecodeStatus DecodeF8RCRegisterClass(MCInst *Inst, unsigned RegNo,
+											uint64_t Address,
+											const void *Decoder);
+
+#include "AlphaGenDisassemblerTables.inc"
+
+#define GET_REGINFO_ENUM
+#define GET_REGINFO_MC_DESC
+
+#include "AlphaGenRegisterInfo.inc"
+
+static DecodeStatus DecodeGPRCRegisterClass(MCInst *Inst, unsigned RegNo,
+											uint64_t Address,
+											const void *Decoder)
+{
+	if (RegNo > 31)
+		return MCDisassembler_Fail;
+
+	unsigned Register = GPRC[RegNo];
+	MCOperand_CreateReg0(Inst, (Register));
+	return MCDisassembler_Success;
+}
+
+static DecodeStatus DecodeF4RCRegisterClass(MCInst *Inst, unsigned RegNo,
+											uint64_t Address,
+											const void *Decoder)
+{
+	if (RegNo > 31)
+		return MCDisassembler_Fail;
+
+	unsigned Register = F4RC[RegNo];
+	MCOperand_CreateReg0(Inst, (Register));
+	return MCDisassembler_Success;
+}
+
+static DecodeStatus DecodeF8RCRegisterClass(MCInst *Inst, unsigned RegNo,
+											uint64_t Address,
+											const void *Decoder)
+{
+	if (RegNo > 31)
+		return MCDisassembler_Fail;
+
+	unsigned Register = F8RC[RegNo];
+	MCOperand_CreateReg0(Inst, (Register));
+	return MCDisassembler_Success;
+}
+
+#define GET_SUBTARGETINFO_ENUM
+
+#include "AlphaGenInstrInfo.inc"
+
+DecodeStatus Alpha_LLVM_getInstruction(csh handle, const uint8_t *Bytes,
+									   size_t ByteLen, MCInst *MI,
+									   uint16_t *Size, uint64_t Address,
+									   void *Info)
+{
+	if (!handle) {
+		return MCDisassembler_Fail;
+	}
+
+	if (ByteLen < 4) {
+		*Size = 0;
+		return MCDisassembler_Fail;
+	}
+
+	uint32_t Insn = readBytes32(MI, Bytes);
+	// Calling the auto-generated decoder function.
+	DecodeStatus Result =
+		decodeInstruction_4(DecoderTable32, MI, Insn, Address, NULL);
+
+	if (Result != MCDisassembler_Fail) {
+		*Size = 4;
+		return Result;
+	}
+
+	*Size = 4;
+	return MCDisassembler_Fail;
+}
+
+void Alpha_init(MCRegisterInfo *MRI)
+{
+	MCRegisterInfo_InitMCRegisterInfo(
+		MRI, AlphaRegDesc, ARR_SIZE(AlphaRegDesc), 0, 0, AlphaMCRegisterClasses,
+		ARR_SIZE(AlphaMCRegisterClasses), 0, 0, AlphaRegDiffLists, 0,
+		AlphaSubRegIdxLists, 1, 0);
+}
+
+#endif

arch/Alpha/AlphaDisassembler.h

@@ -0,0 +1,18 @@
+/* Capstone Disassembly Engine */
+/* By Dmitry Sibirtsev <[email protected]>, 2023 */
+
+#ifndef CS_ALPHADISASSEMBLER_H
+#define CS_ALPHADISASSEMBLER_H
+
+#if !defined(_MSC_VER) || !defined(_KERNEL_MODE)
+#include <stdint.h>
+#endif
+
+#include "../../MCDisassembler.h"
+#include "../../MCInst.h"
+#include "../../MCRegisterInfo.h"
+#include <capstone/capstone.h>
+
+void Alpha_init(MCRegisterInfo *MRI);
+
+#endif // CS_ALPHADISASSEMBLER_H