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Two RISC-V fixes #1682

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Merged
aquynh merged 2 commits into from
Sep 16, 2020
Merged

Two RISC-V fixes #1682

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5865775
RISCV: Check CS_MODE_RISCVC in getFeatureBits
rth7680 Sep 12, 2020
87b1489
RISCV: Fix skipdata_size for CS_MODE_RISCVC
rth7680 Sep 12, 2020
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17 changes: 8 additions & 9 deletions arch/RISCV/RISCVDisassembler.c
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Original file line number Diff line number Diff line change
Expand Up @@ -40,16 +40,15 @@
*/
static uint64_t getFeatureBits(int mode)
{
if (mode == CS_MODE_RISCV32)
// return b11110
return RISCV_FeatureStdExtM | RISCV_FeatureStdExtA |
uint64_t ret = RISCV_FeatureStdExtM | RISCV_FeatureStdExtA |
RISCV_FeatureStdExtF | RISCV_FeatureStdExtD ;
else

// CS_MODE_RISCV64, return b11111
return RISCV_Feature64Bit | RISCV_FeatureStdExtM |
RISCV_FeatureStdExtA | RISCV_FeatureStdExtF |
RISCV_FeatureStdExtD ;

if (mode & CS_MODE_RISCV64)
ret |= RISCV_Feature64Bit;
if (mode & CS_MODE_RISCVC)
ret |= RISCV_FeatureStdExtC;

return ret;
}

#define GET_REGINFO_ENUM
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2 changes: 1 addition & 1 deletion cs.c
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Original file line number Diff line number Diff line change
Expand Up @@ -655,7 +655,7 @@ static uint8_t skipdata_size(cs_struct *handle)
case CS_ARCH_RISCV:
// special compress mode
if (handle->mode & CS_MODE_RISCVC)
return 1;
return 2;
return 4;
}
}
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