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Multiple updates to SerialUPDI protocol based on discussion 1609 and issues 1621, 1622 and 1623. #1627
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Retest using this PR. run test NVM V0 : PASS
run test NVM V2 : PASS
run test NVM V3 : PASS
no test NVM V4 : Haven't gotten it yet run test NVM V5 : PASS
That's a very good result for me. |
I have no concerns re the code, but would want to see confirmation that the V4 implementation works as well, so suggest merging after that could be tested. Thanks all round, in particular @askn37 and @dbuchwald, for error reporting, fruitful discussion, careful implementation and thorough testing (with @MCUdude's brand new test tool!) |
Thanks for the PR @dbuchwald! Tested with an ATmega4808, AVR128DA32, and AVR64DB32, and no issues so far. I'm waiting for an AVR-DU to show up in the mail, but it might take another week before it gets here. |
@stefanrueger I totally agree that it should be properly tested against NVM v4 device, especially given how the implementation was done (just copied over from @MCUdude I'm looking forward to your test results. How did you get DU chip? Do you have any datasheet for it? |
Well, I happened to be in contact with someone who thinks Avrdude is a project that's worth supporting. Sorry, I don't have any datasheet for it. |
The atpacks have .atdf files for them from which the avrdude project has extracted the register files (but not the associated bit masks) and put into |
For AVR-DU, the currently available documentation is ATDF, ioavr64du28.h, ioavr64du32.h header files and some IDE configuration definition files. Then, an archive of previously retracted short notes. You can tell a lot from header files. This is a good indication of the nature of the hardware. It may be helpful to compare it with header files from other similar chips to see what's similar and what's different. By convention, when the meaning or use of a register changes, the symbol name changes, even if the IO address or bit position remains the same. This causes the previous code to generate an intentional compilation error to get attention. This trend is most noticeable in hardware peripherals that change frequently, such as CCL, EVSYS, and PORTMUX. From this comparison, we can infer that NVMCTRL's IO register map is very similar to V3, and the command set and FLASH page size are the same as V2. That's how I interpreted it. I think it's a combination of the Dx specification NOR FLASH metal mask and the Ex writing circuit. Current AVR-DU (NVM V4) support options.
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@askn37 @stefanrueger @MCUdude Hey, just a short follow-up on the NVM v4 and the reversed bits for NVMCTRL.STATUS register. Following your advice I checked the recently updated atpack from Microchip, and indeed, when comparing v2 and v4 chips (
/* NVMCTRL.STATUS bit masks and bit positions */
#define NVMCTRL_FBUSY_bm 0x01 /* Flash busy bit mask. */
#define NVMCTRL_FBUSY_bp 0 /* Flash busy bit position. */
#define NVMCTRL_EEBUSY_bm 0x02 /* EEPROM busy bit mask. */
#define NVMCTRL_EEBUSY_bp 1 /* EEPROM busy bit position. */
/* NVMCTRL.STATUS bit masks and bit positions */
#define NVMCTRL_EEBUSY_bm 0x01 /* EEPROM busy bit mask. */
#define NVMCTRL_EEBUSY_bp 0 /* EEPROM busy bit position. */
#define NVMCTRL_FLBUSY_bm 0x02 /* Flash busy bit mask. */
#define NVMCTRL_FLBUSY_bp 1 /* Flash busy bit position. */ This suggests that my implementation should be valid, but this can only be confirmed when testing against physical hardware. Now, for the release forward: I wouldn't remove NVM v4 support. Please remember that when the original SerialUPDI implementation was released back in 2021 it wasn't tested against any NVM v3 chips, as they were not available at the time, so it's pretty much the same scenario... |
@dbuchwald Yes, agreed. I would rather have a candidate implementation for V4 in v7.3 than nothing. Having it out there gets more people trying it. As a physical test might happen soon it makes sense to wait. But if that does not materialise, I would suggest merging the PR anyway. |
This PR should address the following issues:
The following changes have been made:
Please note: NVM V4 support is highly experimental, implementation was based on
pymcuprog
but never tested on actual hardware.@askn37 @MCUdude @stefanrueger - would you be able to check this PR and let me know if you have any questions, comments or concerns? Thanks in advance!