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UPSTREAM PR #17795: [DRAFT] CUDA: Improve performance via less synchronizations between token#456

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UPSTREAM PR #17795: [DRAFT] CUDA: Improve performance via less synchronizations between token#456
loci-dev wants to merge 11 commits intomainfrom
upstream-PR17795-branch_aendk-akieslinger/reduce-per-token-syncs

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@loci-dev loci-dev commented Dec 5, 2025

Mirrored from ggml-org/llama.cpp#17795

[DRAFT]
This PR suggest to remove some superfluous synchronization calls between tokens to be faster on CUDA backends. I see between 1% and 2% perf gain depending on the model, GPU and settings.

Mechanism

The performance impact is best explained visually. Here are the "before" and "after" nsight system traces. They are not to scale. The relevant part is the row with the green and red bubbles. Both images show the overhead between the GPU execution of two tokens. The generation of the n-th token ends on the left hand side of the screenshot, in the green bubble titled cudaStreamSynchronize. The calculation of the next/n+1st token starts on the right hand side, at the green bar titled cudaGraphLaunch. In between, there is CPU orchestration overhead. This PR aims to shrink the time spent in the middle, between GPU token generation. Original:

Screenshot 2025-12-05 at 14 45 35

In the middle of the above image, we see red and green bubbles alternating. In this case, the green bubbles are synchronization steps, the red bubbles are asynchronous copy calls from host to device. If async operations are immediately followed by synchronization calls, they are executed synchronously. This is not efficient. Removing the green synchronization operations between asynchronous copy calls leads to asynchronous copies and reduced overhead between GPU token generation:

Screenshot 2025-12-05 at 14 45 10

Performance

I benchmarked on a RTX Pro 6000 Blackwell using ./llama-bench -m $models -p 0 -n 128,256,512 -fa 1.
My testing shows around 1% improvement, with gpt-oss-20b gaining up to 1.4%. llama 3B Q4_K - Medium shows very high variance, prompting me to run the tests again with -r 100. At -r 100, a clearer trend of improved performance for gemma3n E2B Q8_0 is also visible.

Details with default `-r 5`

Baseline:

| model                          |       size |     params | backend    | ngl | fa |            test |                  t/s |
| ------------------------------ | ---------: | ---------: | ---------- | --: | -: | --------------: | -------------------: |
| gpt-oss 20B MXFP4 MoE          |  11.27 GiB |    20.91 B | CUDA       |  99 |  1 |           tg128 |        392.24 ± 1.07 |
| gpt-oss 20B MXFP4 MoE          |  11.27 GiB |    20.91 B | CUDA       |  99 |  1 |           tg256 |        392.72 ± 0.35 |
| gpt-oss 20B MXFP4 MoE          |  11.27 GiB |    20.91 B | CUDA       |  99 |  1 |           tg512 |        387.72 ± 0.38 |
| llama 3B Q4_K - Medium         |   1.87 GiB |     3.21 B | CUDA       |  99 |  1 |           tg128 |        464.85 ± 0.55 |
| llama 3B Q4_K - Medium         |   1.87 GiB |     3.21 B | CUDA       |  99 |  1 |           tg256 |        465.39 ± 0.59 |
| llama 3B Q4_K - Medium         |   1.87 GiB |     3.21 B | CUDA       |  99 |  1 |           tg512 |        461.87 ± 0.74 |
| gemma3n E2B Q8_0               |   4.45 GiB |     4.46 B | CUDA       |  99 |  1 |           tg128 |        231.59 ± 0.09 |
| gemma3n E2B Q8_0               |   4.45 GiB |     4.46 B | CUDA       |  99 |  1 |           tg256 |        231.47 ± 0.03 |
| gemma3n E2B Q8_0               |   4.45 GiB |     4.46 B | CUDA       |  99 |  1 |           tg512 |        228.21 ± 0.46 |

build: 909072abc (7176)

PR:

| model                          |       size |     params | backend    | ngl | fa |            test |                  t/s |
| ------------------------------ | ---------: | ---------: | ---------- | --: | -: | --------------: | -------------------: |
| gpt-oss 20B MXFP4 MoE          |  11.27 GiB |    20.91 B | CUDA       |  99 |  1 |           tg128 |        397.14 ± 1.50 |
| gpt-oss 20B MXFP4 MoE          |  11.27 GiB |    20.91 B | CUDA       |  99 |  1 |           tg256 |        398.36 ± 0.45 |
| gpt-oss 20B MXFP4 MoE          |  11.27 GiB |    20.91 B | CUDA       |  99 |  1 |           tg512 |        393.25 ± 0.65 |
| llama 3B Q4_K - Medium         |   1.87 GiB |     3.21 B | CUDA       |  99 |  1 |           tg128 |        472.48 ± 3.71 |
| llama 3B Q4_K - Medium         |   1.87 GiB |     3.21 B | CUDA       |  99 |  1 |           tg256 |        468.81 ± 0.19 |
| llama 3B Q4_K - Medium         |   1.87 GiB |     3.21 B | CUDA       |  99 |  1 |           tg512 |        463.62 ± 1.28 |
| gemma3n E2B Q8_0               |   4.45 GiB |     4.46 B | CUDA       |  99 |  1 |           tg128 |        232.84 ± 0.18 |
| gemma3n E2B Q8_0               |   4.45 GiB |     4.46 B | CUDA       |  99 |  1 |           tg256 |        232.82 ± 0.08 |
| gemma3n E2B Q8_0               |   4.45 GiB |     4.46 B | CUDA       |  99 |  1 |           tg512 |        229.62 ± 0.25 |

build: f6b408d84 (7178)

Speedup:

1.01249
1.01436
1.01426
1.01641
1.00735
1.00379
1.0054
1.00583
1.00618
Details with `-r 100`

Baseline:

| model                          |       size |     params | backend    | ngl | fa |            test |                  t/s |
| ------------------------------ | ---------: | ---------: | ---------- | --: | -: | --------------: | -------------------: |
| gpt-oss 20B MXFP4 MoE          |  11.27 GiB |    20.91 B | CUDA       |  99 |  1 |           tg128 |        393.24 ± 0.45 |
| gpt-oss 20B MXFP4 MoE          |  11.27 GiB |    20.91 B | CUDA       |  99 |  1 |           tg256 |        393.33 ± 2.97 |
| gpt-oss 20B MXFP4 MoE          |  11.27 GiB |    20.91 B | CUDA       |  99 |  1 |           tg512 |        381.93 ± 2.40 |
| llama 3B Q4_K - Medium         |   1.87 GiB |     3.21 B | CUDA       |  99 |  1 |           tg128 |       446.41 ± 40.17 |
| llama 3B Q4_K - Medium         |   1.87 GiB |     3.21 B | CUDA       |  99 |  1 |           tg256 |       451.55 ± 21.34 |
| llama 3B Q4_K - Medium         |   1.87 GiB |     3.21 B | CUDA       |  99 |  1 |           tg512 |        454.89 ± 0.33 |
| gemma3n E2B Q8_0               |   4.45 GiB |     4.46 B | CUDA       |  99 |  1 |           tg128 |        231.90 ± 0.27 |
| gemma3n E2B Q8_0               |   4.45 GiB |     4.46 B | CUDA       |  99 |  1 |           tg256 |        231.93 ± 0.21 |
| gemma3n E2B Q8_0               |   4.45 GiB |     4.46 B | CUDA       |  99 |  1 |           tg512 |        228.47 ± 0.14 |

build: 909072abc (7176)

PR:

| model                          |       size |     params | backend    | ngl | fa |            test |                  t/s |
| ------------------------------ | ---------: | ---------: | ---------- | --: | -: | --------------: | -------------------: |
| gpt-oss 20B MXFP4 MoE          |  11.27 GiB |    20.91 B | CUDA       |  99 |  1 |           tg128 |        398.52 ± 0.41 |
| gpt-oss 20B MXFP4 MoE          |  11.27 GiB |    20.91 B | CUDA       |  99 |  1 |           tg256 |        397.32 ± 5.71 |
| gpt-oss 20B MXFP4 MoE          |  11.27 GiB |    20.91 B | CUDA       |  99 |  1 |           tg512 |        383.53 ± 3.06 |
| llama 3B Q4_K - Medium         |   1.87 GiB |     3.21 B | CUDA       |  99 |  1 |           tg128 |       441.09 ± 50.39 |
| llama 3B Q4_K - Medium         |   1.87 GiB |     3.21 B | CUDA       |  99 |  1 |           tg256 |       456.69 ± 20.91 |
| llama 3B Q4_K - Medium         |   1.87 GiB |     3.21 B | CUDA       |  99 |  1 |           tg512 |        458.19 ± 0.32 |
| gemma3n E2B Q8_0               |   4.45 GiB |     4.46 B | CUDA       |  99 |  1 |           tg128 |        233.98 ± 0.13 |
| gemma3n E2B Q8_0               |   4.45 GiB |     4.46 B | CUDA       |  99 |  1 |           tg256 |        233.65 ± 0.25 |
| gemma3n E2B Q8_0               |   4.45 GiB |     4.46 B | CUDA       |  99 |  1 |           tg512 |        230.18 ± 0.14 |

build: aebcdf119 (7178)

Speedup:

1.01366
1.01025
1.00408
0.982033
1.00875
1.00819
1.00893
1.00876
1.00938

Implementation Concerns

The approach here aims to minimize changes in the general backend, and to other backends. However, the synchronization calls originate from the general backend. Some changes there are unavoidable, as well as retaining a synchronization call after the last copy to ensure correctness across backends.

Additionally, AFAIK there is no documentation on the functional guarantees of a function like ggml_copy_tensor, and it could be that the current design proposal violates existing assumptions, or practices around potentially breaking ABIs between ggml and llama.cpp. For this reason, this PR is a draft.
I also have not adapted other ggml_backend_buffer_i interface changes (added set_tensor_async + whitespace) from the other backends just yet.
Please advise on the best course of action here.

For example, we could make the set_tensor in the CUDA backend default async. This would avoid interface changes, but change the behavior of similar functions between backends.

@ggerganov @JohannesGaessler

@loci-dev loci-dev force-pushed the main branch 29 times, most recently from 6f5d23d to a2add8a Compare December 9, 2025 07:11
@loci-dev loci-dev force-pushed the main branch 15 times, most recently from 952add7 to c05b224 Compare December 14, 2025 07:08
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loci-review bot commented Dec 18, 2025

Explore the complete analysis inside the Version Insights

Pull Request #456 Performance Summary

Scope: CUDA backend synchronization optimization
Files Modified: 2 files (ggml-backend.cpp, ggml-cuda.cu)
Measured Impact: 1-1.4% throughput improvement for CUDA workloads

Overview

This PR reduces CPU-GPU synchronization overhead in the CUDA backend by introducing conditional synchronization logic. The changes enable asynchronous memory copies between CPU and CUDA without unnecessary synchronization calls, allowing better overlap between CPU and GPU operations during token generation.

Key Findings

Performance-Critical Area Impact:

The modifications target the inference scheduling path in ggml_backend_sched_compute_splits(), which executes during every token generation cycle. The changes eliminate 2-3 synchronization calls per token by:

  1. Replacing ggml_backend_tensor_copy() with ggml_backend_tensor_copy_async()
  2. Skipping explicit ggml_backend_synchronize() calls for CUDA backends
  3. Extending async copy support from CUDA→CUDA to CPU→CUDA transfers

Absolute Time Savings:

The measured 1-1.4% improvement translates to approximately 20000-50000 ns saved per token in the scheduling overhead. For a model generating 400 tokens/second, this represents 8000000-20000000 ns reduction per second of inference time.

Tokens Per Second Impact:

The core inference functions (llama_decode, llama_encode, llama_tokenize) are not directly modified by this PR. The optimization affects the tensor copy and synchronization layer beneath these functions. Since the reference model shows 7% tokens/second reduction for 2000000 ns slower llama_decode, the 20000-50000 ns improvement in scheduling overhead represents approximately 0.07-0.18% potential tokens/second improvement, which aligns with the measured 1-1.4% throughput gain when accounting for cumulative per-token savings across the full inference pipeline.

Impacted Functions:

  • ggml_backend_sched_compute_splits() - scheduling overhead reduced by 20000-50000 ns per invocation
  • ggml_backend_cuda_cpy_tensor_async() - now supports CPU→CUDA async transfers

Power Consumption:

No power consumption analysis data available for this comparison. The optimization reduces CPU idle time during synchronization, potentially lowering CPU power draw, but GPU power consumption remains unchanged as compute workload is unaffected.

Backend Compatibility:

Non-CUDA backends (Metal, HIP, CPU) retain explicit synchronization, maintaining identical behavior and zero performance impact.

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loci-review bot commented Dec 18, 2025

Explore the complete analysis inside the Version Insights

Performance Analysis Summary: PR #456

Overview

This PR implements CUDA-specific optimizations to reduce CPU-GPU synchronization overhead during token generation. The changes introduce conditional synchronization skipping for backends with implicit stream-based ordering (CUDA) and enable async CPU-to-CUDA memory copies. The modifications span 2 files with 58 lines changed, targeting the scheduler and CUDA backend.

Key Findings

Performance-Critical Area Impact:

The changes directly affect the inference pipeline through ggml_backend_sched_compute_splits, which is called once per token during llama_decode execution. The modifications eliminate 2 synchronization calls per input tensor (typically 5-20 tensors per split), saving approximately 100000-2000000 ns per token on CUDA backends.

Inference Impact:

The llama_decode function benefits from reduced synchronization overhead in the scheduler. Based on the reference model (smollm:135m on 12th Gen Intel i7-1255U), where 2000000 ns degradation causes 7% tokens per second reduction, the expected 100000-2000000 ns improvement translates to approximately 0.35-7% tokens per second increase for CUDA execution. This aligns with the PR's reported 1-2% throughput gains across tested models.

Affected functions in inference path:

  • ggml_backend_sched_compute_splits (modified synchronization logic)
  • ggml_backend_tensor_copy_async (enabled for CPU-to-CUDA copies)

Power Consumption Analysis:

The detected 0.242% power consumption increase in libggml-base.so is unrelated to this PR's CUDA optimizations. The regression affects STL container operations (std::vector::begin, operator[]) with throughput increases of 18-36%, indicating build configuration issues rather than functional changes. The impacted binary is libggml-base.so, not the CUDA backend components modified by this PR.

Implementation Details:

The PR introduces ggml_backend_implicitly_synced for runtime backend detection via string matching and ggml_backend_synchronize_if_required as a conditional wrapper. For CUDA backends, synchronization calls return immediately, while async copies proceed without blocking. Non-CUDA backends maintain existing synchronous behavior with negligible overhead (2-5 ns per conditional check).

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loci-review bot commented Jan 13, 2026

Explore the complete analysis inside the Version Insights

Based on the analysis, no functions were identified with meaningful performance changes between the base and target versions. The code modifications did not result in measurable performance impact.

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loci-review bot commented Jan 20, 2026

Explore the complete analysis inside the Version Insights

Based on the comprehensive analysis, here is the performance review report:


Performance Review Report

Overview

This review analyzes performance changes across 11 commits focused on implementing asynchronous tensor copy operations in the GGML backend scheduler. The changes modified 35 files, added 37 new files, and deleted 3 files, primarily targeting the backend synchronization infrastructure.

Performance Impact Summary

The changes introduce moderate performance improvements with two functions showing measurable changes:

1. ggml_backend_sched_compute_splits (ggml-backend.cpp)

  • Response time: 18,373 ns → 19,295 ns (+922 ns)
  • Throughput: 2,978 ops/ns → 3,504 ops/ns (+525 ops/ns, +17.6%)

2. quantize_row_q5_1_ref (ggml-quants.c)

  • Response time: 2,055 ns → 1,999 ns (-56 ns)
  • Throughput: 1,155 ops/sec → 1,099 ops/sec

Code Changes Analysis

The commit history reveals a systematic implementation of asynchronous operations following the "saaasg" pattern (sync-async-async-async-sync-graph). Key changes include:

  1. Async tensor copies: Replaced blocking ggml_backend_tensor_copy() with ggml_backend_tensor_copy_async() for CPU-to-CUDA transfers
  2. Event-based synchronization: Added conditional synchronization checks to enable non-blocking data transfers
  3. Backend detection refinement: Evolved through 7 commits to handle CUDA-specific optimizations while maintaining compatibility with non-CUDA builds
  4. Relaxed sync requirements: Introduced opt-in mechanism for backends supporting async operations (CUDA, potentially Vulkan)

Performance-Critical Function Analysis

The ggml_backend_sched_compute_splits function is the core execution engine for multi-backend scheduling in llama.cpp's GGML library. This function orchestrates computation graph execution across CPU/GPU backends with pipeline parallelism support. The 17.6% throughput improvement directly results from enabling overlapped data transfer and computation, particularly beneficial for multi-GPU inference and continuous batching scenarios. The 922 ns response time increase represents acceptable overhead from additional synchronization checks that enable the async execution path.

The quantize_row_q5_1_ref function showed compiler-driven optimizations with no source code changes, achieving a 56 ns response time improvement through better instruction scheduling.

Justification

The performance changes align with the stated goal of implementing asynchronous operations for high-throughput inference workloads. The commit messages document a careful, iterative approach to introducing async capabilities while maintaining backward compatibility. The throughput gains in the scheduler function justify the modest latency increase, as the optimization targets production scenarios where batch processing efficiency outweighs per-operation latency. The changes preserve correctness through graceful fallback to synchronous mode for unsupported backends.


Conclusion: The changes deliver meaningful throughput improvements for multi-backend inference scenarios with minimal latency overhead, successfully implementing async tensor copy operations as intended.

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