ARROW-18162: [C++] Add Arm SVE compiler options #14515
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It seems we could also use SVE in |
Yes. SVE may be better when longer vector size is beneficial, or to leverage operations (e.g, scatter/gather) not availble in NEON. |
As xsimd only supports fixed-size SVE, we have to specify vector size explicitly on command line. And the binary can only run on hardware with that vector size. Otherwise, the code behaviour is undefined. E.g., `cmake -DARROW_SIMD_LEVEL=SVE256 ..` According macro `ARROW_HAVE_SVE256` and cmake variable are defined. We can also leverage compiler auto vectorization to generate size agnostic SVE code without specifying the vector size. E.g., `cmake -DARROW_SIMD_LEVEL=SVE ..` This PR also removes some unused Arm64 arch options.
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@github-actions crossbow submit conda-{linux,osx}-* |
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@github-actions crossbow submit conda-linux-* |
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Revision: f99b57a Submitted crossbow builds: ursacomputing/crossbow @ actions-19dd1864f2
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@github-actions crossbow submit conda-osx-* |
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Revision: f99b57a Submitted crossbow builds: ursacomputing/crossbow @ actions-457a7b106d
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conda-osx-clang-py310/py37 build error looks not related. |
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+1 for changes
I re-ran failed jobs.
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Benchmark runs are scheduled for baseline = 2a5c773 and contender = 16fd7f3. 16fd7f3 is a master commit associated with this PR. Results will be available as each benchmark for each run completes. |
As xsimd only supports fixed-size SVE, we have to specify vector size explicitly on command line. And the binary can only run on hardware with matched vector size. Otherwise, the code behaviour is undefined. E.g., `cmake -DARROW_SIMD_LEVEL=SVE256 ..` According macro `ARROW_HAVE_SVE256` and cmake variable are defined. We can also leverage compiler auto vectorization to generate size agnostic SVE code without specifying the vector size. E.g., `cmake -DARROW_SIMD_LEVEL=SVE ..` This PR also removes some unused Arm64 arch options. Authored-by: Yibo Cai <[email protected]> Signed-off-by: Yibo Cai <[email protected]>
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As xsimd only supports fixed-size SVE, we have to specify vector size
explicitly on command line. And the binary can only run on hardware
with matched vector size. Otherwise, the code behaviour is undefined.
E.g.,
cmake -DARROW_SIMD_LEVEL=SVE256 ..According macro
ARROW_HAVE_SVE256and cmake variable are defined.We can also leverage compiler auto vectorization to generate size
agnostic SVE code without specifying the vector size.
E.g.,
cmake -DARROW_SIMD_LEVEL=SVE ..This PR also removes some unused Arm64 arch options.