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[RVP] Fix rcras<mode>_le instruction. #1

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higuoxing opened this issue Feb 5, 2021 · 0 comments
Open

[RVP] Fix rcras<mode>_le instruction. #1

higuoxing opened this issue Feb 5, 2021 · 0 comments

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@higuoxing
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Hi, It looks the implementation for rcras<mode>_le instruction in gcc/config/riscv/dsp.md isn't quite right. I think this patch should help fix it :-)

diff --git a/gcc/config/riscv/dsp.md b/gcc/config/riscv/dsp.md
index 057c5bffcae..fbee83cd25a 100644
--- a/gcc/config/riscv/dsp.md
+++ b/gcc/config/riscv/dsp.md
@@ -43,7 +43,7 @@
 
 (define_mode_attr bsize [(HI "8") (SI "16")])
 
-(define_mode_attr VSH_EXT [(V2SI "DI") (V2HI "HI")])
+(define_mode_attr VSH_EXT [(V2SI "DI") (V2HI "SI")])
 
 (define_mode_attr VELT [(V4QI "QI") (V2HI "HI") (V8QI "QI") (V4HI "HI")])
 
@@ -506,7 +506,7 @@
                    (vec_select:<VNHALF>
                      (match_dup 2)
                      (parallel [(const_int 0)])))
-                 (sign_extend:SI
+                 (sign_extend:<VSH_EXT>
                    (vec_select:<VNHALF>
                      (match_dup 1)
                      (parallel [(const_int 1)]))))
tylerchen0619 pushed a commit that referenced this issue Feb 1, 2023
This patch fixes PR99748 which shows us trying to pass the argument to
__aeabi_f2iz in the VFP register s0 when the library function is
expecting to use the GPR r0. It also fixes the __aeabi_f2uiz case which
was broken in the same way.

For the testcase in the PR, here is the code we generate before the
patch (with -mfloat-abi=hard -march=armv8.1-m.main+mve -O0):

main:
    push    {r7, lr}
    sub     sp, sp, #8
    add     r7, sp, #0
    mov     r3, #1065353216
    str     r3, [r7, #4]    @ float
    vldr.32 s0, [r7, #4]
    bl      __aeabi_f2iz
    mov     r3, r0
    cmp     r3, #1
    [...]

This becomes:

main:
    push    {r7, lr}
    sub     sp, sp, #8
    add     r7, sp, #0
    mov     r3, #1065353216
    str     r3, [r7, #4]    @ float
    ldr     r0, [r7, #4]    @ float
    bl      __aeabi_f2iz
    mov     r3, r0
    cmp     r3, #1
    [...]

after the patch. We see a similar change for the same testcase with a
cast to unsigned instead of int.

gcc/ChangeLog:

	PR target/99748
	* config/arm/arm.c (arm_libcall_uses_aapcs_base): Also use base
	PCS for [su]fix_optab.

(cherry picked from commit 16ea7f5)
tylerchen0619 pushed a commit that referenced this issue Feb 1, 2023
…04617]

On
 #define A(n) int foo1##n(void) { return 1##n; }
 #define B(n) A(n##0) A(n##1) A(n##2) A(n##3) A(n##4) A(n##5) A(n##6) A(n##7) A(n##8) A(n##9)
 #define C(n) B(n##0) B(n##1) B(n##2) B(n##3) B(n##4) B(n##5) B(n##6) B(n##7) B(n##8) B(n##9)
 #define D(n) C(n##0) C(n##1) C(n##2) C(n##3) C(n##4) C(n##5) C(n##6) C(n##7) C(n##8) C(n##9)
 #define E(n) D(n##0) D(n##1) D(n##2) D(n##3) D(n##4) D(n##5) D(n##6) D(n##7) D(n##8) D(n##9)
 E(0) E(1) E(2) D(30) D(31) C(320) C(321) C(322) C(323) C(324) C(325)
 B(3260) B(3261) B(3262) B(3263) A(32640) A(32641) A(32642)
testcase with
./xgcc -B ./ -c -g -fpic -ffat-lto-objects -flto  -O0 -o foo1.o foo1.c -ffunction-sections
./xgcc -B ./ -shared -g -fpic -flto -O0 -o foo1.so foo1.o
/tmp/ccTW8mBm.debug.temp.o: file not recognized: file format not recognized
(testcase too slow to be included into testsuite).
The problem is clearly reported by readelf:
readelf: foo1.o.debug.temp.o: Warning: Section 2 has an out of range sh_link value of 65321
readelf: foo1.o.debug.temp.o: Warning: Section 5 has an out of range sh_link value of 65321
readelf: foo1.o.debug.temp.o: Warning: Section 10 has an out of range sh_link value of 65323
readelf: foo1.o.debug.temp.o: Warning: [ 2]: Link field (65321) should index a symtab section.
readelf: foo1.o.debug.temp.o: Warning: [ 5]: Link field (65321) should index a symtab section.
readelf: foo1.o.debug.temp.o: Warning: [10]: Link field (65323) should index a string section.
because simple_object_elf_copy_lto_debug_sections doesn't adjust sh_info and
sh_link fields in ElfNN_Shdr if they are in between SHN_{LO,HI}RESERVE
inclusive.  Not adjusting those is incorrect though, SHN_{LO,HI}RESERVE
range is only relevant to the 16-bit fields, mainly st_shndx in ElfNN_Sym
where if one needs >= SHN_LORESERVE section number, SHN_XINDEX should be
used instead and .symtab_shndx section should contain the real section
index, and in ElfNN_Ehdr e_shnum and e_shstrndx fields, where if >=
SHN_LORESERVE value is needed it should put those into
Shdr[0].sh_{size,link}.  But, sh_{link,info} are 32-bit fields which can
contain any section index.

Note, as simple-object-elf.c mentions, binutils from 2.12 to 2.18 (so before
2011) used to mishandle the > 63.75K sections case and assumed there is a
hole in between the sections, but what
simple_object_elf_copy_lto_debug_sections does wouldn't help in that case
for the debug temp object creation, we'd need to detect the case also in
that routine and take it into account in the remapping etc.  I think
it is not worth it given that it is over 10 years, if somebody needs
63.75K or more sections, better use more recent binutils.

2022-02-22  Jakub Jelinek  <[email protected]>

	PR lto/104617
	* simple-object-elf.c (simple_object_elf_match): Fix up URL
	in comment.
	(simple_object_elf_copy_lto_debug_sections): Remap sh_info and
	sh_link even if they are in the SHN_LORESERVE .. SHN_HIRESERVE
	range (inclusive).

(cherry picked from commit 2f59f06)
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