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JIT formatting
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@alexcovington
alexcovington committed Sep 22, 2021
1 parent 5ff211c commit 3191bd4
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Showing 3 changed files with 36 additions and 31 deletions.
49 changes: 26 additions & 23 deletions src/coreclr/jit/codegenxarch.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -212,9 +212,9 @@ void CodeGen::genEmitGSCookieCheck(bool pushReg)
regGSCheck = REG_EAX;
regMaskGSCheck = RBM_EAX;
#else // !TARGET_X86
// Jmp calls: specify method handle using which JIT queries VM for its entry point
// address and hence it can neither be a VSD call nor PInvoke calli with cookie
// parameter. Therefore, in case of jmp calls it is safe to use R11.
// Jmp calls: specify method handle using which JIT queries VM for its entry point
// address and hence it can neither be a VSD call nor PInvoke calli with cookie
// parameter. Therefore, in case of jmp calls it is safe to use R11.
regGSCheck = REG_R11;
#endif // !TARGET_X86
}
Expand Down Expand Up @@ -437,9 +437,9 @@ void CodeGen::genEHFinallyOrFilterRet(BasicBlock* block)

// Move an immediate value into an integer register

void CodeGen::instGen_Set_Reg_To_Imm(emitAttr size,
regNumber reg,
ssize_t imm,
void CodeGen::instGen_Set_Reg_To_Imm(emitAttr size,
regNumber reg,
ssize_t imm,
insFlags flags DEBUGARG(size_t targetHandle) DEBUGARG(GenTreeFlags gtFlags))
{
// reg cannot be a FP register
Expand Down Expand Up @@ -1808,8 +1808,8 @@ void CodeGen::genCodeForTreeNode(GenTree* treeNode)

// The last slot is reserved for ICodeManager::FixContext(ppEndRegion)
unsigned filterEndOffsetSlotOffs;
PREFIX_ASSUME(compiler->lvaLclSize(compiler->lvaShadowSPslotsVar) >
TARGET_POINTER_SIZE); // below doesn't underflow.
PREFIX_ASSUME(compiler->lvaLclSize(compiler->lvaShadowSPslotsVar) > TARGET_POINTER_SIZE); // below doesn't
// underflow.
filterEndOffsetSlotOffs =
(unsigned)(compiler->lvaLclSize(compiler->lvaShadowSPslotsVar) - TARGET_POINTER_SIZE);

Expand Down Expand Up @@ -2854,7 +2854,8 @@ void CodeGen::genCodeForInitBlkUnroll(GenTreeBlk* node)
dstOffset += regSize;
bytesWritten += regSize;

if (regSize == YMM_REGSIZE_BYTES && size - bytesWritten < YMM_REGSIZE_BYTES) {
if (regSize == YMM_REGSIZE_BYTES && size - bytesWritten < YMM_REGSIZE_BYTES)
{
regSize = XMM_REGSIZE_BYTES;
}
}
Expand Down Expand Up @@ -3074,7 +3075,8 @@ void CodeGen::genCodeForCpBlkUnroll(GenTreeBlk* node)
? YMM_REGSIZE_BYTES
: XMM_REGSIZE_BYTES;

while (size >= regSize) {
while (size >= regSize)
{
for (; size >= regSize; size -= regSize, srcOffset += regSize, dstOffset += regSize)
{
if (srcLclNum != BAD_VAR_NUM)
Expand All @@ -3098,7 +3100,8 @@ void CodeGen::genCodeForCpBlkUnroll(GenTreeBlk* node)
}
}

if (regSize == YMM_REGSIZE_BYTES) {
if (regSize == YMM_REGSIZE_BYTES)
{
regSize = XMM_REGSIZE_BYTES;
}
}
Expand Down Expand Up @@ -7286,7 +7289,7 @@ unsigned CodeGen::getBaseVarForPutArgStk(GenTree* treeNode)
#ifdef UNIX_AMD64_ABI
assert(!varDsc->lvIsRegArg && varDsc->GetArgReg() == REG_STK);
#else // !UNIX_AMD64_ABI
// On Windows this assert is always true. The first argument will always be in REG_ARG_0 or REG_FLTARG_0.
// On Windows this assert is always true. The first argument will always be in REG_ARG_0 or REG_FLTARG_0.
assert(varDsc->lvIsRegArg && (varDsc->GetArgReg() == REG_ARG_0 || varDsc->GetArgReg() == REG_FLTARG_0));
#endif // !UNIX_AMD64_ABI
#endif // !DEBUG
Expand Down Expand Up @@ -7772,7 +7775,7 @@ void CodeGen::genPutArgStk(GenTreePutArgStk* putArgStk)
// Get argument offset on stack.
// Here we cross check that argument offset hasn't changed from lowering to codegen since
// we are storing arg slot number in GT_PUTARG_STK node in lowering phase.
unsigned argOffset = putArgStk->getArgOffset();
unsigned argOffset = putArgStk->getArgOffset();

#ifdef DEBUG
fgArgTabEntry* curArgTabEntry = compiler->gtArgEntryByNode(putArgStk->gtCall, putArgStk);
Expand Down Expand Up @@ -8151,8 +8154,8 @@ CodeGen::genCreateAndStoreGCInfo(unsigned codeSize, unsigned prologSize, unsigne
}

#ifdef JIT32_GCENCODER
void* CodeGen::genCreateAndStoreGCInfoJIT32(unsigned codeSize,
unsigned prologSize,
void* CodeGen::genCreateAndStoreGCInfoJIT32(unsigned codeSize,
unsigned prologSize,
unsigned epilogSize DEBUGARG(void* codePtr))
{
BYTE headerBuf[64];
Expand Down Expand Up @@ -8300,8 +8303,8 @@ void* CodeGen::genCreateAndStoreGCInfoJIT32(unsigned codeSize,
#else // !JIT32_GCENCODER
void CodeGen::genCreateAndStoreGCInfoX64(unsigned codeSize, unsigned prologSize DEBUGARG(void* codePtr))
{
IAllocator* allowZeroAlloc = new (compiler, CMK_GC) CompIAllocator(compiler->getAllocatorGC());
GcInfoEncoder* gcInfoEncoder = new (compiler, CMK_GC)
IAllocator* allowZeroAlloc = new (compiler, CMK_GC) CompIAllocator(compiler->getAllocatorGC());
GcInfoEncoder* gcInfoEncoder = new (compiler, CMK_GC)
GcInfoEncoder(compiler->info.compCompHnd, compiler->info.compMethodInfo, allowZeroAlloc, NOMEM);
assert(gcInfoEncoder);

Expand Down Expand Up @@ -8443,10 +8446,10 @@ void CodeGen::genEmitHelperCall(unsigned helper, int argSize, emitAttr retSize,
}

/*****************************************************************************
* Unit testing of the XArch emitter: generate a bunch of instructions into the prolog
* (it's as good a place as any), then use COMPlus_JitLateDisasm=* to see if the late
* disassembler thinks the instructions as the same as we do.
*/
* Unit testing of the XArch emitter: generate a bunch of instructions into the prolog
* (it's as good a place as any), then use COMPlus_JitLateDisasm=* to see if the late
* disassembler thinks the instructions as the same as we do.
*/

// Uncomment "#define ALL_ARM64_EMITTER_UNIT_TESTS" to run all the unit tests here.
// After adding a unit test, and verifying it works, put it under this #ifdef, so we don't see it run every time.
Expand Down Expand Up @@ -8594,8 +8597,8 @@ void CodeGen::genProfilingEnterCallback(regNumber initReg, bool* pInitRegZeroed)

unsigned saveStackLvl2 = genStackLevel;

// Important note: when you change enter probe layout, you must also update SKIP_ENTER_PROF_CALLBACK()
// for x86 stack unwinding
// Important note: when you change enter probe layout, you must also update SKIP_ENTER_PROF_CALLBACK()
// for x86 stack unwinding

#if defined(UNIX_X86_ABI)
// Manually align the stack to be 16-byte aligned. This is similar to CodeGen::genAlignStackBeforeCall()
Expand Down
16 changes: 9 additions & 7 deletions src/coreclr/jit/lowerxarch.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -540,7 +540,7 @@ void Lowering::LowerPutArgStk(GenTreePutArgStk* putArgStk)
#if defined(TARGET_AMD64)
&& !src->IsIntegralConst(0)
#endif // TARGET_AMD64
)
)
{
MakeSrcContained(putArgStk, src);
}
Expand Down Expand Up @@ -4024,12 +4024,14 @@ bool Lowering::IsRMWIndirCandidate(GenTree* operand, GenTree* storeInd)
return false;
}

node->VisitOperands([&markCount](GenTree* nodeOperand) -> GenTree::VisitResult {
assert((nodeOperand->gtLIRFlags & LIR::Flags::Mark) == 0);
nodeOperand->gtLIRFlags |= LIR::Flags::Mark;
markCount++;
return GenTree::VisitResult::Continue;
});
node->VisitOperands(
[&markCount](GenTree* nodeOperand) -> GenTree::VisitResult
{
assert((nodeOperand->gtLIRFlags & LIR::Flags::Mark) == 0);
nodeOperand->gtLIRFlags |= LIR::Flags::Mark;
markCount++;
return GenTree::VisitResult::Continue;
});
}
}

Expand Down
2 changes: 1 addition & 1 deletion src/coreclr/jit/lsraxarch.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1069,7 +1069,7 @@ int LinearScan::BuildCall(GenTreeCall* call)
// The return value will be on the X87 stack, and we will need to move it.
dstCandidates = allRegs(registerType);
#else // !TARGET_X86
dstCandidates = RBM_FLOATRET;
dstCandidates = RBM_FLOATRET;
#endif // !TARGET_X86
}
else if (registerType == TYP_LONG)
Expand Down

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