[ROCm][Perf] Optional FlyDSL decode (paged) MQA-logits kernel for the sparse indexer - #12
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The decode half of the sparse-attention indexer runs on aiter's Triton/Gluon deepgemm_fp8_paged_mqa_logits. ROCm/aiter#4221 adds a gfx950 FlyDSL implementation of the same kernel, reported at 1.3-4.2x over Gluon on MI355X, and the decode logits are the indexer's dominant per-step cost at long context. Route the gfx950 branch of rocm_fp8_paged_mqa_logits at it when VLLM_ROCM_USE_AITER_FLYDSL_PAGED_MQA_LOGITS is set, so one build can run both arms and any aiter without the PR falls back to the existing path. Off by default while the PR is unmerged. This is a second call site rather than the module swap used for the prefill kernel in the preceding commit. The two launchers take the same tensors in the same order, but the FlyDSL one's remaining knobs are keyword-only with its own tuned defaults, so sharing a caller would mean forcing the Gluon ChunkK=256 on it. KVBlockSize is not optional: the kernel asserts it against the KV cache's own block dimension, so it is passed through along with Preshuffle, exactly as the Gluon call does. The FlyDSL path skips the -inf prefill the kernel's docstring asks for. That request is for a caller that reads the whole row; this one does not. FlyDSL writes every column up to its causal bound `context_lens[b] - next_n + n` and nothing past it (`is_writer = ... & (col <= q_limit)`), and that bound is the decode top-k's read bound, so the tail the fill would cover is never written and never read. The sanitize is kept, and is the same bounded sanitize_decode_logits() the Gluon path calls. Its window is that same causal bound, so it covers exactly the columns FlyDSL wrote: no more work than the Gluon path already does, and both paths hand the top-k a workspace in the same state. Keeping it means the flag toggles the kernel and nothing else, which is what makes the two arms comparable. The FlyDSL kernel is written against gfx950, so _flydsl_paged_mqa_logits_kernel() returns None on every other architecture and the Triton/Gluon kernel is used regardless of the flag. Signed-off-by: Sriram Kumar <sriramkumar.kishorekumar@amd.com>
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Superseded by #14, which carries the same dispatch plus the per-sequence context_lens fix and is rebased onto current main. |
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Stacked on #7 and #11.
Adds an optional FlyDSL decode (paged) MQA-logits kernel for the sparse indexer, behind
VLLM_ROCM_USE_AITER_FLYDSL_PAGED_MQA_LOGITS. Off by default, gfx950 only.Needs ROCm/aiter#4221. Prefill counterpart: #11.