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fix: MSVC SIMD compiling #3149

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3 changes: 2 additions & 1 deletion source/backend/cpu/x86_x64/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -86,8 +86,9 @@ if(CMAKE_SYSTEM_PROCESSOR MATCHES "(x86_64)|(X86_64)|(x64)|(X64)|(amd64)|(AMD64)
target_compile_options(MNNAVXFMA PRIVATE -DMNN_USE_SSE)
endif()
if(MSVC)
target_compile_options(MNNSSE PRIVATE /arch:AVX)
if (MNN_AVX2)
target_compile_options(MNNAVX PRIVATE /arch:AVX)
target_compile_options(MNNAVX PRIVATE /arch:AVX2)
target_compile_options(MNNAVXFMA PRIVATE /arch:AVX2)
endif()
else()
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10 changes: 3 additions & 7 deletions source/backend/cpu/x86_x64/avx/GemmInt8.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1308,13 +1308,9 @@ void _AVX_MNNFloat2Int8(const float* src, int8_t* dst, size_t sizeQuad, const fl
d0 = _mm256_add_epi32(d0, offset);
d0 = _mm256_packs_epi32(d0, _mm256_setzero_si256());
d0 = _mm256_permute4x64_epi64(d0, 0xD8);
#if defined(_MSC_VER)
__m256i x = static_cast<__m256i>(_mm256_packus_epi16(d0, _mm256_setzero_si256()));
*((int64_t*)dst + i) = x.m256i_i64[0];
#else
__v4di x = static_cast<__v4di>(_mm256_packus_epi16(d0, _mm256_setzero_si256()));
*((int64_t*)dst + i) = x[0];
#endif

__m256i x = _mm256_packus_epi16(d0, _mm256_setzero_si256());
*((int64_t*)dst + i) = _mm256_extract_epi64(x, 0);
}
}

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