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collector: pin Qwen3.8 FP8 MoE runner - #283

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Arsene12358 merged 1 commit into
yimingl/aic-1781-sglang-recipe-alignmentfrom
yimingl/aic-1781-flashinfer-case-declaration
Sep 21, 2026
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Arsene12358 merged 1 commit into
yimingl/aic-1781-sglang-recipe-alignmentfrom
yimingl/aic-1781-flashinfer-case-declaration

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Prerequisite for the dedicated AIC-1781 per-system data PRs. This intentionally remains separate from #282, which contains only the SDK/kernel-source selector.

For Qwen3.8-Max FP8-block SGLang cases on SM100 and SM103, declare the recipe-pinned flashinfer_trtllm MoE runner. The collector records the framework-verified exact lane as sglang_flashinfer_trtllm_moe. BF16 remains on the inherited Triton default.

The declaration cites the corresponding GB200 and GB300 Dynamo SGLang deployment YAMLs at commit 5fc15ee.

Validation

  • Dedicated marked collector unit test
  • Direct 117-case resolver check for SM100 and SM103
  • Ruff check and format check
  • git diff --check

The ordinary project test environment is currently blocked by its existing Maturin package-path configuration; the focused check ran in an isolated no-project environment.

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Arsene12358 requested review from a team as code owners September 18, 2026 16:09
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Arsene12358 force-pushed the yimingl/aic-1781-sglang-recipe-alignment branch from 685b151 to ae39013 Compare September 19, 2026 04:33
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Arsene12358 force-pushed the yimingl/aic-1781-flashinfer-case-declaration branch from 6c138f3 to 50a099b Compare September 19, 2026 04:33
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Arsene12358 force-pushed the yimingl/aic-1781-sglang-recipe-alignment branch from ae39013 to 380e394 Compare September 21, 2026 01:33
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Arsene12358 force-pushed the yimingl/aic-1781-flashinfer-case-declaration branch from 50a099b to ba4df42 Compare September 21, 2026 01:36
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Arsene12358 force-pushed the yimingl/aic-1781-sglang-recipe-alignment branch from 380e394 to 5a9c3b3 Compare September 21, 2026 09:24
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Arsene12358 force-pushed the yimingl/aic-1781-flashinfer-case-declaration branch from ba4df42 to 54b98e6 Compare September 21, 2026 09:48
Signed-off-by: Yiming Liu <yimingl@nvidia.com>
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Arsene12358 force-pushed the yimingl/aic-1781-flashinfer-case-declaration branch from 54b98e6 to 26dd0c2 Compare September 21, 2026 10:39
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Arsene12358 merged commit b0158dc into yimingl/aic-1781-sglang-recipe-alignment Sep 21, 2026
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Arsene12358 deleted the yimingl/aic-1781-flashinfer-case-declaration branch September 21, 2026 14:51
Arsene12358 added a commit that referenced this pull request Sep 24, 2026
* feat(perfmodel): select exact MoE kernel source

Signed-off-by: Yiming Liu <yimingl@nvidia.com>

* fix: enforce exact low-latency MoE eligibility

Signed-off-by: Yiming Liu <yimingl@nvidia.com>

* fix: preserve MoE source configuration compatibility

Signed-off-by: Yiming Liu <yimingl@nvidia.com>

* fix: preserve canonical config positional arguments

Signed-off-by: Yiming Liu <yimingl@nvidia.com>

* fix: reject ignored MoE source selections

Validate exact source selections against model metadata and the constructed native operation graph before unsupported configurations can fall back. Preserve the source through external-FPM AFD validation and explicitly reject legacy or fixed companion paths that cannot consume it. Document the selector contract and cover the actual model, memory, Task, and runner consumers.

Signed-off-by: Yiming Liu <yimingl@nvidia.com>

* collector: pin Qwen3.8 FP8 MoE runner (#283)

Signed-off-by: Yiming Liu <yimingl@nvidia.com>

* test: preserve upstream attention quantization default in config checks

Signed-off-by: Yiming Liu <yimingl@nvidia.com>

* test: align Qwen3.8 FP8 collector expectation

The deployment-specific collector declaration pins FP8 to flashinfer_trtllm on SM100 and SM103. Update the older model-case assertion that still expected the base Triton default; retain BF16 and NVFP4 coverage. The previously failing unit shard passes locally with 1930 tests passed and 6 skipped.

Signed-off-by: Yiming Liu <yimingl@nvidia.com>

---------

Signed-off-by: Yiming Liu <yimingl@nvidia.com>
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