fix: correct TRT-LLM MLA labels and GPT-OSS MXFP4 profiles

python/aisimulate/collector/README.md

@@ -116,6 +116,9 @@ capabilities.py                        — generation-time capability/denylist f
 The plan is one equation: cases = dedup(base grid ∪ model shapes), then
 intersected with hardware capability floors and minus the hang denylist.
 
+TRT-LLM MLA precision and GPT-OSS TP profile collection evidence is recorded
+in [the September 17 campaign](trtllm/gym-profiles-20260917.md).
+
 ## Whole-forward FPM campaign
 
 Use the dedicated `python3 -m collector.fpm_forward` entry point for vLLM

python/aisimulate/collector/op_backend_facts.yaml

@@ -165,7 +165,7 @@ ops:
       - {framework: "trtllm", version: "1.0.0", system: "l40s", op_name: "mla_context", kv_cache_dtype: "bfloat16", mla_dtype: "bfloat16", backends: ["trtllm_internal"], kernel_sources: ["default"]}
       - {framework: "trtllm", version: "1.0.0", system: "l40s", op_name: "mla_context", kv_cache_dtype: "fp8", mla_dtype: "bfloat16", backends: ["trtllm_internal"], kernel_sources: ["default"]}
       - {framework: "trtllm", version: "1.3.0rc20", system: "b200_sxm", op_name: "mla_context", kv_cache_dtype: "bfloat16", mla_dtype: "bfloat16", backends: ["trtllm_internal"], kernel_sources: ["default"]}
-      - {framework: "trtllm", version: "1.3.0rc20", system: "b200_sxm", op_name: "mla_context", kv_cache_dtype: "fp8", mla_dtype: "bfloat16", backends: ["trtllm_internal"], kernel_sources: ["default"]}
+      - {framework: "trtllm", version: "1.3.0rc20", system: "b200_sxm", op_name: "mla_context", kv_cache_dtype: "fp8", mla_dtype: "fp8", backends: ["trtllm_internal"], kernel_sources: ["default"]}
       - {framework: "trtllm", version: "1.3.0rc20", system: "b300_sxm", op_name: "mla_context", kv_cache_dtype: "bfloat16", mla_dtype: "bfloat16", backends: ["trtllm_internal"], kernel_sources: ["default"]}
       - {framework: "trtllm", version: "1.3.0rc20", system: "b300_sxm", op_name: "mla_context", kv_cache_dtype: "fp8", mla_dtype: "bfloat16", backends: ["trtllm_internal"], kernel_sources: ["default"]}
       - {framework: "trtllm", version: "1.3.0rc20", system: "gb200", op_name: "mla_context", kv_cache_dtype: "bfloat16", mla_dtype: "bfloat16", backends: ["trtllm_internal"], kernel_sources: ["default"]}
@@ -175,7 +175,7 @@ ops:
       - {framework: "trtllm", version: "1.3.0rc20", system: "h100_sxm", op_name: "mla_context", kv_cache_dtype: "bfloat16", mla_dtype: "bfloat16", backends: ["trtllm_internal"], kernel_sources: ["default"]}
       - {framework: "trtllm", version: "1.3.0rc20", system: "h100_sxm", op_name: "mla_context", kv_cache_dtype: "fp8", mla_dtype: "bfloat16", backends: ["trtllm_internal"], kernel_sources: ["default"]}
       - {framework: "trtllm", version: "1.3.0rc20", system: "h200_sxm", op_name: "mla_context", kv_cache_dtype: "bfloat16", mla_dtype: "bfloat16", backends: ["trtllm_internal"], kernel_sources: ["default"]}
-      - {framework: "trtllm", version: "1.3.0rc20", system: "h200_sxm", op_name: "mla_context", kv_cache_dtype: "fp8", mla_dtype: "bfloat16", backends: ["trtllm_internal"], kernel_sources: ["default"]}
+      - {framework: "trtllm", version: "1.3.0rc20", system: "h200_sxm", op_name: "mla_context", kv_cache_dtype: "fp8", mla_dtype: "fp8", backends: ["trtllm_internal"], kernel_sources: ["default"]}
       - {framework: "trtllm", version: "1.3.0rc20", system: "rtx_pro_6000_server", op_name: "mla_context", kv_cache_dtype: "bfloat16", mla_dtype: "bfloat16", backends: ["trtllm_internal"], kernel_sources: ["default"]}
       - {framework: "trtllm", version: "1.3.0rc20", system: "rtx_pro_6000_server", op_name: "mla_context", kv_cache_dtype: "fp8", mla_dtype: "bfloat16", backends: ["trtllm_internal"], kernel_sources: ["default"]}
   - op_file: custom_allreduce_perf

python/aisimulate/collector/trtllm/collect_mla.py

@@ -652,7 +652,13 @@ def kernel_func():
     log_perf(
         item_list=[
             {
-                "mla_dtype": "bfloat16",
+                # TRT-LLM quantizes context Q/K/V internally for FP8 KV on
+                # SM90/100/103/120. The BF16 Python inputs do not describe
+                # the FMHA compute precision (attentionOp.cpp:1228-1231 at
+                # c25c23f71786bad54d192893d696ce8043426eca / v1.3.0rc20).
+                "mla_dtype": (
+                    dtype_str if is_context_phase and get_sm_version() in (90, 100, 103, 120) else "bfloat16"
+                ),
                 "kv_cache_dtype": dtype_str,
                 "num_heads": num_heads,
                 "batch_size": len(context_sequence_lengths),

python/aisimulate/collector/trtllm/collect_moe.py

@@ -417,7 +417,13 @@ def run_moe_torch(
         "w4afp8": 4,
         "nvfp4": 4,
     }[moe_type]
-    if (inter_size // moe_tp_size) % (256 // _weight_bits) != 0:
+    # Blackwell MXFP4 uses TRTLLMGenFusedMoE, whose weight loader pads
+    # before TP sharding. Its logical intermediate size need not satisfy
+    # the CUTLASS plugin's physical-weight alignment check below.
+    # TensorRT-LLM v1.3.0rc20, c25c23f71786bad54d192893d696ce8043426eca:
+    # _torch/modules/fused_moe/quantization.py:5634-5659,5705-5735.
+    native_mxfp4_padding = moe_type in _MXFP4_MOE_TYPES and 100 <= sm_version < 120
+    if not native_mxfp4_padding and (inter_size // moe_tp_size) % (256 // _weight_bits) != 0:
         raise ValueError(
             f"TRT-LLM fused MoE requires the TP-sharded intermediate size to be a multiple "
             f"of 256/weight_bits = {256 // _weight_bits} for {moe_type} (TLLM_CHECK_WITH_INFO "