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@kg kg commented Aug 18, 2015

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rossberg added a commit that referenced this pull request Aug 18, 2015
Update test runner to compare test output with expected test output
@rossberg rossberg merged commit 559a1ff into WebAssembly:master Aug 18, 2015
alexcrichton pushed a commit to alexcrichton/spec that referenced this pull request Nov 18, 2019
This change adds a variable shuffle instruction to SIMD proposal.

When indices are out of range, the result is specified as 0 for each
lane. This matches hardware behavior on ARM and RISCV architectures.

On x86_64 and MIPS, the hardware provides instructions that can select 0
when the high bit is set to 1 (x86_64) or any of the two high bits are
set to 1 (MIPS). On these architectures, the backend is expected to emit
a pair of instructions, saturating add (saturate(x + (128 - 16)) for
x86_64) and permute, to emulate the proposed behavior.

To distinguish variable shuffles with immediate shuffles, existing
v8x16.shuffle instruction is renamed to v8x16.shuffle2_imm to be
explicit about the fact that it shuffles two vectors with an immediate
argument.

This naming scheme allows for adding variants like v8x16.shuffle2 and
v8x16.shuffle1_imm in the future.

Fixes WebAssembly#68.
Contributes to WebAssembly#24.
Fixes WebAssembly#11.
alexcrichton pushed a commit to alexcrichton/spec that referenced this pull request Jul 28, 2020
dhil pushed a commit to dhil/webassembly-spec that referenced this pull request Mar 2, 2023
dhil added a commit to dhil/webassembly-spec that referenced this pull request Oct 20, 2023
Merge with WebAssembly/spec and WebAssembly/gc
dhil added a commit to dhil/webassembly-spec that referenced this pull request Apr 12, 2024
Squashed commit of the following:

* Typed Continuations explainer document

* Typed Continuations formal spec

* Typed Continuations examples

(Typed Continuations reference interpreter implementation to follow
separately.)

Co-authored-by: Daniel Hillerström <[email protected]>
Co-authored-by: Andreas Rossberg <[email protected]>
rossberg pushed a commit that referenced this pull request Nov 6, 2024
CharlieTap pushed a commit to CharlieTap/spec that referenced this pull request Sep 25, 2025
Some recent [benchmarking] had a surprising result I wasn't trying to
dig for. Notably as summarized in WebAssembly#11 some more use cases of widening
multiplication being more optimal than 128-by-128 bit multiplication
have started to arise. Coupled with local benchmarking confirming that
both on x64 and aarch64 that widening multiplication has more support in
LLVM for more optimal lowerings and was easier to implement in Wasmtime
than the 128-by-128 bit multiplication once various optimizations were
implemented.

In the end `i64.mul128`, which was primarily motivated by "feels
cleaner" and "should have the same performance" as widening
multiplication, does not appear to have the expected
performance/implementation tradeoff. Getting an as-performant
`i64.mul128` instruction relative to `i64.mul_wide_{s,u}` has required
more work than expected and so the balance of concerns has me now
tipping away from `i64.mul128`, despite it being "less clean" compared
to the add/sub opcodes proposed in this PR.

Closes WebAssembly#11

[benchmarking]: WebAssembly#6 (comment)
stevenfontanella pushed a commit to stevenfontanella/spec that referenced this pull request Nov 12, 2025
…WebAssembly#11)

Previously we would fail to update from a repo if it contained any merge
conflicts at all.  Now we only fail if there is merge conflict in the
tests themselves.

This current unblock the merging of reference-types, threads, and
multi-value.  The only repo with merge conflicts in the tests themselves
is sign-extension-ops.
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2 participants