examples: add TurboAnchorKV evaluation harness - #333
Conversation
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Thanks @giveen for sharing the AnchorKV CPU reference branch. Its history directly informed the useful storage subset now in this PR:
TurboAnchorKV now uses the packed-anchor and slot-map ideas with its own ablated algorithm: uniform anchors, residual-norm allocation, bf16 projection metadata, and the existing TurboQuant residual codecs. Reconstruction is performed solely from the packed representation and its byte accounting includes all stored arrays. We intentionally did not import the broader cache lifecycle, shared scratch, graph op, CUDA path, approximate utility scorer, or custom 2-bit codec. Those remain useful implementation references if the quality gates eventually justify a production kernel. Validation after the selective port:
The README links the originating branch and commits so the lineage stays visible. Appreciate the groundwork and especially the slot-order bug history; it gave us the right negative test to add. |
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My non-computer-programmer brain could only go so far, so I am glad you are picking this up. |
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What this is
TurboAnchorKV is an experimentally derived two-tier cold-prompt KV algorithm combining anchor projection with TurboQuant residual coding. The selected design is the result of ablation, not a direct copy of AnchorKV:
The intended user benefit, if quality gates can be met, is substantially longer contexts and more concurrent long-context sessions within the same unified-memory budget, with less cold-KV bandwidth and no retraining.
What this PR adds
llama-turboanchorkv, an offline analyze/PPL/generation harnessThis does not add a compact runtime cache allocation or attention kernel. It reconstructs the packed state into the existing dense cache to test algorithmic quality first.
Implementation lineage
Thanks @giveen for the AnchorKV CPU reference work. The packed storage and slot-map design were adapted from:
875a1f370: initial packed storage formatdb851cea8: precomputed O(1) residual-slot indices6ac311a72: residual slot-order bug fix and graph decompression workThe reference cache lifecycle, shared scratch, graph operator, CUDA path, approximate utility scorer, and custom 2-bit codec were reviewed but not imported. The README links the branch and originating commits.
Current evidence
Gemma 4 12B Q4_K_XL, Metal, f16 KV, about 8.5K prefix tokens:
The identity control validates the evaluator, packed slot ordering is directly tested, and retrieval remains promising. General next-token quality does not pass a production-parity gate. This PR is therefore a testable research foundation, not a production mode.
How to review and reproduce
See
examples/turboanchorkv/README.mdfor build commands, the identity gate, Wikitext continuation evaluation, needle grids, environment controls, and expected output.Validated locally with:
cmake --build build-anchorkv --target llama-turboanchorkv test-turbo-quant -j 10ctest --test-dir build-anchorkv -R test-turboanchorkv\|test-turbo-quant --output-on-failure./build-anchorkv/bin/llama-turboanchorkv --self-testxcrun clang-format --dry-run --Werror examples/turboanchorkv/turboanchorkv.cppgit diff --checkRelates to #332.
AI disclosure
AI assistance was used for paper analysis, implementation, test construction, measurements, and documentation. The repository owner requested this work and remains responsible for review and acceptance.