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docs/configuring.rst

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@@ -11,7 +11,7 @@ Specifying a configuration file
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-------------------------------
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The PeakRDL configuration file can be explicitly specified using the
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``--peakrdl-cfg`` option. Otherwise, Peakrdl searches for a configuration file
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``--peakrdl-cfg`` option. Otherwise, PeakRDL searches for a configuration file
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in the following order, and uses the first one it finds:
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1. ``peakrdl.toml`` in the current working directory
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user_template_dir = "../path/to/html_templates"
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extra_doc_properties = ["hw", "my_udp"]
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See the plugin-specific reference documents for more details onhow they can be configured.
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See the plugin-specific reference documents for more details on how they can be configured.

docs/for-devs/exporter-plugin.rst

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@@ -101,7 +101,7 @@ An alternative method that avoids having to make your own pip-installable
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package is to specify the plugin import entry point via the PeakRDL
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configuration file.
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For example, if your plugin descriptor was deifned in a Python file located in
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For example, if your plugin descriptor was defined in a Python file located in
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``/opt/my_peakrdl_plugins/my_exporter.py``, the following configuration would
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instruct PeakRDL to load it:
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docs/for-devs/importer-plugin.rst

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@@ -98,7 +98,7 @@ An alternative method that avoids having to make your own pip-installable
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package is to specify the plugin import entry point via the PeakRDL
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configuration file.
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For example, if your plugin descriptor was deifned in a Python file located in
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For example, if your plugin descriptor was defined in a Python file located in
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``/opt/my_peakrdl_plugins/my_importer.py``, the following configuration would
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instruct PeakRDL to load it:
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docs/gallery.rst

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@@ -15,8 +15,8 @@ For more details, see the individual command's ``--help`` flag.
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peakrdl <subcommand> --help
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Generate syntesizable SystemVerilog RTL
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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Generate synthesizable SystemVerilog RTL
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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.. code-block:: bash
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peakrdl regblock atxmega_spi.rdl -o regblock/ --cpuif apb3-flat

docs/systemrdl-tutorial.rst

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@@ -104,7 +104,7 @@ Specifying the position of an instance
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Fields
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^^^^^^
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If left unpecified, the bit-position of a field is allocated sequentially.
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If left unspecified, the bit-position of a field is allocated sequentially.
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Otherwise, you can explicitly define the field position:
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.. code-block:: systemrdl
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my_field_type field_1[7:0] = 42; // field has a reset value of 42
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Addressible Components
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Addressable Components
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^^^^^^^^^^^^^^^^^^^^^^
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``reg``, ``regfile``, ``addrmap`` and ``mem`` components all get allocated to
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an address in the register map.

peakrdl-cli/pyproject.toml

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]
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description = "Command-line tool for control/status register automation and code generation."
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readme = "README.md"
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license = {file = "LICENSE"}
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license = {text = "GPLv3"}
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keywords = [
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"SystemRDL", "PeakRDL", "CSR", "compiler", "tool", "registers", "generator",
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"C", "header", "software", "Verilog", "SystemVerilog", "register abstraction layer",

peakrdl-cli/src/peakrdl/importer.py

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.. note::
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This should not attempt to exaustively validate the file's
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This should not attempt to exhaustively validate the file's
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correctness.
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Instead, it is recommended to open the file, and perform a low-cost

peakrdl-cli/src/peakrdl/subcommand.py

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Not all exporter configuration options are appropriate as command-line arguments.
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For options that will likely remain static for a given user/organization,
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consider using the PeakRDL TOML configuration mechanism via the
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``cft_schema`` and ``cfg`` class members.
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``cfg_schema`` and ``cfg`` class members.
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Parameters
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----------

peakrdl/pyproject.toml

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]
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description = "Toolchain for control/status register automation and code generation."
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readme = "README.md"
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license = {file = "LICENSE"}
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license = {text = "GPLv3"}
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keywords = [
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"SystemRDL", "PeakRDL", "CSR", "compiler", "tool", "registers", "generator",
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"C", "header", "software", "Verilog", "SystemVerilog", "register abstraction layer",

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