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test: Adapt tests
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SergioGasquez committed Jan 13, 2025
1 parent 82b7284 commit 2a522b3
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Showing 2 changed files with 18 additions and 20 deletions.
15 changes: 7 additions & 8 deletions esp-hal/src/uart.rs
Original file line number Diff line number Diff line change
Expand Up @@ -634,14 +634,14 @@ where
}

/// Writes bytes
pub fn write_bytes(&mut self, data: &[u8]) -> Result<usize, Error> {
pub fn write_bytes(&mut self, data: &[u8]) -> usize {
let count = data.len();

for &byte in data {
self.write_byte(byte);
}

Ok(count)
count
}

fn write_byte(&mut self, word: u8) {
Expand Down Expand Up @@ -810,7 +810,7 @@ where
self.uart.info().apply_config(config)
}

/// Read a byte from the UART
// Read a byte from the UART
fn read_byte(&mut self) -> u8 {
cfg_if::cfg_if! {
if #[cfg(esp32s2)] {
Expand Down Expand Up @@ -1059,7 +1059,7 @@ where
}

/// Write bytes out over the UART
pub fn write_bytes(&mut self, data: &[u8]) -> Result<usize, Error> {
pub fn write_bytes(&mut self, data: &[u8]) -> usize {
self.tx.write_bytes(data)
}

Expand Down Expand Up @@ -1253,7 +1253,7 @@ where

#[inline]
fn write_str(&mut self, s: &str) -> Result<(), Self::Error> {
self.write_bytes(s.as_bytes())?;
self.write_bytes(s.as_bytes());
Ok(())
}
}
Expand All @@ -1274,8 +1274,7 @@ where
{
#[inline]
fn write_str(&mut self, s: &str) -> core::fmt::Result {
self.write_bytes(s.as_bytes())
.map_err(|_| core::fmt::Error)?;
self.write_bytes(s.as_bytes());
Ok(())
}
}
Expand Down Expand Up @@ -1372,7 +1371,7 @@ where
Dm: DriverMode,
{
fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
self.write_bytes(buf)
Ok(self.write_bytes(buf))
}

fn flush(&mut self) -> Result<(), Self::Error> {
Expand Down
23 changes: 11 additions & 12 deletions hil-test/tests/uart.rs
Original file line number Diff line number Diff line change
Expand Up @@ -37,26 +37,24 @@ mod tests {

#[test]
fn test_send_receive(mut ctx: Context) {
ctx.uart.write_byte(0x42);
let read = ctx.uart.read_byte();
assert_eq!(read, 0x42);
ctx.uart.write_bytes(&[42u8]);
let mut byte = [0u8; 1];
_ = ctx.uart.read_bytes(&mut byte);
assert_eq!(byte[0], 0x42);
}

#[test]
fn test_send_receive_buffer(mut ctx: Context) {
const BUF_SIZE: usize = 128; // UART_FIFO_SIZE

let data = [13; BUF_SIZE];
let written = ctx.uart.write_bytes(&data).unwrap();
let written = ctx.uart.write_bytes(&data);
assert_eq!(written, BUF_SIZE);

let mut buffer = [0; BUF_SIZE];
let mut i = 0;

while i < BUF_SIZE {
buffer[i] = ctx.uart.read_byte();
i += 1;
}
_ = ctx.uart.read_bytes(&mut buffer);

assert_eq!(data, buffer);
}

Expand Down Expand Up @@ -85,10 +83,11 @@ mod tests {
.with_clock_source(clock_source),
)
.unwrap();
ctx.uart.write_byte(byte_to_write);
let read = ctx.uart.read_byte();
ctx.uart.write_bytes(&[byte_to_write]);
let mut byte = [0u8; 1];
_ = ctx.uart.read_bytes(&mut byte);

assert_eq!(read, byte_to_write);
assert_eq!(byte[0], byte_to_write);
byte_to_write = !byte_to_write;
}
}
Expand Down

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