[AMD] Bump GLM-5.2 MI355X SGLang daily image / 更新 GLM-5.2 MI355X SGLang daily 镜像 - #3081
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将 GLM-5.2 MI355X SGLang daily 镜像更新至 20260913，并为 ROCm 启用 v2 fused top-k。
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将性能变更记录链接更新为新建的 PR #3081。
…lang-daily-0913 # Conflicts: # perf-changelog.yaml
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Beyond the inline finding, I also checked the squashfs image-cache path in runners/launch_mi355x-amds.sh for the image-tag bump: SQUASH_FILE is derived from the full $IMAGE string (including the tag), so the 20260910 -> 20260913 bump produces a distinct squash filename rather than reusing a stale cached import — not affected.
Extended reasoning...
Beyond the already-reported inline finding on the pr-link: TBD placeholder in perf-changelog.yaml, I independently verified one of the ruled-out candidates: runners/launch_mi355x-amds.sh line 263 builds SQUASH_FILE="/var/lib/squash/$(echo "$IMAGE" | sed 's/[\/:@#]/_/g').sqsh", so the cache key is derived from the entire image reference string, tag included. Since configs/amd-master.yaml bumps the tag from -20260910 to -20260913, the resulting squash filename differs from any prior cached import, so the unsquashfs -l validity check at line 278 cannot spuriously treat a stale 20260910 squashfs blob as valid for the new 20260913 image — this candidate concern does not hold. This is a narrow, concrete point beyond the inline finding, worth surfacing since it was a plausible enough concern to have been raised by the earlier review pass.
| pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/3040 | ||
| - "Update the SGLang ROCm image from lmsysorg/sglang-rocm:v0.5.19-rocm720-mi35x-20260910 to lmsysorg/sglang-rocm:v0.5.19-rocm720-mi35x-20260913. Enable the v2 fused top-k path for GLM-5.x on ROCm after sgl-project/sglang#36684 and #36851." | ||
| - "将 SGLang ROCm 镜像从 lmsysorg/sglang-rocm:v0.5.19-rocm720-mi35x-20260910 更新到 lmsysorg/sglang-rocm:v0.5.19-rocm720-mi35x-20260913；在 sgl-project/sglang#36684 和 #36851 合入后，为 ROCm 上的 GLM-5.x 启用 v2 fused top-k 路径。" | ||
| pr-link: TBD |
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🔴 The new entry's pr-link is the literal string "TBD", but the merge automation (infx/workflows/prepare_perf_changelog_merge.py, invoked by utils/merge_with_reuse.sh ) only accepts "XXX" or the full ".../pull/XXX" URL as a placeholder — any other value raises ChangelogValidationError("appended entry N has unexpected pr-link"), which will fail the reuse-assisted merge for this PR. Fix: use the canonical placeholder "https://github.com/SemiAnalysisAI/InferenceX/pull/XXX" (matching every other pending entry in this file) instead of "TBD".
Extended reasoning...
utils/merge_with_reuse.sh calls infx.workflows.prepare_perf_changelog_merge with --pr-number set to the real PR number. canonicalize_appended_links() parses the appended entries and, for each, checks if link not in PR_LINK_PLACEHOLDERS: raise ChangelogValidationError(f'appended entry {index+1} has unexpected pr-link {link!r}'). PR_LINK_PLACEHOLDERS = {'XXX', 'https://github.com/SemiAnalysisAI/InferenceX/pull/XXX'}. This entry's pr-link is 'TBD' (perf-changelog.yaml:7514), which matches neither placeholder nor the canonical link, so the merge-preparation step aborts and the automated reuse-merge cannot canonicalize the link, blocking the PR from merging via the normal path until someone manually edits the placeholder to the accepted 'XXX' form. Every prior pending entry in the file (e.g. line 5598) uses the accepted 'https://github.com/SemiAnalysisAI/InferenceX/pull/XXX' form, confirming 'TBD' is an out-of-convention value this diff introduced.
Verification: normal. The appended entry at perf-changelog.yaml:7514 uses pr-link: TBD. The merge automation utils/merge_with_reuse.sh (line 178-184, under set -euo pipefail at line 17) runs python3 -m infx.workflows.prepare_perf_changelog_merge canonicalize --pr-number "$PR". In infx/workflows/prepare_perf_changelog_merge.py:83-114, canonicalize_appended_links() iterates the entries appended by…
在 GLM-5.2 TP4/EP4 的并发 1 和 2 配置中关闭 HiCache，并为更高并发保留 DRAM offloading。
…0913' into dev/jiejing/glm5.2-sglang-daily-0913
并发 1 和 2 仅运行 TP8/EP1，并关闭 HiCache；TP4/EP4 HiCache 从并发 4 开始。
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see unofficial run visualizer at https://inferencex.semianalysis.com/inference?unofficialRun=34778937189 |
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see unofficial run visualizer at https://inferencex.semianalysis.com/inference?unofficialRun=34783501425 |
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/stage-results 34783501425 |
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@chunfangamd staged run 34783501425: https://inferencemax-app-git-staging-semianalysisai.vercel.app/inference?i_dates=2026-09-13~r34783501425 This run remains available across future |
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/reuse-sweep-run 34783501425 |
- Update Docker image from v0.5.19-rocm720-mi35x-20260910 to v0.5.19-rocm720-mi35x-20260913 for the MI355X MXFP4 cells. - Add SGLANG_OPT_USE_TOPK_V2=true env to all four MXFP4 cells (low-latency, balanced, high-throughput, mtp-314): the v2 fused top-k kernel is now available for GLM-5.x on ROCm after upstream sgl-project#36684 and sgl-project#36851. - Update the MTP validation note in the MDX cookbook page to reference the new image and document the TOPK_V2 enablement. Upstream InferenceX PR: SemiAnalysisAI/InferenceX#3081
Add a documentation note explaining the two-arm InferenceX sweep from SemiAnalysisAI/InferenceX#3081: - TP4/EP4 + HiCache DRAM offload at concurrency >= 4 - TP8/EP1 without KV offloading at low concurrency (c <= 2) The portable cookbook commands intentionally omit HiCache knobs; users can toggle them via the Playground's Hierarchical KV Cache card.
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As a PR reviewer and CODEOWNER, I have reviewed this and have:
- Verified that as of the moment of typing this, this is the latest version of PR_REVIEW_CHECKLIST.md
- Verified that the general code quality meets the InferenceX standard and does not make the code quality any worse.
- Verified that this PR has passed PR validation. Please link to GitHub Action workflow that shows this. https://github.com/SemiAnalysisAI/InferenceX/actions/runs/34783501425
- Verified that this PR passes evals. Please link to GitHub Action workflow that shows this. https://github.com/SemiAnalysisAI/InferenceX/actions/runs/34783501425
- Verified that speculative decoding PRs uses chat templates to align the AL distribution to real world
- For agentic workloads: verified that speculative-decoding configs (EAGLE / MTP / draft models) run with simulated synthetic acceptance, with the acceptance-length value taken from the committed golden AL curve in golden_al_distribution/ for that model, thinking mode, and draft length. A submission may choose any supported draft length, but it may not substitute a different acceptance target.
- Verified against the current MODELS.md that this PR does not submit a deprecated model, scenario, or model-scenario combination.
- Verified that the model architecture isn't changed with benchmark hacks like using --hf-overrides to skipping indexer for every x layers on models that don't natively support this. As a general rule, we won't accept optimizations that reduces the number of model architecture FLOPs. Anything that makes that same computation run faster is fair game; FLOPs at lower precisions is fine, given that the config passes private evals. As an general north star princple, we should only use optimizations which is used in production by customers that care about accuracy
- If an company claims that they support vLLM/SGLang as first class LLM inference engines on their hardware, I have verified that the respective vLLM submission made using upstream https://hub.docker.com/u/vllm docker repo, upstream SGLang https://hub.docker.com/u/lmsysorg docker repo. The only exceptions are for new hardware, such as MI455X UALoE72, Vera Rubin NVL72, Rubin NVL8, etc., and for new model architectures where there is an actual reason why vLLM/SGLang does not fundamentally support them yet as supported by vLLM/SGLang community maintainers
- If an company claims that they support vLLM/SGLang as first class upstream in-tree LLM inference engines on their hardware, I have have verified that the respective vLLM/SGLang submission has been made before additional frameworks (TRT-LLM, ATOM, etc.). The only exceptions are for new hardware, such as MI455X UALoE72, Vera Rubin NVL72, Rubin NVL8, etc., and for new model architectures where there is an actual reason why vLLM/SGLang does not fundamentally support them yet.
- Verified that every single-node vLLM/SGLang recipe in this PR is documented in the official vLLM recipes and/or the SGLang cookbook:
- I linked the corresponding upstream PR in the vLLM recipe repo or SGLang repo and verified that it is MERGED before this InferenceX PR merges. An opened, draft, or closed-without-merge upstream PR does not satisfy this requirement. If the matching recipe was already published, I linked the published recipe/cookbook page in the additional detail section below.
- Verified that this PR does not patch the inference engine or serving stack — the pinned image must run as shipped. This covers .patch files / git apply / patch, inline patches embedded in benchmark scripts (e.g. a python3/sed heredoc that rewrites installed engine sources before serving), in-place edits of site-packages, monkey-patching, overwriting container files, and installing forked/rebuilt engine wheels on top of the pinned image. The only exception is a patch covered by a filled-out waiver at docs/waiver/
<PR_NUMBER>.md— named after the PR that introduces the patch and filed in that same PR, stating what is patched, why the unmodified upstream image cannot run this benchmark, the upstream PR/issue link, and the removal plan — which I have linked below in the additional detail section. - If this PR uses
append-only: true, verified that it only adds generated points or recipe variants inside a selected existing config/scenario and existing same-image visual curve: every previously generated point remains present with the same recipe, no prior point is removed or rerun, and every benchmark-affecting change in the complete diff can affect only the corresponding newly appended points (never an existing point), regardless of which file contains it. - If any of the above criteria cannot reasonably be satisfied, I have provided additional reasoning below.
Additional detail section:
- insert any additional info here
sgl-project/sglang#39406
Signed: @chunfangamd
✅✅✅ Verdict: PASS ✅✅✅✅ Check 0 (CODEOWNER): PASS — |
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Description / 描述
English
This PR refreshes the GLM-5.2-MXFP4 SGLang AgentX configuration on MI355X:
lmsysorg/sglang-rocm:v0.5.19-rocm720-mi35x-20260910tolmsysorg/sglang-rocm:v0.5.19-rocm720-mi35x-20260913.SGLANG_OPT_USE_TOPK_V2=truefor GLM-5.x on ROCm. Upstream PRs sgl-project/sglang#36684 and sgl-project/sglang#36851 made the v2 fused top-k kernel available and enabled it for this model family on ROCm.kv-offloading: none; TP4/EP4 keeps HiCache DRAM offloading at concurrency 4, 8, 10, and 12.中文
本 PR 更新 MI355X 上的 GLM-5.2-MXFP4 SGLang AgentX 配置：
lmsysorg/sglang-rocm:v0.5.19-rocm720-mi35x-20260910更新到lmsysorg/sglang-rocm:v0.5.19-rocm720-mi35x-20260913。SGLANG_OPT_USE_TOPK_V2=true。上游 PR sgl-project/sglang#36684 和 sgl-project/sglang#36851 已使 v2 fused top-k kernel 可用，并为该模型系列在 ROCm 上启用此路径。kv-offloading: none；TP4/EP4 在并发 4、8、10 和 12 继续使用 HiCache DRAM offloading。perf-changelog.yaml文件末尾追加对应的性能变更记录。Type of Change / 变更类型
Validation / 验证
sha256:d1a7c4cae3870711a5548cfe38e0b33db4c61c8977b04f66b7ab9b3bc1769a64.bash -n benchmarks/single_node/agentic/glm5.2_fp4_mi355x_sglang_mtp.shconfigs/amd-master.yaml,configs/runners.yaml, andperf-changelog.yamlwith PyYAML.glm5.2-fp4-mi355x-sglang-agentic-mtpmatrix and confirmed:c=1,2produce only TP8/EP1 points with KV offloading disabled; TP4/EP4 produces onlyc=4,8,10,12with HiCache DRAM offloading; all 8 points use the 20260913 image with MTP.git diff --checkChecklist / 检查清单
perf-changelog.yamlwithout modifying historical entries. / 已在perf-changelog.yaml末尾追加新条目，未修改历史记录。Note
Low Risk
Configuration-only benchmark and image pin changes; no application runtime code paths are modified.
Overview
Updates the GLM-5.2 FP4 MI355X SGLang agentic-MTP benchmark to a newer ROCm image (
…-20260913) and turns onSGLANG_OPT_USE_TOPK_V2=truein the launch script, matching upstream SGLang ROCm support for the v2 fused top-k path on GLM-5.x.The
glm5.2-fp4-mi355x-sglang-agentic-mtpsearch space is narrowed so concurrency 1 and 2 run only on TP8/EP1 with GPU-resident KV; TP4/EP4 HiCache DRAM offload is kept for 4, 8, 10, and 12 only. Aperf-changelog.yamlentry documents the image bump, kernel flag, and concurrency/arm split.Reviewed by Cursor Bugbot for commit a5561b6. Bugbot is set up for automated code reviews on this repo. Configure here.