feat(minimaxm3-fp4-b300-dynamo-vllm-tp1): bump vLLM nightly to 5e35a6f4, enable cutlass MSA decode / 更新 minimaxm3-fp4-b300-dynamo-vllm tp1 配置 vLLM 镜像至 5e35a6f4，启用 cutlass MSA 解码后端 - #2473
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…f4, enable cutlass MSA decode backend 中文：将 minimaxm3-fp4-b300-dynamo-vllm-8k1k-tp1 和 tp1-tep4 vLLM 镜像升级至 nightly-5e35a6f4f9bbc217c599692157ca985c894373f7，更新 B300 FP4 tp1 相关 recipe YAML，并启用 VLLM_MINIMAX_M3_MSA_DECODE_BACKEND=cutlass Co-Authored-By: Claude Sonnet 4.6 (1M context) <noreply@anthropic.com>
…e bump and cutlass MSA backend PR Co-Authored-By: Claude Sonnet 4.6 (1M context) <noreply@anthropic.com>
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LGTM — mechanical vLLM nightly bump with a new decode-backend env flag, consistently applied.
Extended reasoning...
Overview
This PR bumps the vLLM nightly image tag (4080263b... → 5e35a6f4...) for the two MiniMax-M3 FP4 B300 tp1 sweep configs, and adds VLLM_MINIMAX_M3_MSA_DECODE_BACKEND=cutlass to the prefill/decode environments of the 7 associated recipe YAMLs. It also updates configs/nvidia-master.yaml's two corresponding top-level image: fields and appends a perf-changelog.yaml entry. No code paths, launcher logic, or non-MiniMax-M3-fp4-tp1 configs are touched.
Security risks
None. This only changes a container image tag and a benchmark environment variable in YAML config/recipe files — no code execution paths, auth, or secrets are involved.
Level of scrutiny
Low. This is a config-only benchmark recipe change of the same kind as routine nightly image bumps in this repo. I cross-checked that the image tag was updated consistently in all 7 recipe YAMLs and in both corresponding nvidia-master.yaml entries (minimaxm3-fp4-b300-dynamo-vllm-8k1k-tp1 and ...-tp1-tep4), and that the new env var was added to both prefill and decode environments in every touched recipe. Other unrelated config keys (fp8, mtp, gb300 variants) correctly retain their own image tags, confirming the change is properly scoped.
Other factors
The PR carries the full-sweep-fail-fast label so the benchmark sweep will validate the new image/backend combination before merge; the change itself is easily revertible (a tag/env-var change) if the sweep fails.
…rom prefill (no cudagraph) 中文：从预填充环境中移除 VLLM_MINIMAX_M3_MSA_DECODE_BACKEND=cutlass（预填充工作进程不使用 CUDA graph）
…or cutlass MSA decode, not env var 中文：将 decode_environment 中的 VLLM_MINIMAX_M3_MSA_DECODE_BACKEND 替换为解码侧 attention-config JSON 中的 minimax_m3_msa_decode_backend 字段 Co-Authored-By: Claude Sonnet 4.6 (1M context) <noreply@anthropic.com>
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see unofficial run visualizer at https://inferencex.semianalysis.com/inference?unofficialRun=30824027163 |
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see unofficial run visualizer at https://inferencex.semianalysis.com/inference?unofficialRun=30828231519 |
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see unofficial run visualizer at https://inferencex.semianalysis.com/inference?unofficialRun=30828231519 |
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/reuse-sweep-run |
kedarpotdar-nv
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As a PR reviewer and CODEOWNER, I have reviewed this and have:
- Verified that as of the moment of typing this, this is the latest version of PR_REVIEW_CHECKLIST.md
- Verified that the general code quality meets the InferenceX standard and does not make the code quality any worse.
- Verified that this PR has passed PR validation. Run Sweep 30828231519, attempt 2
- Verified that this PR passes evals. Run Sweep 30828231519, attempt 2
- Verified that speculative decoding PRs uses chat templates to align the AL distribution to real world
- For agentic workloads: verified that speculative-decoding configs (EAGLE / MTP / draft models) run with simulated synthetic acceptance, with the acceptance-length value taken from the committed golden AL curve in golden_al_distribution/ for that model, thinking mode, and draft length. A submission may choose any supported draft length, but it may not substitute a different acceptance target.
- Verified that the model architecture isn't changed with benchmark hacks like using --hf-overrides to skipping indexer for every x layers on models that don't natively support this. As a general rule, we won't accept optimizations that reduces the number of model architecture FLOPs. Anything that makes that same computation run faster is fair game; FLOPs at lower precisions is fine, given that the config passes private evals. As an general north star princple, we should only use optimizations which is used in production by customers that care about accuracy
- If an company claims that they support vLLM/SGLang as first class LLM inference engines on their hardware, I have verified that the respective vLLM submission made using upstream https://hub.docker.com/u/vllm docker repo, upstream SGLang https://hub.docker.com/u/lmsysorg docker repo. The only exceptions are for new hardware, such as MI455X UALoE72, Vera Rubin NVL72, Rubin NVL8, etc., and for new model architectures where there is an actual reason why vLLM/SGLang does not fundamentally support them yet as supported by vLLM/SGLang community maintainers
- If an company claims that they support vLLM/SGLang as first class upstream in-tree LLM inference engines on their hardware, I have have verified that the respective vLLM/SGLang submission has been made before additional frameworks (TRT-LLM, ATOM, etc.). The only exceptions are for new hardware, such as MI455X UALoE72, Vera Rubin NVL72, Rubin NVL8, etc., and for new model architectures where there is an actual reason why vLLM/SGLang does not fundamentally support them yet.
- Verified that every single-node vLLM/SGLang recipe in this PR is documented in the official vLLM recipes and/or the SGLang cookbook:
- I linked the corresponding upstream PR in the vLLM recipe repo or SGLang repo and verified that it is MERGED before this InferenceX PR merges. An opened, draft, or closed-without-merge upstream PR does not satisfy this requirement. If the matching recipe was already published, I linked the published recipe/cookbook page in the additional detail section below.
- Verified that this PR does not patch the inference engine or serving stack — the pinned image must run as shipped. This covers .patch files / git apply / patch, inline patches embedded in benchmark scripts (e.g. a python3/sed heredoc that rewrites installed engine sources before serving), in-place edits of site-packages, monkey-patching, overwriting container files, and installing forked/rebuilt engine wheels on top of the pinned image. The only exception is a patch covered by a filled-out waiver at docs/waiver/
<PR_NUMBER>.md— named after the PR that introduces the patch and filed in that same PR, stating what is patched, why the unmodified upstream image cannot run this benchmark, the upstream PR/issue link, and the removal plan — which I have linked below in the additional detail section. - If any of the above criteria cannot reasonably be satisfied, I have provided additional reasoning below.
Additional detail section:
- Scope: multi-node disaggregated STP only; speculative decoding, Agentic golden-AL, and single-node recipe requirements are not applicable.
- Exact-head evidence: Run Sweep 30828231519, attempt 2 ran on
c561626b06d2fc2000691f132024f8aad203d7bf; all 7 selected throughput jobs and all 7 selected eval jobs passed. The throughput aggregate contains 17 result points because three topologies cover multiple concurrency values. GSM8K scores were0.948446–0.958302, above the0.90threshold, using the upstreamvllm/vllm-openai:nightly-5e35a6f4f9bbc217c599692157ca985c894373f7image. - All 7 referenced B300 FP4 recipe files pin the same image and set
minimax_m3_msa_decode_backend: cutlassin the decode-sideattention-config. This PR introduces no FLOP-reducing, speculative-decoding, Agentic, or inference-engine patching changes. - Accepted non-functional documentation nit: the PR summary and new
perf-changelog.yamldescription still describe the supersededVLLM_MINIMAX_M3_MSA_DECODE_BACKENDprefill/decode environment-variable approach. The final runnable configuration consistently uses the decode-sideattention-configfield instead. - Accepted mergeability caveat: current
mainconflicts with this head only in the append-onlyperf-changelog.yaml; approval does not resolve that conflict. - Existing authorized reuse command: #2473 (comment)
Signed: kedarpotdar-nv
中文：解决仅追加性能变更日志的合并冲突。
…f4, enable cutlass MSA decode / 更新 minimaxm3-fp4-b300-dynamo-vllm tp1 配置 vLLM 镜像至 5e35a6f4，启用 cutlass MSA 解码后端 (#2473) * feat(minimaxm3-fp4-b300-dynamo-vllm-tp1): bump vLLM nightly to 5e35a6f4, enable cutlass MSA decode backend 中文：将 minimaxm3-fp4-b300-dynamo-vllm-8k1k-tp1 和 tp1-tep4 vLLM 镜像升级至 nightly-5e35a6f4f9bbc217c599692157ca985c894373f7，更新 B300 FP4 tp1 相关 recipe YAML，并启用 VLLM_MINIMAX_M3_MSA_DECODE_BACKEND=cutlass Co-Authored-By: Claude Sonnet 4.6 (1M context) <noreply@anthropic.com> * chore(perf-changelog): record minimaxm3-fp4-b300-dynamo-vllm-tp1 image bump and cutlass MSA backend PR Co-Authored-By: Claude Sonnet 4.6 (1M context) <noreply@anthropic.com> * fix(minimaxm3-fp4-b300-dynamo-vllm-tp1): remove cutlass MSA env var from prefill (no cudagraph) 中文：从预填充环境中移除 VLLM_MINIMAX_M3_MSA_DECODE_BACKEND=cutlass（预填充工作进程不使用 CUDA graph） * fix(minimaxm3-fp4-b300-dynamo-vllm-tp1): use attention_config field for cutlass MSA decode, not env var 中文：将 decode_environment 中的 VLLM_MINIMAX_M3_MSA_DECODE_BACKEND 替换为解码侧 attention-config JSON 中的 minimax_m3_msa_decode_backend 字段 Co-Authored-By: Claude Sonnet 4.6 (1M context) <noreply@anthropic.com> --------- Co-authored-by: Claude Sonnet 4.6 (1M context) <noreply@anthropic.com> Co-authored-by: adibarra <93070681+adibarra@users.noreply.github.com>
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Summary
minimaxm3-fp4-b300-dynamo-vllm-8k1k-tp1andminimaxm3-fp4-b300-dynamo-vllm-8k1k-tp1-tep4vLLM image tonightly-5e35a6f4f9bbc217c599692157ca985c894373f7model.containerand addVLLM_MINIMAX_M3_MSA_DECODE_BACKEND=cutlassto prefill and decode environmentsTest plan
full-sweep-fail-fastlabel runs green中文说明
minimaxm3-fp4-b300-dynamo-vllm-8k1k-tp1和minimaxm3-fp4-b300-dynamo-vllm-8k1k-tp1-tep4vLLM 镜像升级至nightly-5e35a6f4f9bbc217c599692157ca985c894373f7model.container字段，并在预填充与解码环境中添加VLLM_MINIMAX_M3_MSA_DECODE_BACKEND=cutlass🤖 Generated with Claude Code