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Finishing up controller logic
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ScottMansfield committed Nov 10, 2017
1 parent 23f00e7 commit 1f78e2b
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Showing 5 changed files with 86 additions and 58 deletions.
Binary file modified Debug/main.obj
Binary file not shown.
20 changes: 10 additions & 10 deletions Debug/sous_vide.map
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
******************************************************************************
MSP430 Linker PC v16.9.3
******************************************************************************
>> Linked Fri Aug 11 22:31:12 2017
>> Linked Sun Aug 27 18:13:15 2017

OUTPUT FILE NAME: <sous_vide.out>
ENTRY POINT SYMBOL: "RESET" address: 0000f800
Expand All @@ -19,7 +19,7 @@ MEMORY CONFIGURATION
INFOC 00001040 00000040 00000000 00000040 RWIX
INFOB 00001080 00000040 00000000 00000040 RWIX
INFOA 000010c0 00000040 00000000 00000040 RWIX
FLASH 0000f800 000007e0 000000fe 000006e2 RWIX
FLASH 0000f800 000007e0 00000132 000006ae RWIX
INT00 0000ffe0 00000002 00000000 00000002 RWIX
INT01 0000ffe2 00000002 00000000 00000002 RWIX
INT02 0000ffe4 00000002 00000002 00000000 RWIX
Expand All @@ -45,9 +45,9 @@ section page origin length input sections
-------- ---- ---------- ---------- ----------------
.stack 0 00000280 00000000

.text 0 0000f800 000000fe
0000f800 000000f6 main.obj (.text)
0000f8f6 00000008 rts430_eabi.lib : isr_trap.obj (.text:_isr:__TI_ISR_TRAP)
.text 0 0000f800 00000132
0000f800 0000012a main.obj (.text)
0000f92a 00000008 rts430_eabi.lib : isr_trap.obj (.text:_isr:__TI_ISR_TRAP)

.cinit 0 0000f800 00000000 UNINITIALIZED

Expand Down Expand Up @@ -88,9 +88,9 @@ MODULE SUMMARY
Module code ro data rw data
------ ---- ------- -------
.\
main.obj 246 2 0
main.obj 298 2 0
+--+--------------+------+---------+---------+
Total: 246 2 0
Total: 298 2 0

C:\ti\ccs710\ccsv7\tools\compiler\ti-cgt-msp430_16.9.3.LTS\lib\rts430_eabi.lib
isr_trap.obj 8 0 0
Expand All @@ -106,7 +106,7 @@ MODULE SUMMARY
Total: 8 16 0

+--+--------------+------+---------+---------+
Grand Total: 254 18 0
Grand Total: 306 18 0


GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name
Expand Down Expand Up @@ -167,7 +167,7 @@ address name
00000120 WDTCTL
00000280 __STACK_END
00000000 __STACK_SIZE
0000f8f6 __TI_ISR_TRAP
0000f92a __TI_ISR_TRAP
0000ffe4 __TI_int02
0000ffe6 __TI_int03
0000ffe8 __TI_int04
Expand Down Expand Up @@ -240,7 +240,7 @@ address name
000010fe CALDCO_1MHZ
000010ff CALBC1_1MHZ
0000f800 RESET
0000f8f6 __TI_ISR_TRAP
0000f92a __TI_ISR_TRAP
0000ffe4 __TI_int02
0000ffe6 __TI_int03
0000ffe8 __TI_int04
Expand Down
Binary file modified Debug/sous_vide.out
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64 changes: 32 additions & 32 deletions Debug/sous_vide_linkInfo.xml
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@
<link_info>
<banner>MSP430 Linker PC v16.9.3.LTS</banner>
<copyright>Copyright (c) 2003-2017 Texas Instruments Incorporated</copyright>
<link_time>0x598e92a0</link_time>
<link_time>0x59a36e2b</link_time>
<link_errors>0x0</link_errors>
<output_file>sous_vide.out</output_file>
<entry_point>
Expand Down Expand Up @@ -94,13 +94,13 @@
<name>.text</name>
<load_address>0xf800</load_address>
<run_address>0xf800</run_address>
<size>0xf6</size>
<size>0x12a</size>
<input_file_ref idref="fl-2"/>
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<name>.text:_isr:__TI_ISR_TRAP</name>
<load_address>0xf8f6</load_address>
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<load_address>0xf92a</load_address>
<run_address>0xf92a</run_address>
<size>0x8</size>
<input_file_ref idref="fl-25"/>
</object_component>
Expand Down Expand Up @@ -177,33 +177,33 @@
<name>.debug_info</name>
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<size>0x126</size>
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<name>.debug_info</name>
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<name>.debug_info</name>
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<run_address>0x24b</run_address>
<size>0x9a</size>
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<name>.debug_line</name>
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<size>0x89</size>
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<input_file_ref idref="fl-2"/>
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<name>.debug_line</name>
<load_address>0x89</load_address>
<run_address>0x89</run_address>
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<run_address>0x9d</run_address>
<size>0x3d</size>
<input_file_ref idref="fl-25"/>
</object_component>
Expand Down Expand Up @@ -299,7 +299,7 @@
<name>.text</name>
<load_address>0xf800</load_address>
<run_address>0xf800</run_address>
<size>0xfe</size>
<size>0x132</size>
<contents>
<object_component_ref idref="oc-2e"/>
<object_component_ref idref="oc-71"/>
Expand Down Expand Up @@ -539,7 +539,7 @@
<name>.debug_info</name>
<load_address>0x0</load_address>
<run_address>0x0</run_address>
<size>0x2c7</size>
<size>0x2e5</size>
<contents>
<object_component_ref idref="oc-2f"/>
<object_component_ref idref="oc-74"/>
Expand All @@ -550,7 +550,7 @@
<name>.debug_line</name>
<load_address>0x0</load_address>
<run_address>0x0</run_address>
<size>0xc6</size>
<size>0xda</size>
<contents>
<object_component_ref idref="oc-32"/>
<object_component_ref idref="oc-73"/>
Expand Down Expand Up @@ -591,7 +591,7 @@
<name>SEGMENT_0</name>
<load_address>0xf800</load_address>
<run_address>0xf800</run_address>
<size>0xfe</size>
<size>0x132</size>
<flags>0x5</flags>
<contents>
<logical_group_ref idref="lg-7"/>
Expand Down Expand Up @@ -737,8 +737,8 @@
<page_id>0x0</page_id>
<origin>0xf800</origin>
<length>0x7e0</length>
<used_space>0xfe</used_space>
<unused_space>0x6e2</unused_space>
<used_space>0x132</used_space>
<unused_space>0x6ae</unused_space>
<attributes>RWIX</attributes>
<usage_details>
<allocated_space>
Expand All @@ -748,12 +748,12 @@
</allocated_space>
<allocated_space>
<start_address>0xf800</start_address>
<size>0xfe</size>
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</available_space>
</usage_details>
</memory_area>
Expand Down Expand Up @@ -1208,54 +1208,54 @@
<name>__TI_prof_data_size</name>
<value>0xffffffff</value>
</symbol>
<symbol id="sm-79">
<symbol id="sm-7a">
<name>RESET</name>
<value>0xf800</value>
<object_component_ref idref="oc-2e"/>
</symbol>
<symbol id="sm-7d">
<symbol id="sm-7e">
<name>__TI_int02</name>
<value>0xffe4</value>
<object_component_ref idref="oc-33"/>
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<symbol id="sm-80">
<symbol id="sm-81">
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<value>0xffe6</value>
<object_component_ref idref="oc-34"/>
</symbol>
<symbol id="sm-83">
<symbol id="sm-84">
<name>__TI_int04</name>
<value>0xffe8</value>
<object_component_ref idref="oc-35"/>
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<symbol id="sm-86">
<symbol id="sm-87">
<name>__TI_int05</name>
<value>0xffea</value>
<object_component_ref idref="oc-36"/>
</symbol>
<symbol id="sm-89">
<symbol id="sm-8a">
<name>__TI_int08</name>
<value>0xfff0</value>
<object_component_ref idref="oc-37"/>
</symbol>
<symbol id="sm-8c">
<symbol id="sm-8d">
<name>__TI_int09</name>
<value>0xfff2</value>
<object_component_ref idref="oc-38"/>
</symbol>
<symbol id="sm-8f">
<symbol id="sm-90">
<name>__TI_int10</name>
<value>0xfff4</value>
<object_component_ref idref="oc-39"/>
</symbol>
<symbol id="sm-92">
<symbol id="sm-93">
<name>__TI_int14</name>
<value>0xfffc</value>
<object_component_ref idref="oc-3a"/>
</symbol>
<symbol id="sm-9a">
<symbol id="sm-9b">
<name>__TI_ISR_TRAP</name>
<value>0xf8f6</value>
<value>0xf92a</value>
<object_component_ref idref="oc-71"/>
</symbol>
</symbol_table>
Expand Down
60 changes: 44 additions & 16 deletions main.asm
Original file line number Diff line number Diff line change
Expand Up @@ -39,23 +39,27 @@ PIN5 .set 020h ; Port 1 Pin 5
PIN6 .set 040h ; Port 1 Pin 6
PIN7 .set 080h ; Port 1 Pin 7

OUTPINS .set PIN0|PIN2|PIN6|PIN7 ; Convenience constant - output pins
INPINS .set PIN5 ; Convenience constant - input pins
OUTPINS .set PIN0|PIN2|PIN6|PIN7 ; Convenience constant - output pins
INPINS .set PIN5 ; Convenience constant - input pins

RELAY .set PIN2 ; Alias for relay circuit
RELAY .set PIN2 ; Alias for relay circuit

SPICS .set PIN7 ; Bit-banged SPI constants
SPICLK .set PIN6 ; Since we are manually reading from the SPI interface
SPIMISO .set PIN5 ; these constants give a sense of normalcy
SPICS .set PIN7 ; Bit-banged SPI constants
SPICLK .set PIN6 ; Since we are manually reading from the SPI interface
SPIMISO .set PIN5 ; these constants give a sense of normalcy

RAMBASE .set 0200h ; start address of the 128 bytes of RAM
RAMSIZE .set 07fh ; the total size of the RAM
RAMEND .set RAMBASE + RAMSIZE ; the last address in RAM
OBSSTART .set RAMBASE ; convenience alias for the start of RAM
NUMOBS .set 64 ; the number of observations held in RAM
OBSEND .set RAMBASE + NUMOBS ; the address after the last observation held in RAM
RAMBASE .set 0200h ; start address of the 128 bytes of RAM
RAMSIZE .set 07fh ; the total size of the RAM
RAMEND .set RAMBASE + RAMSIZE ; the last address in RAM
OBSSTART .set RAMBASE ; convenience alias for the start of RAM
NUMOBS .set 64 ; the number of observations held in RAM
OBSEND .set RAMBASE + NUMOBS ; the address after the last observation held in RAM

TARGET .set 0CFh ; the target water temperature, 132F, or 55.5C
TARGET .set 0CFh ; the target water temperature, 132F, or 55.5C

; Delay Gold HI and LO
DLYGLDHI .set 0032Dh ; High 16 bits of the base delay value
DLYGLDLO .set 0CD55h ; Low 16 bits of the base delay value

;-------------------------------------------------------------------------------
; Linker directives
Expand Down Expand Up @@ -232,7 +236,9 @@ fn_calcduty
;; Calculate the integral from the last 64 readings
mov #0, r6 ; Integral accumulator
mov #OBSSTART, r4 ; Start at the base of RAM
sum_integ mov.b 0(r4), r5 ; Read byte from address in r4

sum_integ
mov.b 0(r4), r5 ; Read byte from address in r4
sxt r5 ; Make sure things add properly if negative
add r5, r6 ; Add to accumulator.
inc r4 ; increment loop variable / Increment address one byte.
Expand All @@ -250,13 +256,35 @@ sum_integ mov.b 0(r4), r5 ; Read byte from address in r4
add r4, r11 ; r11 now has the sum of the log2 of the proportion and integral

;; Shift the gold value (total period delay) by the sum of the logarithms
; First, to get the on period, shift the gold value to the right r11 times.
mov #DLYGLDHI, r14 ; Set up the raw gold value
mov #DLYGLDLO, r15 ;
mov r11, r12 ; Set up the loop counter (r12)

shft_on
rra r14 ; Shift the 32 bit value right (using the carry bit)
rrc r15 ;
dec r12 ; loop check. This is ok to do afterwards because we have checks above for 0% duty
jne shft_on ; Loop until r12 is 0

mov r14, r4 ; Move return value into place
mov r15, r5 ;

; Second, subtract the on delay from the gold value to get the off delay
mov #DLYGLDHI, r12 ; Move gold delay value into place
mov #DLYGLDLO, r13 ;

sub r14, r12 ; 32 bit subtract using carry
subc r15, r13 ;

mov r12, r6 ; move off delay value into return registers
mov r13, r7 ;

zero_pct_duty ; If we're over temp, just keep it off
mov #0, r4 ; 0 seconds on
mov #0, r5 ;
mov #0032Dh, r6 ; 10 seconds off
mov #0CD55h, r7 ;
mov #DLYGLDHI, r6 ; 10 seconds off
mov #DLYGLDLO, r7 ;
ret

; Calculates the integer log (base 2) of the 16 bit int passed in
Expand Down

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