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test(hip-tests): detect XNACK via the pageable memory access attribute - #13430

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litvaOo merged 2 commits into
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users/iassiour/hip-tests-xnack-pageable
Oct 21, 2026
Merged

litvaOo merged 2 commits into
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users/iassiour/hip-tests-xnack-pageable

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@iassiour

@iassiour iassiour commented Oct 14, 2026 •

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Motivation

HipTest::isXnackOn() and five tests detect XNACK by searching gcnArchName for xnack+. GPUs whose ISA has no XNACK on/off target feature (e.g. gfx1250) never report xnack+, so these tests always skip there, even with HSA_XNACK=1.

Technical Details

  • isXnackOn() now returns hipDeviceAttributePageableMemoryAccess. Since fix(rocr): use runtime XNACK state for SVM_ACCESSIBLE_BY_DEFAULT query #12558 this reflects the process XNACK mode on every GPU, and it is the capability these tests actually need (GPU access to malloc/mmap memory).
  • The five tests that duplicated the gcnArchName check now call isXnackOn():
    • hipMemCoherencyTstMProc.cc
    • hipHmmOvrSubscriptionTst.cc
    • hipHostRegisterStress.cc
    • hipMemAdvise_old.cc
    • hipGetProcAddressVmmApis.cc
  • On NVIDIA isXnackOn() returns false; the NVIDIA backend never fills gcnArchName, so the old check could not match there either.

Issue Tracking

JIRA ID: AIRUNTIME-2926

Test Plan

MI350X (gfx950), ROCr/CLR built from develop ae6a9a29dd. Ran all isXnackOn()-gated tests, unpatched develop vs this change, with HSA_XNACK unset and HSA_XNACK=1.

Test Result

Identical results with and without the change:

Test HSA_XNACK unset HSA_XNACK=1
Unit_malloc_CoherentTst, Unit_malloc_CoherentTstWthAdvise skip pass
Unit_mmap_CoherentTst, Unit_mmap_CoherentTstWthAdvise skip pass
Unit_hipMemAdvise_TstAlignedAllocMem skip pass
Unit_hipMemAdvise_TstAlignedAllocMem_XNACK pass pass
Unit_hipGetProcAddress_VMM pass pass
Stress_HMM_OverSubscriptionTst, Stress_hipHostRegister_Oversubscription skip not run

The two stress tests were not run with HSA_XNACK=1 because they oversubscribe host memory (~1.2× GPU memory). Their gate is the same isXnackOn() call as the tests above.

Not tested on gfx1250.

Submission Checklist

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🟢 Approval recommended

The centralized attribute maps directly to the runtime’s XNACK state, and all replacements preserve the existing test gating behavior.

0 open findings

What changed in this PR

Updates HIP tests to detect AMD XNACK through the pageable-memory-access attribute, supporting stall-only XNACK GPUs.

Changes:

  • Reimplements the shared XNACK detection helper.
  • Migrates affected memory, VMM, oversubscription, and coherency tests to the helper.
File Description
projects/​hip-tests/​catch/​include/​hip_test_common.hh Detects XNACK using pageable-memory support on AMD.
projects/​hip-tests/​catch/​unit/​virtualMemoryManagement/​hipGetProcAddressVmmApis.cc Uses shared XNACK detection for VMM validation.
projects/​hip-tests/​catch/​unit/​memory/​hipMemAdvise_old.cc Updates XNACK-dependent memory-advice tests.
projects/​hip-tests/​catch/​stress/​memory/​hipHostRegisterStress.cc Updates the oversubscription prerequisite check.
projects/​hip-tests/​catch/​stress/​memory/​hipHmmOvrSubscriptionTst.cc Updates the HMM stress-test prerequisite check.
projects/​hip-tests/​catch/​multiproc/​hipMemCoherencyTstMProc.cc Updates coherency-test XNACK checks.

🧠 Review effort: Balanced


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✅ All Policy Checks Passed

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📝 PR Description ✅ Pass —
⛔ Forbidden Files ✅ Pass —
🧪 Unit Test ⚠️ Warning Error: Source/code files changed without an accompanying unit test.
Expected: add at least one test file named like test_<name>.py / test_<name>.cpp (or <name>_test.*).
Current: code file(s) changed: projects/hip-tests/catch/multiproc/hipMemCoherencyTstMProc.cc, projects/hip-tests/catch/stress/memory/hipHmmOvrSubscriptionTst.cc, projects/hip-tests/catch/stress/memory/hipHostRegisterStress.cc, projects/hip-tests/catch/unit/memory/hipMemAdvise_old.cc, projects/hip-tests/catch/unit/virtualMemoryManagement/hipGetProcAddressVmmApis.cc; no test file found
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@iassiour
iassiour marked this pull request as ready for review October 14, 2026 07:51
@iassiour
iassiour requested a review from a team as a code owner October 14, 2026 07:51
@iassiour
iassiour force-pushed the users/iassiour/hip-tests-xnack-pageable branch from 7bf69cf to 81f253d Compare October 14, 2026 07:51

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🤖 AI-assisted pre-review (for @mangupta)

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🤖 AI-assisted pre-review (for @mangupta)

Re-reviewed the updated head (68dc38922ba4) — no new findings at or above the posting threshold.

@iassiour
iassiour force-pushed the users/iassiour/hip-tests-xnack-pageable branch 2 times, most recently from dc41e31 to 91ac531 Compare October 19, 2026 21:36
iassiour and others added 2 commits October 20, 2026 17:34
🤖 Generated with [Claude Code](https://claude.com/claude-code)

Co-Authored-By: Claude <noreply@anthropic.com>
🤖 Generated with [Claude Code](https://claude.com/claude-code)

Co-Authored-By: Claude <noreply@anthropic.com>
@iassiour
iassiour force-pushed the users/iassiour/hip-tests-xnack-pageable branch from 91ac531 to 00da8b4 Compare October 20, 2026 16:34
@iassiour
iassiour requested a review from a team October 20, 2026 17:07
@litvaOo

litvaOo commented Oct 21, 2026

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ROCr test errors are a known HSA issue, overriding.

@litvaOo
litvaOo merged commit 08c6e8f into develop Oct 21, 2026
162 of 167 checks passed
@litvaOo
litvaOo deleted the users/iassiour/hip-tests-xnack-pageable branch October 21, 2026 08:24
systems-assistant Bot pushed a commit to ROCm/hip-tests that referenced this pull request Oct 21, 2026
 attribute (#13430)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

## Motivation

`HipTest::isXnackOn()` and five tests detect XNACK by searching
`gcnArchName` for `xnack+`. GPUs whose ISA has no XNACK on/off target
feature (e.g. gfx1250) never report `xnack+`, so these tests always skip
there, even with `HSA_XNACK=1`.

## Technical Details

- `isXnackOn()` now returns `hipDeviceAttributePageableMemoryAccess`.
Since #12558 this reflects the process XNACK mode on every GPU, and it
is the capability these tests actually need (GPU access to
`malloc`/`mmap` memory).
- The five tests that duplicated the `gcnArchName` check now call
`isXnackOn()`:
  - `hipMemCoherencyTstMProc.cc`
  - `hipHmmOvrSubscriptionTst.cc`
  - `hipHostRegisterStress.cc`
  - `hipMemAdvise_old.cc`
  - `hipGetProcAddressVmmApis.cc`
- On NVIDIA `isXnackOn()` returns false; the NVIDIA backend never fills
`gcnArchName`, so the old check could not match there either.

## Issue Tracking

JIRA ID: AIRUNTIME-2926

## Test Plan

MI350X (gfx950), ROCr/CLR built from develop `ae6a9a29dd`. Ran all
`isXnackOn()`-gated tests, unpatched develop vs this change, with
`HSA_XNACK` unset and `HSA_XNACK=1`.

## Test Result

Identical results with and without the change:

| Test | `HSA_XNACK` unset | `HSA_XNACK=1` |
|---|---|---|
| `Unit_malloc_CoherentTst`, `Unit_malloc_CoherentTstWthAdvise` | skip |
pass |
| `Unit_mmap_CoherentTst`, `Unit_mmap_CoherentTstWthAdvise` | skip |
pass |
| `Unit_hipMemAdvise_TstAlignedAllocMem` | skip | pass |
| `Unit_hipMemAdvise_TstAlignedAllocMem_XNACK` | pass | pass |
| `Unit_hipGetProcAddress_VMM` | pass | pass |
| `Stress_HMM_OverSubscriptionTst`,
`Stress_hipHostRegister_Oversubscription` | skip | not run |

The two stress tests were not run with `HSA_XNACK=1` because they
oversubscribe host memory (~1.2× GPU memory). Their gate is the same
`isXnackOn()` call as the tests above.

Not tested on gfx1250.

## Submission Checklist

- [x] Look over the contributing guidelines at
https://github.com/ROCm/rocm-systems/blob/develop/CONTRIBUTING.md.
[rocm-systems] ROCm/rocm-systems#13430 (commit 08c6e8f)
dgaliffiAMD pushed a commit that referenced this pull request Oct 21, 2026
#13430)

## Motivation

`HipTest::isXnackOn()` and five tests detect XNACK by searching
`gcnArchName` for `xnack+`. GPUs whose ISA has no XNACK on/off target
feature (e.g. gfx1250) never report `xnack+`, so these tests always skip
there, even with `HSA_XNACK=1`.

## Technical Details

- `isXnackOn()` now returns `hipDeviceAttributePageableMemoryAccess`.
Since #12558 this reflects the process XNACK mode on every GPU, and it
is the capability these tests actually need (GPU access to
`malloc`/`mmap` memory).
- The five tests that duplicated the `gcnArchName` check now call
`isXnackOn()`:
  - `hipMemCoherencyTstMProc.cc`
  - `hipHmmOvrSubscriptionTst.cc`
  - `hipHostRegisterStress.cc`
  - `hipMemAdvise_old.cc`
  - `hipGetProcAddressVmmApis.cc`
- On NVIDIA `isXnackOn()` returns false; the NVIDIA backend never fills
`gcnArchName`, so the old check could not match there either.

## Issue Tracking

JIRA ID: AIRUNTIME-2926

## Test Plan

MI350X (gfx950), ROCr/CLR built from develop `ae6a9a29dd`. Ran all
`isXnackOn()`-gated tests, unpatched develop vs this change, with
`HSA_XNACK` unset and `HSA_XNACK=1`.

## Test Result

Identical results with and without the change:

| Test | `HSA_XNACK` unset | `HSA_XNACK=1` |
|---|---|---|
| `Unit_malloc_CoherentTst`, `Unit_malloc_CoherentTstWthAdvise` | skip |
pass |
| `Unit_mmap_CoherentTst`, `Unit_mmap_CoherentTstWthAdvise` | skip |
pass |
| `Unit_hipMemAdvise_TstAlignedAllocMem` | skip | pass |
| `Unit_hipMemAdvise_TstAlignedAllocMem_XNACK` | pass | pass |
| `Unit_hipGetProcAddress_VMM` | pass | pass |
| `Stress_HMM_OverSubscriptionTst`,
`Stress_hipHostRegister_Oversubscription` | skip | not run |

The two stress tests were not run with `HSA_XNACK=1` because they
oversubscribe host memory (~1.2× GPU memory). Their gate is the same
`isXnackOn()` call as the tests above.

Not tested on gfx1250.

## Submission Checklist

- [x] Look over the contributing guidelines at
https://github.com/ROCm/rocm-systems/blob/develop/CONTRIBUTING.md.

---------

Co-authored-by: Claude <noreply@anthropic.com>
@systems-assistant

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