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test(hip-tests): detect XNACK via the pageable memory access attribute - #13430
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The centralized attribute maps directly to the runtime’s XNACK state, and all replacements preserve the existing test gating behavior.
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What changed in this PR
Updates HIP tests to detect AMD XNACK through the pageable-memory-access attribute, supporting stall-only XNACK GPUs.
Changes:
- Reimplements the shared XNACK detection helper.
- Migrates affected memory, VMM, oversubscription, and coherency tests to the helper.
| File | Description |
|---|---|
projects/hip-tests/catch/include/hip_test_common.hh |
Detects XNACK using pageable-memory support on AMD. |
projects/hip-tests/catch/unit/virtualMemoryManagement/hipGetProcAddressVmmApis.cc |
Uses shared XNACK detection for VMM validation. |
projects/hip-tests/catch/unit/memory/hipMemAdvise_old.cc |
Updates XNACK-dependent memory-advice tests. |
projects/hip-tests/catch/stress/memory/hipHostRegisterStress.cc |
Updates the oversubscription prerequisite check. |
projects/hip-tests/catch/stress/memory/hipHmmOvrSubscriptionTst.cc |
Updates the HMM stress-test prerequisite check. |
projects/hip-tests/catch/multiproc/hipMemCoherencyTstMProc.cc |
Updates coherency-test XNACK checks. |
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🤖 AI-assisted pre-review (for @mangupta) Re-reviewed the updated head ( |
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🤖 Generated with [Claude Code](https://claude.com/claude-code) Co-Authored-By: Claude <noreply@anthropic.com>
🤖 Generated with [Claude Code](https://claude.com/claude-code) Co-Authored-By: Claude <noreply@anthropic.com>
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ROCr test errors are a known HSA issue, overriding. |
attribute (#13430) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit ## Motivation `HipTest::isXnackOn()` and five tests detect XNACK by searching `gcnArchName` for `xnack+`. GPUs whose ISA has no XNACK on/off target feature (e.g. gfx1250) never report `xnack+`, so these tests always skip there, even with `HSA_XNACK=1`. ## Technical Details - `isXnackOn()` now returns `hipDeviceAttributePageableMemoryAccess`. Since #12558 this reflects the process XNACK mode on every GPU, and it is the capability these tests actually need (GPU access to `malloc`/`mmap` memory). - The five tests that duplicated the `gcnArchName` check now call `isXnackOn()`: - `hipMemCoherencyTstMProc.cc` - `hipHmmOvrSubscriptionTst.cc` - `hipHostRegisterStress.cc` - `hipMemAdvise_old.cc` - `hipGetProcAddressVmmApis.cc` - On NVIDIA `isXnackOn()` returns false; the NVIDIA backend never fills `gcnArchName`, so the old check could not match there either. ## Issue Tracking JIRA ID: AIRUNTIME-2926 ## Test Plan MI350X (gfx950), ROCr/CLR built from develop `ae6a9a29dd`. Ran all `isXnackOn()`-gated tests, unpatched develop vs this change, with `HSA_XNACK` unset and `HSA_XNACK=1`. ## Test Result Identical results with and without the change: | Test | `HSA_XNACK` unset | `HSA_XNACK=1` | |---|---|---| | `Unit_malloc_CoherentTst`, `Unit_malloc_CoherentTstWthAdvise` | skip | pass | | `Unit_mmap_CoherentTst`, `Unit_mmap_CoherentTstWthAdvise` | skip | pass | | `Unit_hipMemAdvise_TstAlignedAllocMem` | skip | pass | | `Unit_hipMemAdvise_TstAlignedAllocMem_XNACK` | pass | pass | | `Unit_hipGetProcAddress_VMM` | pass | pass | | `Stress_HMM_OverSubscriptionTst`, `Stress_hipHostRegister_Oversubscription` | skip | not run | The two stress tests were not run with `HSA_XNACK=1` because they oversubscribe host memory (~1.2× GPU memory). Their gate is the same `isXnackOn()` call as the tests above. Not tested on gfx1250. ## Submission Checklist - [x] Look over the contributing guidelines at https://github.com/ROCm/rocm-systems/blob/develop/CONTRIBUTING.md. [rocm-systems] ROCm/rocm-systems#13430 (commit 08c6e8f)
#13430) ## Motivation `HipTest::isXnackOn()` and five tests detect XNACK by searching `gcnArchName` for `xnack+`. GPUs whose ISA has no XNACK on/off target feature (e.g. gfx1250) never report `xnack+`, so these tests always skip there, even with `HSA_XNACK=1`. ## Technical Details - `isXnackOn()` now returns `hipDeviceAttributePageableMemoryAccess`. Since #12558 this reflects the process XNACK mode on every GPU, and it is the capability these tests actually need (GPU access to `malloc`/`mmap` memory). - The five tests that duplicated the `gcnArchName` check now call `isXnackOn()`: - `hipMemCoherencyTstMProc.cc` - `hipHmmOvrSubscriptionTst.cc` - `hipHostRegisterStress.cc` - `hipMemAdvise_old.cc` - `hipGetProcAddressVmmApis.cc` - On NVIDIA `isXnackOn()` returns false; the NVIDIA backend never fills `gcnArchName`, so the old check could not match there either. ## Issue Tracking JIRA ID: AIRUNTIME-2926 ## Test Plan MI350X (gfx950), ROCr/CLR built from develop `ae6a9a29dd`. Ran all `isXnackOn()`-gated tests, unpatched develop vs this change, with `HSA_XNACK` unset and `HSA_XNACK=1`. ## Test Result Identical results with and without the change: | Test | `HSA_XNACK` unset | `HSA_XNACK=1` | |---|---|---| | `Unit_malloc_CoherentTst`, `Unit_malloc_CoherentTstWthAdvise` | skip | pass | | `Unit_mmap_CoherentTst`, `Unit_mmap_CoherentTstWthAdvise` | skip | pass | | `Unit_hipMemAdvise_TstAlignedAllocMem` | skip | pass | | `Unit_hipMemAdvise_TstAlignedAllocMem_XNACK` | pass | pass | | `Unit_hipGetProcAddress_VMM` | pass | pass | | `Stress_HMM_OverSubscriptionTst`, `Stress_hipHostRegister_Oversubscription` | skip | not run | The two stress tests were not run with `HSA_XNACK=1` because they oversubscribe host memory (~1.2× GPU memory). Their gate is the same `isXnackOn()` call as the tests above. Not tested on gfx1250. ## Submission Checklist - [x] Look over the contributing guidelines at https://github.com/ROCm/rocm-systems/blob/develop/CONTRIBUTING.md. --------- Co-authored-by: Claude <noreply@anthropic.com>
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Motivation
HipTest::isXnackOn()and five tests detect XNACK by searchinggcnArchNameforxnack+. GPUs whose ISA has no XNACK on/off target feature (e.g. gfx1250) never reportxnack+, so these tests always skip there, even withHSA_XNACK=1.Technical Details
isXnackOn()now returnshipDeviceAttributePageableMemoryAccess. Since fix(rocr): use runtime XNACK state for SVM_ACCESSIBLE_BY_DEFAULT query #12558 this reflects the process XNACK mode on every GPU, and it is the capability these tests actually need (GPU access tomalloc/mmapmemory).gcnArchNamecheck now callisXnackOn():hipMemCoherencyTstMProc.cchipHmmOvrSubscriptionTst.cchipHostRegisterStress.cchipMemAdvise_old.cchipGetProcAddressVmmApis.ccisXnackOn()returns false; the NVIDIA backend never fillsgcnArchName, so the old check could not match there either.Issue Tracking
JIRA ID: AIRUNTIME-2926
Test Plan
MI350X (gfx950), ROCr/CLR built from develop
ae6a9a29dd. Ran allisXnackOn()-gated tests, unpatched develop vs this change, withHSA_XNACKunset andHSA_XNACK=1.Test Result
Identical results with and without the change:
HSA_XNACKunsetHSA_XNACK=1Unit_malloc_CoherentTst,Unit_malloc_CoherentTstWthAdviseUnit_mmap_CoherentTst,Unit_mmap_CoherentTstWthAdviseUnit_hipMemAdvise_TstAlignedAllocMemUnit_hipMemAdvise_TstAlignedAllocMem_XNACKUnit_hipGetProcAddress_VMMStress_HMM_OverSubscriptionTst,Stress_hipHostRegister_OversubscriptionThe two stress tests were not run with
HSA_XNACK=1because they oversubscribe host memory (~1.2× GPU memory). Their gate is the sameisXnackOn()call as the tests above.Not tested on gfx1250.
Submission Checklist