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f399f10
fix(hip): load dispatch table slots atomically in the entry points
andraghetti Oct 12, 2026
021b19d
fix(hrr): test and document the dispatch slot load contract
andraghetti Oct 12, 2026
e9476b9
fix(hrr): wait for both slot values before the TSan stress loop
andraghetti Oct 12, 2026
3176370
docs(hrr): scope the dispatch table contract to HRR's writer
andraghetti Oct 12, 2026
15ec889
docs(hrr): scope the race-free table contract to HRR's writer
andraghetti Oct 12, 2026
d93435c
Merge branch 'develop' into users/andraghetti/hrr-dispatch-atomic-loads
andraghetti Oct 14, 2026
30b19d7
fix(hip): load the hipKernelSetAttributeForDevice slot atomically
andraghetti Oct 14, 2026
1f476af
test(hrr): let the dispatch-readers check see reads split across lines
andraghetti Oct 14, 2026
5e39361
Merge branch 'develop' into users/andraghetti/hrr-dispatch-atomic-loads
andraghetti Oct 14, 2026
e368ff1
Merge remote-tracking branch 'origin/develop' into users/andraghetti/…
andraghetti Oct 15, 2026
905ed7b
Merge remote-tracking branch 'origin/develop' into users/andraghetti/…
andraghetti Oct 19, 2026
550f8e4
test(hrr): require hip::LoadDispatchSlot in both entry-point macros
andraghetti Oct 19, 2026
bd99b45
test(hrr): build the TSan slot test from hip_dispatch_load.hpp alone
andraghetti Oct 19, 2026
43044f1
ci(hip): run the dispatch slot checks on CLR pull requests
andraghetti Oct 19, 2026
29df209
Merge develop 5b4535b7ba into users/andraghetti/hrr-dispatch-atomic-l…
andraghetti Oct 20, 2026
1c39618
fix(hrr): skip the TSan slot test on Windows, run it under setarch -R
andraghetti Oct 20, 2026
7b3cc82
Merge develop 08c6e8f7c9 into users/andraghetti/hrr-dispatch-atomic-l…
andraghetti Oct 21, 2026
bb5230e
refactor(hip): drop unreached checks and repeated text from the dispa…
andraghetti Oct 26, 2026
bbd4ef9
Merge develop 77796e3e36 into users/andraghetti/hrr-dispatch-atomic-l…
andraghetti Oct 26, 2026
81b7789
Merge remote-tracking branch 'origin/develop' into HEAD
andraghetti Oct 28, 2026
6f29507
docs(hip): name the slot store contract, not its location
andraghetti Nov 2, 2026
e938e13
Merge commit '6b8765e512' into HEAD
andraghetti Nov 2, 2026
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54 changes: 54 additions & 0 deletions .github/workflows/hip-dispatch-slot-loads.yml
Original file line number Diff line number Diff line change
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# The dispatch slot load contract of projects/hrr/DESIGN.md, checked without a GPU or ROCm.

name: "HIP dispatch slot loads"

on:
push:
branches: [develop]
paths:
- 'projects/clr/hipamd/src/hip_table_interface.cpp'
- 'projects/clr/hipamd/src/hip_dispatch_load.hpp'
- 'projects/hrr/tests/unit/check_dispatch_readers.cmake'
- 'projects/hrr/tests/unit/hrr_dispatch_load_tsan_test.cc'
- '.github/workflows/hip-dispatch-slot-loads.yml'
pull_request:
paths:
- 'projects/clr/hipamd/src/hip_table_interface.cpp'
- 'projects/clr/hipamd/src/hip_dispatch_load.hpp'
- 'projects/hrr/tests/unit/check_dispatch_readers.cmake'
- 'projects/hrr/tests/unit/hrr_dispatch_load_tsan_test.cc'
- '.github/workflows/hip-dispatch-slot-loads.yml'

concurrency:
group: ${{ github.workflow }}-${{ github.ref }}
cancel-in-progress: true

permissions:
contents: read

jobs:
slot-loads:
name: "HIP dispatch slot loads"
runs-on: ubuntu-24.04
timeout-minutes: 10
steps:
- uses: actions/checkout@9c091bb21b7c1c1d1991bb908d89e4e9dddfe3e0 # v7.0.0
with:
sparse-checkout: |
projects/clr/hipamd/src
projects/hrr/tests/unit
persist-credentials: false

- name: Every entry point loads its slot through hip::LoadDispatchSlot
run: >-
cmake -DSOURCE=projects/clr/hipamd/src/hip_table_interface.cpp
-P projects/hrr/tests/unit/check_dispatch_readers.cmake

# setarch -R: GCC's TSan runtime aborts at startup under high-entropy ASLR.
- name: The load races HRR's slot store cleanly under ThreadSanitizer
run: |
set -euo pipefail
g++ -std=c++17 -O1 -g -pthread -fsanitize=thread \
-I projects/clr/hipamd/src \
projects/hrr/tests/unit/hrr_dispatch_load_tsan_test.cc -o hrr-unit-tests-tsan
setarch "$(uname -m)" -R ./hrr-unit-tests-tsan
27 changes: 27 additions & 0 deletions projects/clr/hipamd/src/hip_dispatch_load.hpp
Original file line number Diff line number Diff line change
@@ -0,0 +1,27 @@
/*
* Copyright (c) Advanced Micro Devices, Inc., or its affiliates.
*
* SPDX-License-Identifier: MIT
*/

#pragma once

#if defined(_WIN32)
#include <atomic>
#endif

namespace hip {

// Acquire load of one slot of a live HIP dispatch table, pairing with the release store
// HRR capture installs its shims with (projects/hrr/DESIGN.md, "Core Mechanism").
template <typename Fn> inline Fn LoadDispatchSlot(const Fn& slot) {
#if defined(_WIN32)
// Same std::atomic_ref view as the contract's release store of a slot on Windows.
void*& raw = reinterpret_cast<void*&>(const_cast<Fn&>(slot));
return reinterpret_cast<Fn>(std::atomic_ref<void*>(raw).load(std::memory_order_acquire));
#else
return __atomic_load_n(&slot, __ATOMIC_ACQUIRE);
#endif
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}

} // namespace hip
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