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6 changes: 3 additions & 3 deletions projects/rccl/src/graph/paths.cc
Original file line number Diff line number Diff line change
Expand Up @@ -1191,12 +1191,12 @@ ncclResult_t ncclTopoTrimSystem(struct ncclTopoSystem* system, struct ncclComm*

// detect if all GPUs are connected by XGMI
for (int i = 0; i < system->nodes[GPU].count && allXgmi; i++) {
int cudaDev1 = system->nodes[GPU].nodes[i].gpu.dev;
int rank1 = system->nodes[GPU].nodes[i].gpu.rank;
for (int j = 0; j < system->nodes[GPU].count && allXgmi; j++) {
if (i == j) continue;
int cudaDev2 = system->nodes[GPU].nodes[j].gpu.dev;
int rank2 = system->nodes[GPU].nodes[j].gpu.rank;
bool isXGMI;
NCCLCHECKGOTO(ncclTopoGetLinkType(comm->topo, cudaDev1, cudaDev2, &isXGMI), ret, fail);
NCCLCHECKGOTO(ncclTopoGetLinkType(comm->topo, rank1, rank2, &isXGMI), ret, fail);
allXgmi &= isXGMI;
}
}
Expand Down
6 changes: 3 additions & 3 deletions projects/rccl/src/graph/rome_models.cc
Original file line number Diff line number Diff line change
Expand Up @@ -4007,7 +4007,7 @@ ncclResult_t parseGraphLight(const char* str, struct ncclTopoSystem* system, str
if (j < ngpus) {
while (str[start_offset] != '(' && str[start_offset] != ')') start_offset++;
char number_str[10];
sprintf(number_str, "%d", g);
sprintf(number_str, "%d", system->nodes[GPU].nodes[j].gpu.rank);
int k = 0;
while (number_str[k] != 0) {
graph->treeBase[x][y] = number_str[k];
Expand Down Expand Up @@ -4661,7 +4661,7 @@ ncclResult_t parseA2a8P(struct ncclTopoSystem* system, struct ncclTopoGraph* gra
if (romeTopoModels[i].treeRail != nullptr && !rcclParamDisableRailTrees()) {
// If so, parse the lines in advanced
// These lines will be modified appropriately during ncclTopoPostset
NCCLCHECK(parseGraph(romeTopoModels[i].treeRail, system, graph, g8, nnets > 1 ? n : NULL, 0));
NCCLCHECK(parseGraph(romeTopoModels[i].treeRail, system, graph, rdm.data(), nnets > 1 ? n : NULL, 0));
if (graph->nChannels) {
system->useRailOptimizedTrees = true;
}
Expand Down Expand Up @@ -4847,7 +4847,7 @@ ncclResult_t parseRome4P2H(struct ncclTopoSystem* system, struct ncclTopoGraph*
break;
case NCCL_TOPO_PATTERN_BALANCED_TREE:
if (romeTopoModels[i].treeBase != nullptr) {
NCCLCHECK(parseGraphLight(romeTopoModels[i].treeBase, system, graph, g));
NCCLCHECK(parseGraphLight(romeTopoModels[i].treeBase, system, graph, rdm));
}

if (!graph->nChannels) {
Expand Down
21 changes: 11 additions & 10 deletions projects/rccl/src/graph/search.cc
Original file line number Diff line number Diff line change
Expand Up @@ -1743,17 +1743,18 @@ ncclResult_t ncclTopoGetIntraNetDev(struct ncclTopoSystem* system, int rank, str
return ncclSuccess;
}

ncclResult_t ncclTopoGetLinkType(struct ncclTopoSystem* system, int cudaDev1, int cudaDev2, bool* isXGMI, int maxInter,
// GPUs are keyed by comm rank: HIP ordinals are per process, so peers that each see one GPU all report ordinal 0.
ncclResult_t ncclTopoGetLinkType(struct ncclTopoSystem* system, int rank1, int rank2, bool* isXGMI, int maxInter,
int nInter, int* inter) {
int interGpus[MAX_XGMI_INTER_GPUS + 1];
int ngpus = system->nodes[GPU].count;
*isXGMI = false;
// check for direct XGMI connection
for (int i = 0; i < ngpus; i++) {
if (system->nodes[GPU].nodes[i].gpu.dev == cudaDev1) {
if (system->nodes[GPU].nodes[i].gpu.rank == rank1) {
struct ncclTopoNode* node = system->nodes[GPU].nodes + i;
for (int k = 0; k < system->nodes[GPU].count; k++) {
if (system->nodes[GPU].nodes[k].gpu.dev == cudaDev2) {
if (system->nodes[GPU].nodes[k].gpu.rank == rank2) {
// NCCL 2.30 routes GPU->GPU through DEV nodes, so detect XGMI via path type (not a single hop).
if (node->paths[GPU][k].count > 0 && node->paths[GPU][k].type == PATH_NVL) {
*isXGMI = true;
Expand All @@ -1775,27 +1776,27 @@ ncclResult_t ncclTopoGetLinkType(struct ncclTopoSystem* system, int cudaDev1, in
}
if (j < nInter) return ncclSuccess;
if (nInter > 0 && inter != nullptr) {
ncclTopoGetLinkType(system, inter[nInter], cudaDev2, &res2, 0);
ncclTopoGetLinkType(system, inter[nInter], rank2, &res2, 0);
if (res2) {
*isXGMI = true;
return ncclSuccess;
}
memcpy(interGpus + 1, inter + 1, sizeof(int) * nInter);
}
interGpus[0] = cudaDev1;
interGpus[0] = rank1;
// add one more intermediate GPU recursively util reaching max depth
nInter++;
if (nInter + 2 > ngpus || nInter > MAX_XGMI_INTER_GPUS || nInter > maxInter) return ncclSuccess;
for (int i = 0; i < ngpus; i++) {
int dev = system->nodes[GPU].nodes[i].gpu.dev;
int rank = system->nodes[GPU].nodes[i].gpu.rank;
// skip duplicated GPU
if (dev == cudaDev2) continue;
if (rank == rank2) continue;
for (j = 0; j < nInter; j++)
if (dev == interGpus[j]) break;
if (rank == interGpus[j]) break;
if (j < nInter) continue;
// check connectivity with intermediate GPUs
interGpus[nInter] = dev;
ncclTopoGetLinkType(system, cudaDev1, cudaDev2, &res3, maxInter, nInter, interGpus);
interGpus[nInter] = rank;
ncclTopoGetLinkType(system, rank1, rank2, &res3, maxInter, nInter, interGpus);
if (res3) {
*isXGMI = true;
return ncclSuccess;
Expand Down
19 changes: 10 additions & 9 deletions projects/rccl/src/graph/xml.cc
Original file line number Diff line number Diff line change
Expand Up @@ -952,7 +952,7 @@ ncclResult_t ncclTopoGetXmlFromSys(struct ncclXmlNode* pciNode, struct ncclXml*
// at that BDF is missing or a different function. Link those HIP siblings with
// 1-hop XGMI even when SMI only enumerates the physical GPU.
static ncclResult_t ncclTopoXmlAddHipPartitionXgmi(struct ncclXml* xml, struct ncclXmlNode* gpuNode,
struct ncclXmlNode* pciNode, uint32_t xmlDev) {
struct ncclXmlNode* pciNode, uint32_t hipDev) {
const char* pciBusId = NULL;
NCCLCHECK(xmlGetAttr(pciNode, "busid", &pciBusId));
if (pciBusId == NULL) return ncclSuccess;
Expand All @@ -962,7 +962,7 @@ static ncclResult_t ncclTopoXmlAddHipPartitionXgmi(struct ncclXml* xml, struct n
int nHip = 0;
if (hipGetDeviceCount(&nHip) != hipSuccess) return ncclSuccess;
for (int h = 0; h < nHip; h++) {
if (h == (int)xmlDev) continue;
if (h == (int)hipDev) continue;
char peerBus[NVML_DEVICE_PCI_BUS_ID_BUFFER_SIZE];
if (hipDeviceGetPCIBusId(peerBus, sizeof(peerBus), h) != hipSuccess) continue;
int64_t peerId = 0;
Expand All @@ -985,18 +985,19 @@ static ncclResult_t ncclTopoXmlAddHipPartitionXgmi(struct ncclXml* xml, struct n
}
#endif

ncclResult_t ncclTopoGetXmlFromGpu(struct ncclXmlNode* pciNode, uint32_t xmlDev, uint32_t smiDev, struct ncclXml* xml,
// dev is the machine-wide SMI index, unique per partition; HIP ordinals restart at 0 per process and would collide.
ncclResult_t ncclTopoGetXmlFromGpu(struct ncclXmlNode* pciNode, uint32_t hipDev, uint32_t smiDev, struct ncclXml* xml,
struct ncclXmlNode** gpuNodeRet) {
struct ncclXmlNode* gpuNode = NULL;
NCCLCHECK(xmlGetSubKvInt(pciNode, "gpu", &gpuNode, "dev", (int)xmlDev));
NCCLCHECK(xmlGetSubKvInt(pciNode, "gpu", &gpuNode, "dev", (int)smiDev));
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if (gpuNode == NULL) NCCLCHECK(xmlAddNode(xml, pciNode, "gpu", &gpuNode));

int index = -1;

int dev = -1;
NCCLCHECK(xmlGetAttrIndex(gpuNode, "dev", &index));
if (index == -1) {
NCCLCHECK(xmlSetAttrInt(gpuNode, "dev", xmlDev));
NCCLCHECK(xmlSetAttrInt(gpuNode, "dev", smiDev));
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}
NCCLCHECK(xmlGetAttrInt(gpuNode, "dev", &dev));
if (dev == -1) {
Expand All @@ -1007,7 +1008,7 @@ ncclResult_t ncclTopoGetXmlFromGpu(struct ncclXmlNode* pciNode, uint32_t xmlDev,
NCCLCHECK(xmlGetAttrIndex(gpuNode, "sm", &index));
if (index == -1) {
cudaDeviceProp devProp;
CUDACHECK(cudaGetDeviceProperties(&devProp, (int)xmlDev));
CUDACHECK(cudaGetDeviceProperties(&devProp, (int)hipDev));
NCCLCHECK(xmlSetAttrInt(gpuNode, "sm", devProp.multiProcessorCount));
}
int sm;
Expand All @@ -1018,7 +1019,7 @@ ncclResult_t ncclTopoGetXmlFromGpu(struct ncclXmlNode* pciNode, uint32_t xmlDev,
NCCLCHECK(xmlGetAttrIndex(gpuNode, "gcn", &index));
if (index == -1) {
hipDeviceProp_t devProp;
CUDACHECK(hipGetDeviceProperties(&devProp, (int)xmlDev));
CUDACHECK(hipGetDeviceProperties(&devProp, (int)hipDev));
// extract only the releveant info from the gcnArchName attribute
// e.g.: convert "gfx908:sramecc+:xnack-" to "gfx908"
char gcnArchNameSubstr[128];
Expand All @@ -1036,7 +1037,7 @@ ncclResult_t ncclTopoGetXmlFromGpu(struct ncclXmlNode* pciNode, uint32_t xmlDev,
NCCLCHECK(xmlGetAttrIndex(gpuNode, "arch", &index));
if (index == -1) {
hipDeviceProp_t devProp;
CUDACHECK(hipGetDeviceProperties(&devProp, (int)xmlDev));
CUDACHECK(hipGetDeviceProperties(&devProp, (int)hipDev));
memcpy(&arch.arch, &devProp.arch, sizeof(hipDeviceArch_t));
NCCLCHECK(xmlSetAttrInt(gpuNode, "arch", arch.value));
}
Expand Down Expand Up @@ -1240,7 +1241,7 @@ ncclResult_t ncclTopoGetXmlFromGpu(struct ncclXmlNode* pciNode, uint32_t xmlDev,
#endif
}
#if defined(__HIP_PLATFORM_AMD__) || defined(__HIPCC__)
NCCLCHECK(ncclTopoXmlAddHipPartitionXgmi(xml, gpuNode, pciNode, xmlDev));
NCCLCHECK(ncclTopoXmlAddHipPartitionXgmi(xml, gpuNode, pciNode, hipDev));
#endif
#if CUDART_VERSION >= 11080
struct ncclXmlNode* c2cNode = NULL;
Expand Down
2 changes: 1 addition & 1 deletion projects/rccl/src/include/graph.h
Original file line number Diff line number Diff line change
Expand Up @@ -86,7 +86,7 @@ ncclResult_t ncclGetUserP2pLevel(int* level);
#define MAX_XGMI_INTER_GPUS 4
ncclResult_t ncclTopoGetIntraNetDev(struct ncclTopoSystem* system, int rank, struct ncclTopoGraph* graph, int channelId,
int type, int64_t* id, int* dev);
ncclResult_t ncclTopoGetLinkType(struct ncclTopoSystem* system, int cudaDev1, int cudaDev2, bool* isXGMI,
ncclResult_t ncclTopoGetLinkType(struct ncclTopoSystem* system, int rank1, int rank2, bool* isXGMI,
int maxInter = MAX_XGMI_INTER_GPUS, int nInter = 0, int* inter = nullptr);

// Find CPU affinity
Expand Down
2 changes: 1 addition & 1 deletion projects/rccl/src/transport.cc
Original file line number Diff line number Diff line change
Expand Up @@ -34,7 +34,7 @@ static ncclResult_t selectTransport(struct ncclComm* comm, struct ncclTopoGraph*
NCCLCHECK(ncclTopoGetIntraNetDev(comm->topo, peer, graph, channelId, (type == 1) ? 0 : 1, nullptr, &n2));
}
bool xgmi;
NCCLCHECK(ncclTopoGetLinkType(comm->topo, myInfo->cudaDev, peerInfo->cudaDev, &xgmi));
NCCLCHECK(ncclTopoGetLinkType(comm->topo, myInfo->rank, peerInfo->rank, &xgmi));

for (int t = 0; t < NTRANSPORTS; t++) {
if (graph == NULL && connIndex == NCCL_CONN_IDX_P2P_NET && (t == TRANSPORT_SHM || (!xgmi && t == TRANSPORT_P2P)))
Expand Down
2 changes: 1 addition & 1 deletion projects/rccl/src/transport/p2p.cc
Original file line number Diff line number Diff line change
Expand Up @@ -471,7 +471,7 @@ ncclResult_t p2pSendSetup(struct ncclComm* comm, struct ncclTopoGraph* graph, st

resources->next_hdp_reg = 0;
bool isXGMI;
if (ncclTopoGetLinkType(comm->topo, myInfo->cudaDev, peerInfo->cudaDev, &isXGMI) != ncclSuccess) {
if (ncclTopoGetLinkType(comm->topo, myInfo->rank, peerInfo->rank, &isXGMI) != ncclSuccess) {
INFO(NCCL_INIT | NCCL_P2P, "Ring %02d : %d -> %d failed to get link type and hop count", channelId, myInfo->rank,
peerInfo->rank);
return ncclInternalError;
Expand Down
42 changes: 42 additions & 0 deletions projects/rccl/test/host/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -362,6 +362,28 @@ function(rccl_define_micro_source_lists)
../common/main_altrsmi.cpp
PARENT_SCOPE)

# rccl-UnitTestsMicroGraph: the real src/graph topology TUs, which every other micro binary fakes.
set(TEST_MICRO_GRAPH_SOURCE_FILES
graph-dev-test.cc
fakes/amdsmi_fakes.cc
fakes/env_fakes.cc
fakes/hip_fakes.cc
fakes/nccl_fakes.cc
fakes/os_fakes.cc
fakes/rccl_wrap_fakes.cc
fakes/transport_stubs.cc
fakes/tuning_fakes.cc
${RCCL_HOST_HIPIFY_DIR}/src/graph/paths.cc
${RCCL_HOST_HIPIFY_DIR}/src/graph/rome_models.cc
${RCCL_HOST_HIPIFY_DIR}/src/graph/search.cc
${RCCL_HOST_HIPIFY_DIR}/src/graph/topo.cc
${RCCL_HOST_HIPIFY_DIR}/src/graph/xml.cc
${RCCL_HOST_HIPIFY_DIR}/src/misc/archinfo.cc
${RCCL_HOST_HIPIFY_DIR}/src/misc/nvmlwrap_stub.cc
${RCCL_HOST_HIPIFY_DIR}/src/misc/utils.cc
../common/main_altrsmi.cpp
PARENT_SCOPE)

# rccl-UnitTestsMicroGinHost -- src/gin/gin_host.cc (GIN_PROXY_NTHREADS, proxy affinity). Own
# binary: gin-plugin-init-test.cc already defines ncclParamGinEnable in
# rccl-UnitTestsMicro, and gin_fakes.cc supplies ncclGinQueryLastError to Init.
Expand Down Expand Up @@ -1110,6 +1132,26 @@ rccl_add_micro_binary(rccl-UnitTestsMicroTaskPrep
TASK_SCHED_CE_CC_PATH="${RCCL_HOST_HIPIFY_DIR}/src/enqueue/task_sched/ce_sched.cc"
CATEGORIES_YAML "${CMAKE_CURRENT_SOURCE_DIR}/../test_categories_micro_taskprep.yaml")

# ---------------------------------------------------------------------------
# rccl-UnitTestsMicroGraph is its own binary because the others link fakes for the graph symbols these TUs define.
# ---------------------------------------------------------------------------
set_source_files_properties(
${RCCL_HOST_HIPIFY_DIR}/src/graph/paths.cc
${RCCL_HOST_HIPIFY_DIR}/src/graph/rome_models.cc
${RCCL_HOST_HIPIFY_DIR}/src/graph/search.cc
${RCCL_HOST_HIPIFY_DIR}/src/graph/topo.cc
${RCCL_HOST_HIPIFY_DIR}/src/graph/xml.cc
${RCCL_HOST_HIPIFY_DIR}/src/misc/nvmlwrap_stub.cc
PROPERTIES GENERATED TRUE)
rccl_add_micro_binary(rccl-UnitTestsMicroGraph
SOURCES ${TEST_MICRO_GRAPH_SOURCE_FILES}
EXTRA_DEFS
${_MICRO_MODE_DEFS}
${_MICRO_AMDSMI_DEF}
RCCL_NCCL_FAKES_OMIT_GRAPH
RCCL_TRANSPORT_STUBS_OMIT_ncclPxnDisable
CATEGORIES_YAML "${CMAKE_CURRENT_SOURCE_DIR}/../test_categories_micro_graph.yaml")

# ---------------------------------------------------------------------------
# rccl-UnitTestsMicroDiagnostics
# ---------------------------------------------------------------------------
Expand Down
6 changes: 6 additions & 0 deletions projects/rccl/test/host/MICROTEST_README.md
Original file line number Diff line number Diff line change
Expand Up @@ -315,6 +315,10 @@ export colliding non-`static` symbols; otherwise a unit needs its own binary:
(via `DIAG_IB_WRITE_BW_CC_PATH`, suite `DiagIbWriteBwMicrotest.*`). Its own binary: it fakes the
`transport/p2p.cc` shareable-buffer entry points that `rccl-UnitTestsMicro`
compiles for real. See `test_categories_micro_diagnostics.yaml`.
- **`rccl-UnitTestsMicroGraph`**: the real `src/graph/{xml,topo,paths,search,rome_models}.cc`,
compiled as sources; suite `TopoGpuDevMicrotest.*` in `graph-dev-test.cc`. Its own binary:
every other target links fakes for the graph symbols these files define. See
`test_categories_micro_graph.yaml`.

Everything below (seams, fakes, coverage) applies to both; the concrete examples
use `p2p.cc`.
Expand Down Expand Up @@ -830,6 +834,7 @@ can be configured **directly** to build every host binary — `rccl-HostUnitTest
`rccl-UnitTestsMicro`, `rccl-UnitTestsMicroWarpSpeed`,
`rccl-UnitTestsMicroInit[-uncached|-faultinj]`, `rccl-UnitTestsMicroEnqueue[-devlinker]`,
`rccl-UnitTestsMicroGinHost`, `rccl-UnitTestsMicroCe`, `rccl-UnitTestsMicroDiagnostics`,
`rccl-UnitTestsMicroGraph`,
`rccl-UnitTestsMicroSymKernels` and `rccl-UnitTestsMicroTaskPrep` — **without configuring/building all of
librccl**. It compiles just the tests + fakes + the hipified unit-under-test
sources.
Expand Down Expand Up @@ -869,6 +874,7 @@ cmake --build build -j"$(nproc)"
./build/rccl-UnitTestsMicroSymKernels # sym_kernels.cc tests
./build/rccl-UnitTestsMicroTaskPrep # src/enqueue/task_prep/ + task_sched/ tests
./build/rccl-UnitTestsMicroDiagnostics # src/diagnostics/{p2p,ib_write_bw}.cc tests
./build/rccl-UnitTestsMicroGraph # src/graph/{xml,topo,paths,search,rome_models}.cc tests
./build/rccl-UnitTestsMicroGinHost # src/gin/gin_host.cc GIN_PROXY_NTHREADS
./build/rccl-UnitTestsMicroDiagnostics # src/diagnostics/p2p.cc tests
./build/rccl-UnitTestsMicroCe # src/ce_coll.cc tests
Expand Down
32 changes: 32 additions & 0 deletions projects/rccl/test/host/fakes/amdsmi_fakes.cc
Original file line number Diff line number Diff line change
Expand Up @@ -7,6 +7,15 @@
// Implementation of the src/misc/amdsmi_wrap.cc fakes. See amdsmi_fakes.h.

#include "amdsmi_fakes.h"
#include "signature-drift.h"

ASSERT_HOOK_MATCHES_PROD(g_amdSmiGetDeviceIndexByPciBusId, amd_smi_getDeviceIndexByPciBusId);
ASSERT_HOOK_MATCHES_PROD(g_amdSmiGetFabricDeviceInfo, amd_smi_getFabricDeviceInfo);
ASSERT_HOOK_MATCHES_PROD(g_amdSmiGetNumDevice, amd_smi_getNumDevice);
ASSERT_HOOK_MATCHES_PROD(g_amdSmiGetDevicePciBusIdString, amd_smi_getDevicePciBusIdString);
ASSERT_HOOK_MATCHES_PROD(g_amdSmiGetLinkInfo, amd_smi_getLinkInfo);
ASSERT_HOOK_MATCHES_PROD(g_amdSmiFabricTelemetryAcquire, amd_smi_fabricTelemetryAcquire);
ASSERT_HOOK_MATCHES_PROD(g_amdSmiFabricTelemetryRelease, amd_smi_fabricTelemetryRelease);

ncclResult_t DefaultAmdSmiGetDeviceIndexByPciBusId(const char*, uint32_t* deviceIndex) {
if (deviceIndex) *deviceIndex = static_cast<uint32_t>(-1); // -1 -> skip fabric block
Expand All @@ -30,6 +39,26 @@ ncclResult_t amd_smi_getFabricDeviceInfo(uint32_t deviceIndex, struct amdsmiFabr
ncclResult_t g_amdSmiInitResult = ncclSuccess;
ncclResult_t amd_smi_init() { return g_amdSmiInitResult; }

static ncclResult_t DefaultAmdSmiGetNumDevice(uint32_t* numDevs) {
*numDevs = 0;
return ncclSuccess;
}
std::function<ncclResult_t(uint32_t*)> g_amdSmiGetNumDevice = DefaultAmdSmiGetNumDevice;
ncclResult_t amd_smi_getNumDevice(uint32_t* numDevs) { return g_amdSmiGetNumDevice(numDevs); }

static ncclResult_t DefaultAmdSmiGetDevicePciBusIdString(uint32_t, char*, size_t) { return ncclInternalError; }
std::function<ncclResult_t(uint32_t, char*, size_t)> g_amdSmiGetDevicePciBusIdString =
DefaultAmdSmiGetDevicePciBusIdString;
ncclResult_t amd_smi_getDevicePciBusIdString(uint32_t deviceIndex, char* pciBusId, size_t len) {
return g_amdSmiGetDevicePciBusIdString(deviceIndex, pciBusId, len);
}

static ncclResult_t DefaultAmdSmiGetLinkInfo(int, int, amdsmi_link_type_t*, int*, int*) { return ncclInternalError; }
std::function<ncclResult_t(int, int, amdsmi_link_type_t*, int*, int*)> g_amdSmiGetLinkInfo = DefaultAmdSmiGetLinkInfo;
ncclResult_t amd_smi_getLinkInfo(int srcDev, int dstDev, amdsmi_link_type_t* type, int* hops, int* count) {
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return g_amdSmiGetLinkInfo(srcDev, dstDev, type, hops, count);
}

ncclResult_t DefaultAmdSmiFabricTelemetryAcquire(uint32_t, uint64_t, int, bool* acquired) {
if (acquired) *acquired = false; // telemetry is opt-in and off by default
return ncclSuccess;
Expand All @@ -50,6 +79,9 @@ void ResetAmdSmiFakes() {
g_amdSmiGetDeviceIndexByPciBusId = DefaultAmdSmiGetDeviceIndexByPciBusId;
g_amdSmiGetFabricDeviceInfo = DefaultAmdSmiGetFabricDeviceInfo;
g_amdSmiInitResult = ncclSuccess;
g_amdSmiGetNumDevice = DefaultAmdSmiGetNumDevice;
g_amdSmiGetDevicePciBusIdString = DefaultAmdSmiGetDevicePciBusIdString;
g_amdSmiGetLinkInfo = DefaultAmdSmiGetLinkInfo;
g_amdSmiFabricTelemetryAcquire = DefaultAmdSmiFabricTelemetryAcquire;
g_amdSmiFabricTelemetryRelease = DefaultAmdSmiFabricTelemetryRelease;
}
8 changes: 6 additions & 2 deletions projects/rccl/test/host/fakes/amdsmi_fakes.h
Original file line number Diff line number Diff line change
Expand Up @@ -13,10 +13,9 @@
#include <cstdint>
#include <functional>

#include "amdsmi_wrap.h"
#include "nccl.h"

struct amdsmiFabricDeviceInfo;

// fillInfo's UALoE/MNNVL probe. The default answers -1, i.e. what a host with no fabric device reports.
ncclResult_t DefaultAmdSmiGetDeviceIndexByPciBusId(const char* busId, uint32_t* deviceIndex);
extern std::function<ncclResult_t(const char*, uint32_t*)> g_amdSmiGetDeviceIndexByPciBusId;
Expand All @@ -27,6 +26,11 @@ extern std::function<ncclResult_t(uint32_t, struct amdsmiFabricDeviceInfo*)> g_a

extern ncclResult_t g_amdSmiInitResult;

// XGMI discovery in ncclTopoGetXmlFromGpu. The defaults report an empty machine and fail every per-device query.
extern std::function<ncclResult_t(uint32_t*)> g_amdSmiGetNumDevice;
extern std::function<ncclResult_t(uint32_t, char*, size_t)> g_amdSmiGetDevicePciBusIdString;
extern std::function<ncclResult_t(int, int, amdsmi_link_type_t*, int*, int*)> g_amdSmiGetLinkInfo;

// commAlloc's fabric telemetry opt-in. The default declines, i.e. what every host
// reports unless RCCL_FABRIC_TELEMETRY_ENABLE is set, which leaves commFree with
// nothing to release.
Expand Down
9 changes: 0 additions & 9 deletions projects/rccl/test/host/fakes/dev_runtime_micro_fakes.cc
Original file line number Diff line number Diff line change
Expand Up @@ -157,15 +157,6 @@ ncclResult_t ncclCommWindowDeregister(ncclComm_t comm, ncclWindow_t win) {
// Group state machine.
// ---------------------------------------------------------------------------

// ---------------------------------------------------------------------------
// Param loader.
// ---------------------------------------------------------------------------
int64_t ncclLoadParam(char const*, int64_t deftVal, int64_t, int64_t* cache, int8_t* noCache) {
if (cache) *cache = deftVal;
if (noCache) *noCache = 0;
return deftVal;
}

// Emitted by init.cc, which this binary does not link, so the redirected
// NCCL_PARAM in dev_runtime.cc does not cover it. Routed through g_loadParam
// like the params dev_runtime.cc owns, so a test can drive the NCCL_WIN_ENABLE=0
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