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[rocjitsu] Tune compute thread allocations - #12635
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🟡 Changes recommended
Checkpoint restoration still applies the old per-XCD capacity and can reduce restored dispatch widths.
Review effort: Balanced
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What changed in this PR
Retunes rocjitsu functional execution-thread allocations and expands shared dispatch pools across concurrent XCD submissions.
Changes:
- Raises shared pool capacity to aggregate XCD demand.
- Retunes target presets to 24, 24+8, and 40+8 thread ceilings.
- Updates tests, schema comments, and documentation.
| File | Description |
|---|---|
tests/partitioning_test.cpp |
Updates allocation-policy tests. |
tests/config_test.cpp |
Tests aggregate XCD dispatch width. |
schemas/simulation_config.fbs |
Revises thread-policy documentation. |
vm/soc.cpp |
Aggregates dispatch capacity across XCDs. |
config/config_loader.h |
Updates allocation API comments. |
config/config_loader.cpp |
Removes the functional 32-thread cap and aggregates topology capacity. |
docs/sphinx/how-to/configure-topology.md |
Documents shared pool sizing. |
docs/sphinx/conceptual/json-configuration.md |
Updates JSON option semantics. |
docs/mma-admission.md |
References the revised helper policy. |
docs/configuration.md |
Documents new target allocations. |
docs/concurrent-dispatch.md |
Updates dispatch policy guidance. |
docs/async-instructions.md |
Revises CDNA4/CDNA5 helper tables. |
configs/gfx950_mi355x.json |
Sets CDNA4 to 24+8. |
configs/gfx950_mi355x_kmd.json |
Sets KMD CDNA4 to 24+8. |
configs/gfx942_cdna3.json |
Caps CDNA3 at 24 threads. |
configs/gfx942_cdna3_kmd.json |
Caps KMD CDNA3 at 24 threads. |
configs/gfx90a_mi210_kmd.json |
Caps MI210 at 24 threads. |
configs/gfx1250_mi455x.json |
Sets CDNA5 to 40+8. |
configs/gfx1201_r9700.json |
Caps RDNA4 at 24 threads. |
configs/gfx1151.json |
Caps gfx1151 at 24 threads. |
configs/gfx1100_w7900.json |
Caps W7900 at 24 threads. |
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Follow up #12515, which improved scaling by reducing VM and wave dispatch overhead. Retune the presets to use the improved scaling while avoiding extra workers for marginal gains. Let target tables set functional thread limits and size the shared CU worker pool for concurrent XCD submissions, preserving per-submission limits. Cap desktop/MI210 and CDNA3 at 24 execution threads; use 24+8 on CDNA4 and 40+8 on CDNA5. A+B denotes engine/CU threads plus MMA helpers. Allocation-only IREE, Gluon and Tensile comparisons, using minimum whole- process time from two runs on the same 48 reserved physical cores. Speedups are geometric means with equal weight per workload family: | Target | Wider vs. narrower | Speedup | Default | | --- | --- | ---: | --- | | CDNA3 | 32 vs. 24 | 1.030x | 24 | | CDNA4 | 40+8 vs. 24+8 | 1.037x | 24+8 | | CDNA5 | 40+8 vs. 24+8 | 1.125x | 40+8 | Lower-allocation checks across 316 passing processes support keeping MMA synchronous below these helper thresholds. Align CDNA5's four-thread entry with the measured split. Preserve aggregate dispatch capacity when restoring checkpoints. Extend existing tests and update documentation; validate with Clang and GCC, including ASan and UBSan.
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Follow up #12515, which improved scaling by reducing VM and wave dispatch overhead. Retune the presets to use the improved scaling while avoiding extra workers for marginal gains.
Let target tables set functional thread limits and size the shared CU worker pool for concurrent XCD submissions, preserving per-submission limits. Cap desktop/MI210 and CDNA3 at 24 execution threads; use 24+8 on CDNA4 and 40+8 on CDNA5. A+B denotes engine/CU threads plus MMA helpers.
Allocation-only IREE, Gluon and Tensile comparisons, using minimum whole-process time from two runs on the same 48 reserved physical cores. Speedups are geometric means with equal weight per workload family:
Lower-allocation checks across 316 passing processes support keeping MMA synchronous below these helper thresholds. Align CDNA5's four-thread entry with the measured split. Update existing tests and documentation; validate with Clang and GCC, including ASan and UBSan.