[newling]

#12217 already caches instruction-fetch VM snapshots per CU. This PR extends reuse to data operations, kernarg preloads, and scratch validation, avoiding their repeated global-registry acquisitions. Waves share the snapshot captured during AQL admission; the per-CU instruction cache remains the fallback.

Waves retain the admission root across VM-root replacement; changes within that root remain visible. Invalidation, unregister, and reset revoke access. Fetch and uncommitted wave setup retry with fresh access when available. Revoked in-flight data operations abort the dispatch and report a runtime memory-violation exception without successful completion, since replay could repeat partial effects. The deferred-load regression also reproduces develop’s missing completion/exception and verifies the PR’s failure notification.

A hipBLASLt comparison used 20 measured process runs per revision, plus two excluded warmups each, executing the same first 100 solutions of the 513 × 513 × 513 sk_sgemm_quick group Cijk_Ailk_Bjlk_S_B_UserArgs_01. The PR used less wall time in all 20 pairs: 9.7% lower paired geometric mean wall time, with a 95% paired-bootstrap interval of 7.2–12.6%. All 4,000 measured solution validations passed. This is one workload on a shared host, with substantial timing variation.

All 20 paired process wall times

Measured develop 9219e7f966 against PR ef5b637212, before the setup-recovery follow-up. Identical artifacts/configuration, Clang 23 Release builds, six-CPU emulator budget, and OMP_NUM_THREADS=1. Odd pairs ran develop first; even pairs ran the PR first. Every measured run is included. The bootstrap resamples these 20 pairs and describes variability within this experiment.

Pair	Develop (s)	PR (s)
1	54.46	50.58
2	52.44	41.62
3	53.45	50.83
4	54.54	50.70
5	53.73	50.91
6	54.34	50.85
7	53.66	50.78
8	53.08	51.21
9	53.84	50.51
10	54.42	50.85
11	53.18	50.78
12	53.58	50.95
13	50.03	40.16
14	51.49	38.91
15	54.58	50.92
16	53.77	50.78
17	45.97	39.80
18	52.28	45.05
19	43.56	39.43
20	54.56	46.67

Focused Release/ThreadSanitizer tests, GCC UBSan compilation, and changed-file pre-commit checks pass, including controls for successful setup recovery and runtime-visible data-access failure.

Motivated by hipBLASLt emulation timeouts in ROCm/rocm-libraries#10534.

JIRA ID: AIHPBLAS-3988

[therock-pr-bot]

✅ All Checks Passed — Ready for Review

Check	Status	Details
📝 PR Description	✅ Pass	—
⛔ Forbidden Files	✅ Pass	—
🧪 Unit Test	✅ Pass	—
🔎 pre-commit	✅ Pass	—
🚫 Draft PR	🔜 To Be Enabled	—
🚩 Feature Flag	🔜 To Be Enabled	—
📊 Code Coverage	🔜 To Be Enabled	—
🤖 therock-pr-bot	✅ Pass	—

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[therock-pr-bot]

🎉 All checks passed! This PR is ready for review.

[kuhar]

Left one note to consider

[kuhar]

LGTM

[systems-assistant]

TheRock Submodule Bump Activity

Newest first

• 2026-10-08 — Included in TheRock via ROCm/TheRock#8831.