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Merged
litvaOo merged 10 commits into from
Oct 7, 2026
Merged

feat(rocr,clr): Add gfx1170, gfx1171 target support #11977

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f759746
feat(rocr,hip): Enable gfx1170 and gfx1171 target IDs
TomSang Apr 14, 2026
773f032
feat(rocr): Add addrlib support for Medusa family
lttamd Jun 1, 2026
8172c21
feat(hip): Enable OCP FP8 support on gfx117x
stsokolo Jul 12, 2026
93fef77
feat(rocr,hip): Map gfx1170 and gfx1171 to gfx11-7-generic
TomSang Sep 1, 2026
ebc6fa5
feat(rocr,hip): Align addrlib family with Mesa
dayatsin-amd Sep 16, 2026
edcb1ba
feat(rocr, hip, ocl): Add missing symbols of gfx117x.
TomSang Sep 17, 2026
3a3af22
remove changes in palPipelineAbi.h since that will come from pal drop
agunashe Oct 1, 2026
ab032af
Update amdgpu-windows-interop with Pal#1251ecbd (#12630)
systems-assistant[bot] Oct 1, 2026
3a69a4f
fix EF_AMDGPU_MACH_AMDGCN_LAST value
agunashe Oct 1, 2026
a7292ca
Update amdgpu-windows-interop with Pal#b8129e83 (#12779)
systems-assistant[bot] Oct 5, 2026
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6 changes: 4 additions & 2 deletions projects/clr/hipamd/include/hip/amd_detail/amd_hip_fp8.h
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Expand Up @@ -12,7 +12,8 @@
#ifndef _HIP_INCLUDE_HIP_AMD_DETAIL_HIP_FP8_H_
#define _HIP_INCLUDE_HIP_AMD_DETAIL_HIP_FP8_H_

#if (defined(__gfx942__) || defined(__gfx1200__) || defined(__gfx1201__) || \
#if (defined(__gfx942__) || defined(__gfx1170__) || defined(__gfx1171__) || \
defined(__gfx1200__) || defined(__gfx1201__) || \
defined(__gfx950__) || (defined(__gfx1250__) || defined(__gfx1250_strict__))) && \
__HIP_DEVICE_COMPILE__
#define HIP_FP8_CVT_FAST_PATH 1
Expand All @@ -23,7 +24,8 @@
#if defined(__gfx942__) && __HIP_DEVICE_COMPILE__
#define HIP_FP8_TYPE_OCP 0
#define HIP_FP8_TYPE_FNUZ 1
#elif (defined(__gfx1200__) || defined(__gfx1201__) || defined(__gfx950__) || \
#elif (defined(__gfx1170__) || defined(__gfx1171__) || defined(__gfx1200__) || \
defined(__gfx1201__) || defined(__gfx950__) || \
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(defined(__gfx1250__) || defined(__gfx1250_strict__))) && \
__HIP_DEVICE_COMPILE__
#define HIP_FP8_TYPE_OCP 1
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3 changes: 3 additions & 0 deletions projects/clr/hipamd/src/hip_comgr_helper.cpp
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Expand Up @@ -614,6 +614,9 @@ const std::map<std::string, std::string>& GenericTargetMapping() {
{"gfx1103", "gfx11-generic"},
{"gfx1150", "gfx11-generic"},
{"gfx1151", "gfx11-generic"},
// "gfx11-7-generic"
{"gfx1170", "gfx11-7-generic"},
{"gfx1171", "gfx11-7-generic"},
// "gfx12-generic"
{"gfx1200", "gfx12-generic"},
{"gfx1201", "gfx12-generic"},
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2 changes: 2 additions & 0 deletions projects/clr/hipamd/src/hip_fatbin.cpp
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Expand Up @@ -134,6 +134,8 @@ static std::string TargetGenericMap(const std::string& input) {
{"amdgcn-amd-amdhsa--gfx1151", "amdgcn-amd-amdhsa--gfx11-generic" },
{"amdgcn-amd-amdhsa--gfx1152", "amdgcn-amd-amdhsa--gfx11-generic" },
{"amdgcn-amd-amdhsa--gfx1153", "amdgcn-amd-amdhsa--gfx11-generic" },
{"amdgcn-amd-amdhsa--gfx1170", "amdgcn-amd-amdhsa--gfx11-7-generic" },
{"amdgcn-amd-amdhsa--gfx1171", "amdgcn-amd-amdhsa--gfx11-7-generic" },
{"amdgcn-amd-amdhsa--gfx1200", "amdgcn-amd-amdhsa--gfx12-generic" },
{"amdgcn-amd-amdhsa--gfx1201", "amdgcn-amd-amdhsa--gfx12-generic" },
{"amdgcn-amd-amdhsa--gfx1250", "amdgcn-amd-amdhsa--gfx12-5-generic"},
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3 changes: 3 additions & 0 deletions projects/clr/rocclr/device/device.cpp
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Expand Up @@ -242,7 +242,10 @@ std::pair<const Isa*, const Isa*> Isa::supportedIsas() {
{"gfx1151", true, true, 11, 5, 1, NONE, NONE, 2, 32, 1, 256, 64 * Ki, 32, 1024},
{"gfx1152", true, true, 11, 5, 2, NONE, NONE, 2, 32, 1, 256, 64 * Ki, 32, 1024},
{"gfx1153", true, true, 11, 5, 3, NONE, NONE, 2, 32, 1, 256, 64 * Ki, 32, 1024},
{"gfx1170", true, true, 11, 7, 0, NONE, NONE, 2, 32, 1, 256, 64 * Ki, 32, 1024},
{"gfx1171", true, true, 11, 7, 1, NONE, NONE, 2, 32, 1, 256, 64 * Ki, 32, 1024},
{"gfx11-generic", true, true, 11, 0, 0, NONE, NONE, 2, 32, 1, 256, 64 * Ki, 32, 1024},
{"gfx11-7-generic", true, true, 11, 7, 0, NONE, NONE, 2, 32, 1, 256, 64 * Ki, 32, 1024},
{"gfx1200", true, true, 12, 0, 0, NONE, NONE, 2, 32, 1, 256, 64 * Ki, 32, 1024},
{"gfx1201", true, true, 12, 0, 1, NONE, NONE, 2, 32, 1, 256, 64 * Ki, 32, 1024},
{"gfx1250", true, true, 12, 5, 0, NONE, NONE, 4, 32, 1, 256, 320* Ki, 64, 1024},
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2 changes: 2 additions & 0 deletions projects/clr/rocclr/device/pal/paldevice.cpp
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Expand Up @@ -89,6 +89,8 @@ static constexpr PalDevice supportedPalDevices[] = {
{11, 5, 1, "gfx1151", Pal::AsicRevision::StrixHalo},
{11, 5, 2, "gfx1152", Pal::AsicRevision::Krackan1},
{11, 5, 3, "gfx1153", Pal::AsicRevision::Krackan2},
{11, 7, 0, "gfx1170", Pal::AsicRevision::Gfx1170},
{11, 7, 1, "gfx1171", Pal::AsicRevision::Gfx1171},
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{12, 0, 0, "gfx1200", Pal::AsicRevision::Navi44},
{12, 0, 1, "gfx1201", Pal::AsicRevision::Navi48},
};
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2 changes: 2 additions & 0 deletions projects/clr/rocclr/device/pal/palsettings.cpp
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Expand Up @@ -152,6 +152,8 @@ bool Settings::create(const Pal::DeviceProperties& palProp,
// Fall through for Navi2x ...
case Pal::AsicRevision::StrixHalo:
case Pal::AsicRevision::Strix1:
case Pal::AsicRevision::Gfx1170:
case Pal::AsicRevision::Gfx1171:
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case Pal::AsicRevision::Krackan1:
case Pal::AsicRevision::Krackan2:
case Pal::AsicRevision::Phoenix1:
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7 changes: 7 additions & 0 deletions projects/hip-tests/catch/hipTestMain/hip_test_features.cc
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Expand Up @@ -89,6 +89,9 @@ bool getGenericTarget(const std::string& agentTarget, std::string& genericTarget
{"gfx1103", "gfx11-generic"},
{"gfx1150", "gfx11-generic"},
{"gfx1151", "gfx11-generic"},
// "gfx11-7-generic"
{"gfx1170", "gfx11-7-generic"},
{"gfx1171", "gfx11-7-generic"},
// "gfx12-generic"
{"gfx1200", "gfx12-generic"},
{"gfx1201", "gfx12-generic"},
Expand All @@ -113,6 +116,10 @@ Generic GFX11

--offload-arch=gfx11-generic - includes [gfx1100-gfx1103], gfx1150, gfx1151

Generic GFX11.7

--offload-arch=gfx11-7-generic - includes gfx1170, gfx1171

Generic GFX10.3

--offload-arch=gfx10.3-generic - includes [gfx1030-gfx1036]
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1 change: 1 addition & 0 deletions projects/hip-tests/catch/unit/compiler/CMakeLists.txt
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Expand Up @@ -31,6 +31,7 @@ if(HIP_PLATFORM MATCHES "amd")
--offload-arch=gfx10-1-generic
--offload-arch=gfx10-3-generic
--offload-arch=gfx11-generic
--offload-arch=gfx11-7-generic
--offload-arch=gfx12-generic
--offload-arch=gfx12-5-generic)

Expand Down
1 change: 1 addition & 0 deletions projects/hip-tests/catch/unit/module/CMakeLists.txt
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Expand Up @@ -286,6 +286,7 @@ if(HIP_PLATFORM MATCHES "amd")
--offload-arch=gfx10-1-generic
--offload-arch=gfx10-3-generic
--offload-arch=gfx11-generic
--offload-arch=gfx11-7-generic
--offload-arch=gfx12-generic
--offload-arch=gfx12-5-generic
)
Expand Down
1 change: 1 addition & 0 deletions projects/hip-tests/samples/0_Intro/generic_target/saxpy.cpp
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Expand Up @@ -92,6 +92,7 @@ int main() {
* "--offload-arch=gfx10-1-generic",
* "--offload-arch=gfx10-3-generic",
* "--offload-arch=gfx11-generic",
* "--offload-arch=gfx11-7-generic",
* "--offload-arch=gfx12-generic"
*
* */
Expand Down
2 changes: 1 addition & 1 deletion projects/rocr-runtime/rocrtst/suites/test_common/CMakeLists.txt
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Expand Up @@ -112,7 +112,7 @@ endif()
set(DEFAULT_TARGETS "gfx700;gfx701;gfx702;gfx801;gfx802;gfx803;gfx805;gfx810"
"gfx900;gfx902;gfx904;gfx906;gfx908;gfx909;gfx90a;gfx90c;gfx942;gfx950"
"gfx1010;gfx1011;gfx1012;gfx1013;gfx1030;gfx1031;gfx1032;gfx1033;gfx1034;gfx1035;gfx1036"
"gfx1100;gfx1101;gfx1102;gfx1103;gfx1150;gfx1151;gfx1152;gfx1200;gfx1201;gfx1250;gfx1251")
"gfx1100;gfx1101;gfx1102;gfx1103;gfx1150;gfx1151;gfx1152;gfx1170;gfx1171;gfx1200;gfx1201;gfx1250;gfx1251")

#
# Currently support for Windows platform is not present
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3 changes: 3 additions & 0 deletions projects/rocr-runtime/runtime/hsa-runtime/core/runtime/isa.cpp
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Expand Up @@ -292,6 +292,7 @@ IsaRegistry::GetSupportedGenericVersions() {
{prepend_isa_prefix("gfx10-1-generic:xnack+"), 1},
{prepend_isa_prefix("gfx10-3-generic"), 1},
{prepend_isa_prefix("gfx11-generic"), 1},
{prepend_isa_prefix("gfx11-7-generic"), 1},
{prepend_isa_prefix("gfx12-generic"), 1},
{prepend_isa_prefix("gfx12-5-generic"), 1}
};
Expand Down Expand Up @@ -451,6 +452,8 @@ const IsaRegistry::IsaMap& IsaRegistry::GetSupportedIsas() {
ISAREG_ENTRY_GEN("gfx1151", 11, 5, 1, unsupported, unsupported, 32, "gfx11-generic")
ISAREG_ENTRY_GEN("gfx1152", 11, 5, 2, unsupported, unsupported, 32, "gfx11-generic")
ISAREG_ENTRY_GEN("gfx1153", 11, 5, 3, unsupported, unsupported, 32, "gfx11-generic")
ISAREG_ENTRY_GEN("gfx1170", 11, 7, 0, unsupported, unsupported, 32, "gfx11-7-generic")
ISAREG_ENTRY_GEN("gfx1171", 11, 7, 1, unsupported, unsupported, 32, "gfx11-7-generic")
ISAREG_ENTRY_GEN("gfx1200", 12, 0, 0, unsupported, unsupported, 32, "gfx12-generic")
ISAREG_ENTRY_GEN("gfx1201", 12, 0, 1, unsupported, unsupported, 32, "gfx12-generic")
ISAREG_ENTRY_GEN("gfx1250", 12, 5, 0, unsupported, unsupported, 32, "gfx12-5-generic")
Expand Down
2 changes: 2 additions & 0 deletions projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/amdgpu_asic_addr.h
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Expand Up @@ -33,6 +33,7 @@
#define FAMILY_RPL 0x95 //# 149 / Raphael
#define FAMILY_MDN 0x97 //# 151 / Mendocino
#define FAMILY_GFX12 0x98
#define FAMILY_GFX117X 0x9A //# 154 / gfx1170, gfx1171

// AMDGPU_FAMILY_IS(familyId, familyName)
#define FAMILY_IS(f, fn) (f == FAMILY_##fn)
Expand All @@ -49,6 +50,7 @@
#define FAMILY_IS_NV3(f) FAMILY_IS(f, NV3)
#define FAMILY_IS_RMB(f) FAMILY_IS(f, RMB)
#define FAMILY_IS_GFX12(f) FAMILY_IS(f, GFX12)
#define FAMILY_IS_GFX117X(f) FAMILY_IS(f, GFX117X)

#define AMDGPU_UNKNOWN 0xFF

Expand Down
1 change: 1 addition & 0 deletions projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrlib.cpp
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Expand Up @@ -202,6 +202,7 @@ ADDR_E_RETURNCODE Lib::Create(
case FAMILY_NV3:
case FAMILY_GFX1150:
case FAMILY_GFX1103:
case FAMILY_GFX117X:
pLib = Gfx11HwlInit(&client);
break;
case FAMILY_GFX12:
Expand Down
3 changes: 3 additions & 0 deletions projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/gfx11/gfx11addrlib.cpp
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Expand Up @@ -748,6 +748,9 @@ ChipFamily Gfx11Lib::HwlConvertChipFamily(
case FAMILY_GFX1103:
m_settings.isGfx1103 = 1;
break;
case FAMILY_GFX117X:
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// gfx1170/gfx1171 use the base gfx11 tiling/swizzle behavior
break;
default:
ADDR_ASSERT(!"Unknown chip family");
break;
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6 changes: 6 additions & 0 deletions projects/rocr-runtime/runtime/hsa-runtime/image/blit_kernel.cpp
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Expand Up @@ -101,6 +101,8 @@ extern uint8_t ocl_blit_object_gfx1150[];
extern uint8_t ocl_blit_object_gfx1151[];
extern uint8_t ocl_blit_object_gfx1152[];
extern uint8_t ocl_blit_object_gfx1153[];
extern uint8_t ocl_blit_object_gfx1170[];
extern uint8_t ocl_blit_object_gfx1171[];
extern uint8_t ocl_blit_object_gfx1200[];
extern uint8_t ocl_blit_object_gfx1201[];

Expand Down Expand Up @@ -1060,6 +1062,10 @@ hsa_status_t BlitKernel::GetPatchedBlitObject(const char* agent_name,
*blit_code_object = ocl_blit_object_gfx1152;
} else if (sname == "gfx1153") {
*blit_code_object = ocl_blit_object_gfx1153;
} else if (sname == "gfx1170") {
*blit_code_object = ocl_blit_object_gfx1170;
} else if (sname == "gfx1171") {
*blit_code_object = ocl_blit_object_gfx1171;
} else if (sname == "gfx1200") {
*blit_code_object = ocl_blit_object_gfx1200;
} else if (sname == "gfx1201") {
Expand Down
2 changes: 1 addition & 1 deletion projects/rocr-runtime/runtime/hsa-runtime/image/blit_src/CMakeLists.txt
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Expand Up @@ -50,7 +50,7 @@ if (NOT DEFINED TARGET_DEVICES)
set (TARGET_DEVICES "gfx700;gfx701;gfx702;gfx801;gfx802;gfx803;gfx805;gfx810"
"gfx900;gfx902;gfx904;gfx906;gfx908;gfx909;gfx90a;gfx90c;gfx942;gfx950"
"gfx1010;gfx1011;gfx1012;gfx1013;gfx1030;gfx1031;gfx1032;gfx1033;gfx1034;gfx1035;gfx1036"
"gfx1100;gfx1101;gfx1102;gfx1103;gfx1150;gfx1151;gfx1152;gfx1153"
"gfx1100;gfx1101;gfx1102;gfx1103;gfx1150;gfx1151;gfx1152;gfx1153;gfx1170;gfx1171"
"gfx1200;gfx1201")
endif()
set( TARGET_DEVICES ${TARGET_DEVICES} CACHE STRING "Build targets" FORCE )
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5 changes: 4 additions & 1 deletion projects/rocr-runtime/runtime/hsa-runtime/inc/amd_hsa_elf.h
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Expand Up @@ -148,13 +148,16 @@ enum : unsigned {
EF_AMDGPU_MACH_AMDGCN_GFX1153 = 0x058,
EF_AMDGPU_MACH_AMDGCN_GFX12_GENERIC = 0x059,
EF_AMDGPU_MACH_AMDGCN_GFX12_5_GENERIC = 0x05b,
EF_AMDGPU_MACH_AMDGCN_GFX1170 = 0x05D,
EF_AMDGPU_MACH_AMDGCN_GFX1171 = 0x05E,
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EF_AMDGPU_MACH_AMDGCN_GFX9_4_GENERIC = 0x05f,
EF_AMDGPU_MACH_AMDGCN_GFX11_7_GENERIC = 0x062,
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EF_AMDGPU_MACH_AMDGCN_GFX1250_STRICT = 0x0eb,
// clang-format on

// First/last AMDGCN-based processors.
EF_AMDGPU_MACH_AMDGCN_FIRST = EF_AMDGPU_MACH_AMDGCN_GFX600,
EF_AMDGPU_MACH_AMDGCN_LAST = EF_AMDGPU_MACH_AMDGCN_GFX9_4_GENERIC,
EF_AMDGPU_MACH_AMDGCN_LAST = EF_AMDGPU_MACH_AMDGCN_GFX1250_STRICT,

// Indicates if the "xnack" target feature is enabled for all code contamained
// in the object.
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3 changes: 3 additions & 0 deletions projects/rocr-runtime/runtime/hsa-runtime/libamdhsacode/amd_hsa_code.cpp
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Expand Up @@ -653,6 +653,8 @@ inline bool IsNoteStringSizeWithinRoom(size_t room, size_t offset, uint16_t clai
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1151: MI.Name = "gfx1151"; MI.XnackSupported = false; MI.SrameccSupported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1152: MI.Name = "gfx1152"; MI.XnackSupported = false; MI.SrameccSupported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1153: MI.Name = "gfx1153"; MI.XnackSupported = false; MI.SrameccSupported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1170: MI.Name = "gfx1170"; MI.XnackSupported = false; MI.SrameccSupported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1171: MI.Name = "gfx1171"; MI.XnackSupported = false; MI.SrameccSupported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1200: MI.Name = "gfx1200"; MI.XnackSupported = false; MI.SrameccSupported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1201: MI.Name = "gfx1201"; MI.XnackSupported = false; MI.SrameccSupported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1250: MI.Name = "gfx1250"; MI.XnackSupported = true; MI.SrameccSupported = true; break;
Expand All @@ -663,6 +665,7 @@ inline bool IsNoteStringSizeWithinRoom(size_t room, size_t offset, uint16_t clai
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX10_1_GENERIC: MI.Name = "gfx10-1-generic"; MI.XnackSupported = true; MI.SrameccSupported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX10_3_GENERIC: MI.Name = "gfx10-3-generic"; MI.XnackSupported = false; MI.SrameccSupported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX11_GENERIC: MI.Name = "gfx11-generic"; MI.XnackSupported = false; MI.SrameccSupported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX11_7_GENERIC: MI.Name = "gfx11-7-generic"; MI.XnackSupported = false; MI.SrameccSupported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX12_GENERIC: MI.Name = "gfx12-generic"; MI.XnackSupported = false; MI.SrameccSupported = false; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX12_5_GENERIC: MI.Name = "gfx12-5-generic"; MI.XnackSupported = false; MI.SrameccSupported = false; break;
default: return false;
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1 change: 1 addition & 0 deletions shared/amdgpu-windows-interop/pal/CMakeLists.txt
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Expand Up @@ -80,6 +80,7 @@ target_compile_definitions(pal
PAL_BUILD_RDF=1
PAL_DEVELOPER_BUILD=0
PAL_KMT_BUILD=1
PAL_WORK_LISTS_SUPPORT=1
)
target_include_directories(pal
INTERFACE
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30 changes: 30 additions & 0 deletions shared/amdgpu-windows-interop/pal/inc/core/pal.h
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Expand Up @@ -637,6 +637,36 @@ enum class TriState : uint8
Count
};

/// Enum to specify tmz feature status for gpu memory
/// Setting an allocation's TMZ mode allows access to TMZ-protected content. Each mode maps to a fixed combination of
/// read/write permissions for each HW IP family, as defined in the table below.
///
/// | IP Family | Hwdrm | HwdrmPlus | Notes |
/// | ---------- | ----- | --------- | --------------------------- |
/// | GfxIp | RW | None | Includes GFX, ACE, and SDMA |
/// | DcnIp | R | R | The display engine |
#if PAL_BUILD_BRIGHTON
/// | BrightonIp | RW | RW | |
#endif
///
/// Note that clients must verify that their device supports a TmzMode before using it. The @ref supportedTmzModes
/// field in DeviceProperties::gpuMemoryProperties advertises which modes are supported using @ref TmzModeSupport.
enum class TmzMode : uint32
{
Disabled = 0, // Resource is not protected.
Hwdrm, // Standard "HWDRM" support plus GfxIp access.
HwdrmPlus, // Standard "HWDRM" support without GfxIp access (yes, "plus" removes functionality).
Count
};

/// Helper flags for storing a device's set of supported TMZ modes in a single bitmask.
enum TmzModeSupport : uint32
{
SupportsTmzModeDisabled = (1u << uint32(TmzMode::Disabled)),
SupportsTmzModeHwdrm = (1u << uint32(TmzMode::Hwdrm)),
SupportsTmzModeHwdrmPlus = (1u << uint32(TmzMode::HwdrmPlus)),
};

/// @mainpage
///
/// Introduction
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