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fe1cdc2
[rocjitsu] Add a temporary CDNA5 architecture alias
amd-eochoalo Aug 12, 2026
1652f3c
[rocjitsu] Use CDNA5 architecture identity in ISA dispatch
amd-eochoalo Aug 12, 2026
d270353
[rocjitsu] Use CDNA5 architecture identity in instruction builders
amd-eochoalo Aug 12, 2026
8e0deae
Use CDNA5 architecture identity in code processing
amd-eochoalo Aug 12, 2026
00d85b8
Use CDNA5 architecture identity in configuration logic
amd-eochoalo Aug 12, 2026
b4b9a7f
[rocjitsu] Use CDNA5 architecture identity in the VM
amd-eochoalo Aug 12, 2026
b1f795a
[rocjitsu] Use CDNA5 architecture identity in analysis
amd-eochoalo Aug 12, 2026
52608ac
[rocjitsu] Use CDNA5 architecture identity in DBT dispatch
amd-eochoalo Aug 12, 2026
5c08f69
[rocjitsu] Use CDNA5 architecture identity in hooks and tools
amd-eochoalo Aug 12, 2026
d560d9d
[rocjitsu] Use CDNA5 architecture identity in liveness tests
amd-eochoalo Aug 12, 2026
1a6f47f
[rocjitsu] Use CDNA5 architecture identity in relocation function tab…
amd-eochoalo Aug 12, 2026
9ad2981
[rocjitsu] Use CDNA5 architecture identity in relocation function tab…
amd-eochoalo Aug 12, 2026
ca800ec
[rocjitsu] Use CDNA5 architecture identity in translation tests.
amd-eochoalo Aug 12, 2026
eb7af31
[rocjitsu] Use CDNA5 architecture identity in decode-execute benchmar…
amd-eochoalo Aug 12, 2026
ee7685c
[rocjitsu] Use CDNA5 architecture identity in decode smoke tests
amd-eochoalo Aug 12, 2026
db6a621
[rocjitsu] Use CDNA5 architecture identity in execution plugin tests
amd-eochoalo Aug 12, 2026
50b1857
[rocjitsu] Use CDNA5 architecture identity in simulator tests.
amd-eochoalo Aug 12, 2026
915bc37
[rocjitsu] Use CDNA5 architecture identity in instruction execution h…
amd-eochoalo Aug 12, 2026
b17ed83
[rocjitsu] Use CDNA5 architecture identity in model-only ISA tests
amd-eochoalo Aug 13, 2026
92b54a0
[rocjitsu] Use CDNA5 architecture identity in pseudo-scalar tests
amd-eochoalo Aug 13, 2026
ad540ef
[rocjitsu] Use CDNA5 architecture identity in scalar SCC tests
amd-eochoalo Aug 13, 2026
d8224b2
Use CDNA5 architecture identity in shared infrastructure tests
amd-eochoalo Aug 13, 2026
39626c8
[rocjitsu] Use CDNA5 architecture identity in VOP3 carry SIMD tests
amd-eochoalo Aug 13, 2026
3459da4
Use CDNA5 architecture identity in WMMA SIMD exact tests
amd-eochoalo Aug 13, 2026
2d46e40
[rocjitsu] Use CDNA5 architecture identity in SMEM SBASE tests
amd-eochoalo Aug 13, 2026
35cdc0c
Use CDNA5 architecture identity in WMMA SIMD benchmark tests
amd-eochoalo Aug 13, 2026
86cb6da
Register CDNA5 as an amdisa profile key
amd-eochoalo Aug 13, 2026
9fb1531
Use the CDNA5 key for multi-ISA generation
amd-eochoalo Aug 13, 2026
4eb3165
[rocjitsu] Use CDNA5 as the logical codegen architecture
amd-eochoalo Aug 13, 2026
a453197
Retire the gfx1250 amdisa profile key
amd-eochoalo Aug 13, 2026
5166aed
[rocjitsu] Finalize the CDNA5 architecture enum
amd-eochoalo Aug 13, 2026
222a2e6
[rocjitsu] Make cdna5 the canonical ISA provider ID
amd-eochoalo Aug 13, 2026
602bce0
[rocjitsu] Name the gfx1250 simulation config for CDNA5
amd-eochoalo Aug 13, 2026
be6c782
[rocjitsu] Rename the gfx1250 ISA profile to CDNA5
amd-eochoalo Aug 13, 2026
ba2c3fe
[rocjitsu] Name the VOPD profile table for CDNA5
amd-eochoalo Aug 13, 2026
7f854d8
[rocjitsu] Name packed codegen helpers for CDNA5
amd-eochoalo Aug 13, 2026
4382a99
[rocjitsu] Name the WMMA profile helper for CDNA5
amd-eochoalo Aug 13, 2026
5d90c04
[rocjitsu] Name scaled WMMA capability detection for CDNA5
amd-eochoalo Aug 13, 2026
42ed507
[rocjitsu] Name WMMA shape inference for CDNA5
amd-eochoalo Aug 13, 2026
c4fd60f
[rocjitsu] Name SWMMAC modifier detection for CDNA5
amd-eochoalo Aug 13, 2026
e6baa3f
[rocjitsu] Name matrix operand sizing for CDNA5
amd-eochoalo Aug 13, 2026
06ff530
[rocjitsu] Name the matrix helper emitter for CDNA5
amd-eochoalo Aug 13, 2026
d2594ff
[rocjitsu] Name the scaled WMMA class emitter for CDNA5
amd-eochoalo Aug 13, 2026
82b9135
[rocjitsu] Name scaled WMMA implementation emission for CDNA5
amd-eochoalo Aug 13, 2026
8f402bb
[rocjitsu] Name scaled WMMA decoder emission for CDNA5
amd-eochoalo Aug 13, 2026
9b38160
[rocjitsu] Use CDNA5 naming for the WMMA shape local
amd-eochoalo Aug 13, 2026
969b0b5
[rocjitsu] Use CDNA5 naming for the SWMMAC modifier local
amd-eochoalo Aug 13, 2026
30ffcda
Before autogen
amd-eochoalo Aug 13, 2026
2fe282d
Autogen
amd-eochoalo Aug 13, 2026
1b3e19a
Before autogen
amd-eochoalo Aug 13, 2026
f0be251
Autogen
amd-eochoalo Aug 13, 2026
ed159e0
Rename matrix_fmt_element_bits
amd-eochoalo Aug 13, 2026
51530fc
Autogen
amd-eochoalo Aug 13, 2026
a6173a7
[rocjitsu] Name matrix_fmt_operand_size_bits for CNDA5
amd-eochoalo Aug 13, 2026
c099f20
Autogen
amd-eochoalo Aug 13, 2026
4c3bc24
[rocjitsu] Name scaled_wmma_is_scale16 for cdna5
amd-eochoalo Aug 13, 2026
7fa79ae
Autogen
amd-eochoalo Aug 13, 2026
4693e94
Name scaled_wmma_is_f4_32x16x128 for cdna5
amd-eochoalo Aug 13, 2026
01b8338
Autogen
amd-eochoalo Aug 13, 2026
4db968b
[rocjitsu] Name scaled_wmma_mnemonic for cdna5
amd-eochoalo Aug 13, 2026
f98c0c5
Autogen
amd-eochoalo Aug 13, 2026
d4b6d4d
[rocjitsu] Name scale_operand_size_bits for cdna5
amd-eochoalo Aug 13, 2026
733d640
Autogen
amd-eochoalo Aug 13, 2026
a8c9bf9
[rocjitsu] Name scaled_wmma_dst_size_bits for cdna5
amd-eochoalo Aug 13, 2026
a598ac8
Autogen
amd-eochoalo Aug 13, 2026
524e81c
[rocjitsu] Name scaled_wmma_src0_size_bits for cdna5
amd-eochoalo Aug 13, 2026
b5302c2
Autogen
amd-eochoalo Aug 13, 2026
e676432
[rocjitsu] name scaled_wmma_src1_size_bits for CDNA5
amd-eochoalo Aug 13, 2026
0128dc4
Autogen
amd-eochoalo Aug 13, 2026
127e7ef
Fix after cherry-picking / rebase
amd-eochoalo Aug 13, 2026
0a1b65c
Fix after rebase
amd-eochoalo Aug 13, 2026
eeee937
Fix tests
amd-eochoalo Aug 13, 2026
cfbe740
Merge branch 'develop' into users/amd-eochoalo/2026-08-13/rename-part-i
amd-eochoalo Aug 13, 2026
96f5e0b
Merge branch 'develop' into eochoa/2026-08-14/merge
amd-eochoalo Aug 14, 2026
3e7a6b4
Merge branch 'develop' into eochoa/2026-08-14/merge-ii
amd-eochoalo Aug 14, 2026
0b86a72
Fix test after merge
amd-eochoalo Aug 14, 2026
57be8fa
Update documentation
amd-eochoalo Aug 19, 2026
a00b9aa
Rename to arch_is_cdna_4_or_lower
amd-eochoalo Aug 19, 2026
fd66986
Preserve enums
amd-eochoalo Aug 19, 2026
98f303e
Updated generator gate for generated_arch_name
amd-eochoalo Aug 19, 2026
a15b6bc
Rename gfx1250_cdna5.json to gfx1250_mi455x
amd-eochoalo Aug 19, 2026
b4c94fd
Merge branch 'develop' into eochoa/2026-08-14/merge-ii
amd-eochoalo Aug 19, 2026
68b561e
Fix identifier on test
amd-eochoalo Aug 19, 2026
810edaa
Rename file in CI
amd-eochoalo Aug 19, 2026
2eef72e
Update references to gfx125_cdna5.json and update agent def
amd-eochoalo Aug 19, 2026
0965659
Update comment
amd-eochoalo Aug 19, 2026
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2 changes: 1 addition & 1 deletion .github/workflows/rocjitsu-corpus-tests.yml
Original file line number Diff line number Diff line change
Expand Up @@ -360,7 +360,7 @@ jobs:
ROCM_PATH="$(rocm-sdk path --root)"
export ROCM_PATH
LAUNCHER="${ROCJITSU_BUILD_DIR}/tools/rocjitsu/rocjitsu"
CONFIG="${ROCJITSU_SOURCE_DIR}/configs/gfx1250.json"
CONFIG="${ROCJITSU_SOURCE_DIR}/configs/gfx1250_mi455x.json"
HOTSWAP="${ROCJITSU_BUILD_DIR}/lib/rocjitsu/src/rocjitsu/hooks/libhsa_hotswap_rocjitsu.so"
test -f "${HOTSWAP}"
# Disable ROCr's built-in mechanism in both legs. Load the branch-built
Expand Down
8 changes: 4 additions & 4 deletions emulation/mirage/builtin/src/agents.rs
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@
//!
//! Each agent mirrors one of the rocjitsu `configs/*.json` files:
//! `MI300X` follows `gfx942_cdna3.json`, `MI350X` follows
//! `gfx950_cdna4.json`, and `MI450X` follows `gfx1250.json`.
//! `gfx950_cdna4.json`, and `MI450X` follows `gfx1250_mi455x.json`.
//! All three share the same `soc -> {vram, iod, xcd -> {l2, cp,
//! se -> cu}}` component tree and six link patterns; they differ
//! only in their device identity, the IOD fan-out, and the per-CU
Expand Down Expand Up @@ -127,12 +127,12 @@ pub fn mi350x() -> AgentDef {
}

/// `MI450X` builtin agent (registry key `MI450X`), mirroring the
/// rocjitsu `gfx1250.json` config: `arch = gfx1250`, an
/// rocjitsu `gfx1250_mi455x.json` config: `arch = cdna5`, an
/// 8-XCD / 4-SE / 8-CU shader fabric and a 2-IOD memory tier.
pub fn mi450x() -> AgentDef {
AgentDef {
vm: VirtualMachineConfig {
arch: "gfx1250".to_string(),
arch: "cdna5".to_string(),
gpu: AmdgpuConfig {
num_xcds: 0,
num_iods: 0,
Expand Down Expand Up @@ -336,7 +336,7 @@ mod tests {
#[test]
fn mi450x_identity() {
let a = mi450x();
assert_eq!(a.vm.arch, "gfx1250");
assert_eq!(a.vm.arch, "cdna5");
assert_eq!(a.vm.gpu.device.marketing_name, "gfx1250");
assert_eq!(a.vm.gpu.device.gfx_target_version, 120500);
assert_eq!(a.topology.links.len(), 6);
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@
"num_threads": 1,
"exec_mode": "functional",
"vm": {
"arch": "gfx1250",
"arch": "cdna5",

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We should rename this file to gfx1250_mi455x.json, following the convention used by the newer rdna3/4 configs.

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"gpu": {
"device": {
"gpu_id": 1250,
Expand Down
16 changes: 9 additions & 7 deletions emulation/rocjitsu/docs/codegen.md
Original file line number Diff line number Diff line change
Expand Up @@ -48,8 +48,9 @@ rocm-systems/shared/machine-readable-isa/isa/
| Cross-ISA legalization tables | `lib/rocjitsu/src/rocjitsu/code/dbt/generated/` | `legalization_codegen.py` |
| Encoding decode/encode functions | `lib/rocjitsu/src/rocjitsu/code/dbt/generated/` | `encoding_translator_codegen.py` |

CDNA5's MR ISA name, logical architecture key, runtime target, ELF identity,
configuration, and public DBT target identity remain `gfx1250`. Its filesystem
CDNA5's logical generator key and configuration architecture are `cdna5`. Its
MR ISA name and filename, concrete GPU/runtime target, ELF identity, and public
DBT target identity intentionally remain `gfx1250`. Its filesystem
directories, generated and hand-written C++ namespace (`rocjitsu::cdna5`), and
internal CMake provider targets use `cdna5`.

Expand Down Expand Up @@ -88,8 +89,9 @@ generated.
## Regenerating everything

The repository helper derives the repository, shared MR ISA, and generated
output directories from its own location. Its argument is the CDNA5 MR ISA XML,
whose concrete GPU filename and logical architecture key remain `gfx1250`.
output directories from its own location. Its argument is the CDNA5 MR ISA XML
with the concrete filename `amdgpu_isa_gfx1250.xml`; the logical generator key
used by the command is `cdna5`.
Activate a Python virtual environment containing the generator dependencies and
`pre-commit`, then run this command from the `rocm-systems` repository root:

Expand Down Expand Up @@ -122,7 +124,7 @@ python -m amdisa \
rdna3:$MRISA/amdgpu_isa_rdna3.xml \
rdna3_5:$MRISA/amdgpu_isa_rdna3_5.xml \
rdna4:$MRISA/amdgpu_isa_rdna4.xml \
gfx1250:$CDNA5_MRISA/amdgpu_isa_gfx1250.xml \
cdna5:$CDNA5_MRISA/amdgpu_isa_gfx1250.xml \
--isa-output lib/rocjitsu/src/rocjitsu/isa/arch/amdgpu/generated \
--dbt-output lib/rocjitsu/src/rocjitsu/code/dbt/generated

Expand All @@ -144,7 +146,7 @@ python -m amdisa \
rdna3:$MRISA/amdgpu_isa_rdna3.xml \
rdna3_5:$MRISA/amdgpu_isa_rdna3_5.xml \
rdna4:$MRISA/amdgpu_isa_rdna4.xml \
gfx1250:$CDNA5_MRISA/amdgpu_isa_gfx1250.xml \
cdna5:$CDNA5_MRISA/amdgpu_isa_gfx1250.xml \
--gen-isas \
--isa-output lib/rocjitsu/src/rocjitsu/isa/arch/amdgpu/generated

Expand All @@ -166,7 +168,7 @@ python -m amdisa \
rdna3:$MRISA/amdgpu_isa_rdna3.xml \
rdna3_5:$MRISA/amdgpu_isa_rdna3_5.xml \
rdna4:$MRISA/amdgpu_isa_rdna4.xml \
gfx1250:$CDNA5_MRISA/amdgpu_isa_gfx1250.xml \
cdna5:$CDNA5_MRISA/amdgpu_isa_gfx1250.xml \
--gen-dbt \
--dbt-output lib/rocjitsu/src/rocjitsu/code/dbt/generated

Expand Down
2 changes: 1 addition & 1 deletion emulation/rocjitsu/docs/configuration.md
Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,7 @@ Pre-built simulator configs are in `configs/`:
| `gfx950_cdna4.json` | Single CDNA4 GPU (standalone simulation) |
| `gfx950_cdna4_kmd.json` | Single CDNA4 GPU (daemon/KFD mode) |
| `gfx950_cdna4_kmd_2gpu.json` | Two CDNA4 GPUs (multi-GPU daemon mode) |
| `gfx1250.json` | Single gfx1250 GPU (standalone simulation, no KMD) |
| `gfx1250_mi455x.json` | Single CDNA5 GPU (standalone simulation, no KMD) |
| `gfx1100_w7900.json` | Single RDNA3 GPU (standalone simulation) |
| `gfx1151.json` | Single RDNA3.5 GPU (standalone simulation) |
| `gfx1201_r9700.json` | Single RDNA4 GPU (standalone simulation) |
Expand Down
4 changes: 2 additions & 2 deletions emulation/rocjitsu/lib/python/amdisa/__init__.py
Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,7 @@
Cdna2Profile,
CdnaProfile,
EncodingModifier,
Gfx1250Profile,
Cdna5Profile,
IsaProfile,
MemoryCoherencyModel,
MnemonicRule,
Expand Down Expand Up @@ -47,7 +47,7 @@
'CodeGenerator',
'CppFile',
'EncodingModifier',
'Gfx1250Profile',
'Cdna5Profile',
'InstEncoding',
'Instruction',
'IsaProfile',
Expand Down
6 changes: 3 additions & 3 deletions emulation/rocjitsu/lib/python/amdisa/__main__.py
Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,7 @@
CdnaProfile,
CodegenConfig,
CodeGenerator,
Gfx1250Profile,
Cdna5Profile,
Parser,
Rdna1Profile,
Rdna2Profile,
Expand Down Expand Up @@ -51,7 +51,7 @@
'rdna3': Rdna3Profile,
'rdna3.5': Rdna3_5Profile,
'rdna4': Rdna4Profile,
'gfx1250': Gfx1250Profile,
'cdna5': Cdna5Profile,
}


Expand Down Expand Up @@ -118,7 +118,7 @@ def _detect_profile(isa_xml: str) -> str:
# TODO: Remove this filename override once the gfx1250 XML carries a
# finalized architecture name that can be detected through the normal path.
if 'gfx1250' in Path(isa_xml).stem:
return 'gfx1250'
return 'cdna5'

root = elem_tree.parse(isa_xml).getroot()
isa_node = xs.get_node(root, xs.ISA)
Expand Down
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