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Add approved SQ/GL1C/GRBM/TA/TCP counters for gfx1150-1153 - #10041

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users/vipangul/AIESW-38547-approved-gfx115-pmc
Aug 24, 2026
Merged

vipangul merged 5 commits into
developfrom
users/vipangul/AIESW-38547-approved-gfx115-pmc

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@vipangul vipangul commented Aug 12, 2026 •

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Summary

JIRA ID: AIESW-38547

Approval via -
DEGFX11-14512
DEGFX11-14513
DEGFX11-14514

Add approved gfx11.5 (RDNA 3.5) performance counters in config.yaml for gfx1150-1153:

  • 10 SQ (VALU/VMEM stall, wait, bus) + 4 GL1C (read-size, arb level)
  • 1 GRBM (TCP_BUSY) + 11 TA (addresser/aligner/write-path/flat/store/vmem)
  • TCP_TA_REQ (new) + gfx11.5 definition added to TCP_PENDING_STALL_CYCLES

Validation (gfx1151)

  • All event IDs cross-checked against the gfx11.5 RDL (23/23 exact where the
    RDL is explicit; GL1C/GRBM corroborated via soc21 + hardware).
  • Collected via rocprofv3 on synthetic HIP kernels and a real vLLM
    (Qwen2.5-0.5B AWQ) inference run. Quantitative check: GL1C_REQ_READ_128B
    measured 4,000,016 vs 4,000,000 expected.
  • TCP events pinned empirically (TA_REQ=2, GL1_PENDING_STALL=54); soc21_enum.h
    is off-by-one from the RDL/HW in the TCP high region.

Notes

  • gfx1151 limitation: only one TCP-block counter can be collected per pass.

AIESW-38547: add approved SQ/GL1C/GRBM/TA/TCP counters for gfx1150-1153, validated on gfx1151 hardware.

- 10 SQ + 4 GL1C occupancy/stall/request counters
- 1 GRBM + 11 TA texture-addresser counters
- TCP_TA_REQ (new) and TCP_PENDING_STALL_CYCLES (gfx11.5 definition)

Event IDs verified against the gfx11.5 RDL; TCP events pinned on
hardware because soc21_enum.h is off-by-one from RDL/HW in the TCP
high region.

Signed-off-by: Vinod Pangul <146476973+vipangul@users.noreply.github.com>
@therock-pr-bot

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Wrap long description lines for the added gfx11.5 PMCs to satisfy the
rocprofiler-sdk config_yaml formatting CI check
(source/scripts/format-deps.py --counter-config).

Co-authored-by: Cursor <cursoragent@cursor.com>
@vipangul vipangul changed the title Add newly approved SQ/GL1C/GRBM/TA/TCP counters for gfx1150-1153 Add approved SQ/GL1C/GRBM/TA/TCP counters for gfx1150-1153 Aug 12, 2026

@ApoKalipse-V ApoKalipse-V left a comment

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I have a single concern.
@Sushma1203 can you take a look on it?

Removed redundant GRBM_TCP_BUSY
normalized Perf_Windowing wording

Signed-off-by: Vinod Pangul <146476973+vipangul@users.noreply.github.com>
@vipangul
vipangul requested a review from Sushma1203 August 20, 2026 23:56
Signed-off-by: Vinod Pangul <146476973+vipangul@users.noreply.github.com>
@vipangul
vipangul merged commit 60ca803 into develop Aug 24, 2026
188 of 193 checks passed
@vipangul
vipangul deleted the users/vipangul/AIESW-38547-approved-gfx115-pmc branch August 24, 2026 20:20
cmcknigh pushed a commit that referenced this pull request Aug 25, 2026
## Summary
JIRA ID: AIESW-38547 

Approval via - 
DEGFX11-14512
DEGFX11-14513
DEGFX11-14514

Add approved gfx11.5 (RDNA 3.5) performance counters in `config.yaml`
for gfx1150-1153:
- 10 SQ (VALU/VMEM stall, wait, bus) + 4 GL1C (read-size, arb level)
- 1 GRBM (TCP_BUSY) + 11 TA
(addresser/aligner/write-path/flat/store/vmem)
- TCP_TA_REQ (new) + gfx11.5 definition added to
TCP_PENDING_STALL_CYCLES

## Validation (gfx1151)
- All event IDs cross-checked against the gfx11.5 RDL (23/23 exact where
the
  RDL is explicit; GL1C/GRBM corroborated via soc21 + hardware).
- Collected via rocprofv3 on synthetic HIP kernels and a real vLLM
(Qwen2.5-0.5B AWQ) inference run. Quantitative check: GL1C_REQ_READ_128B
  measured 4,000,016 vs 4,000,000 expected.
- TCP events pinned empirically (TA_REQ=2, GL1_PENDING_STALL=54);
soc21_enum.h
  is off-by-one from the RDL/HW in the TCP high region.

## Notes
- gfx1151 limitation: only one TCP-block counter can be collected per
pass.

---------

Signed-off-by: Vinod Pangul <146476973+vipangul@users.noreply.github.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
ajanicijamd pushed a commit that referenced this pull request Aug 25, 2026
## Summary
JIRA ID: AIESW-38547 

Approval via - 
DEGFX11-14512
DEGFX11-14513
DEGFX11-14514

Add approved gfx11.5 (RDNA 3.5) performance counters in `config.yaml`
for gfx1150-1153:
- 10 SQ (VALU/VMEM stall, wait, bus) + 4 GL1C (read-size, arb level)
- 1 GRBM (TCP_BUSY) + 11 TA
(addresser/aligner/write-path/flat/store/vmem)
- TCP_TA_REQ (new) + gfx11.5 definition added to
TCP_PENDING_STALL_CYCLES

## Validation (gfx1151)
- All event IDs cross-checked against the gfx11.5 RDL (23/23 exact where
the
  RDL is explicit; GL1C/GRBM corroborated via soc21 + hardware).
- Collected via rocprofv3 on synthetic HIP kernels and a real vLLM
(Qwen2.5-0.5B AWQ) inference run. Quantitative check: GL1C_REQ_READ_128B
  measured 4,000,016 vs 4,000,000 expected.
- TCP events pinned empirically (TA_REQ=2, GL1_PENDING_STALL=54);
soc21_enum.h
  is off-by-one from the RDL/HW in the TCP high region.

## Notes
- gfx1151 limitation: only one TCP-block counter can be collected per
pass.

---------

Signed-off-by: Vinod Pangul <146476973+vipangul@users.noreply.github.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
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3 participants