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Fix bad merge: restore UseF32XEmulation in forceLrvwTile1 for B tensor #5143

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Merged
talumbau merged 1 commit into from
Mar 5, 2026
Merged

Fix bad merge: restore UseF32XEmulation in forceLrvwTile1 for B tensor #5143

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9 changes: 5 additions & 4 deletions projects/hipblaslt/tensilelite/Tensile/KernelWriter.py
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Original file line number Diff line number Diff line change
Expand Up @@ -4774,9 +4774,9 @@ def _initKernel(self, kernel, tensorParametersA, tensorParametersB):
# Enabled lrvwTile>1 for UseF32XEmulation except for UseCustomMainLoopSchedule (TODO: enable for CMS)
# TODO: implement extra logic to swap vgprs after local read to suport lrvwTile > 1 for umBytes >= 4 + MIInputPerThread > 1
# (except for UseF32XEmulation)
forceLrvwTile1 = kernel["ProblemType"]["MacDataTypeA"].numBytes() >= 4 and \
forceLrvwTile1A = kernel["ProblemType"]["MacDataTypeA"].numBytes() >= 4 and \
(kernel["EnableMatrixInstruction"] and kernel["MIInputPerThread"] > 1 and (not kernel["UseF32XEmulation"]))
if not kernel["UnrollMajorLDSA"] and not forceLrvwTile1:
if not kernel["UnrollMajorLDSA"] and not forceLrvwTile1A:
self.states.lrvwTileA = kernel["VectorWidthA"]
if kernel["ProblemType"]["MXBlockA"]:
self.states.lrvwTileMXSA = kernel["VectorWidthA"]
Expand All @@ -4785,8 +4785,9 @@ def _initKernel(self, kernel, tensorParametersA, tensorParametersB):
if kernel["ProblemType"]["MXBlockA"]:
self.states.lrvwTileMXSA = 1

forceLrvwTile1 = kernel["ProblemType"]["MacDataTypeB"].numBytes() >= 4 and (kernel["EnableMatrixInstruction"] and kernel["MIInputPerThread"] > 1)
if not kernel["UnrollMajorLDSB"] and not forceLrvwTile1:
forceLrvwTile1B = kernel["ProblemType"]["MacDataTypeB"].numBytes() >= 4 and \
(kernel["EnableMatrixInstruction"] and kernel["MIInputPerThread"] > 1 and (not kernel["UseF32XEmulation"]))
if not kernel["UnrollMajorLDSB"] and not forceLrvwTile1B:
self.states.lrvwTileB = kernel["VectorWidthB"]
if kernel["ProblemType"]["MXBlockB"]:
self.states.lrvwTileMXSB = kernel["VectorWidthB"]
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