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feat(hip-kernel-provider): port the rocKE unified-attention mask band and split-KV LSE to C++ - #14759

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users/khuagarw/rocke/aick-2712-cpp-parity-9-mask-band-lse
Oct 30, 2026
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@amd-khushbu amd-khushbu commented Oct 30, 2026 •

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JIRA ID : AICK-2712

Summary

This is PR 9, the last of a stack of 9 that brings the rocKE C++ unified-attention engine to parity with Python (see the stack below). It sits on PR 8.

It ports the two remaining features Python has and C++ did not: the top-left / right-bound mask band on gfx950 (tiled 2D and 3D), and the optional split-KV LSE output on both arches (develop's #13955). Both were rejected by the C++ gates as "not ported"; those rejects are removed, so C++ now admits and builds the same problems as Python. PR 7's emit_lse stopgap is replaced.

Changes

All paths are under dnn-providers/hip-kernel-provider/rocke/.

  • Split-KV LSE output (gfx942 and gfx950).
    • The reduce spec gains emit_lse (default off): "lse" kernel-name suffix, a trailing lse_ptr param, and a lane-0 FP32 natural-log LSE store after the output pass.
    • New C twin of _lse_store (lse_store / natural_lse_from_log2_stats), shared by both reduce builders.
    • The C problem gains emit_lse; the tiled 2D and 3D gates run Python's _reject_lse first, with its exact messages (2D path, non-split-KV arch, sinks).
    • The problem bindings read emit_lse instead of refusing it (PR 7's stopgap).
  • Mask band on gfx950 tiled 2D.
    • The shared tiled-2D spec gains causal_top_left and right_bound (defaults off / 0); the validator raises Python's errors with the same text; the kernel name gains the tl / rbu / rb<R> tokens.
    • Body: top-left pins context_len to 0; the right bound feeds max_seq_prefix_len, the sliding-window tile range and the per-element mask on the transposed 32x32, MFMA 32x32 and 16x16 paths, the transposed mask-limit path (valid_tail), and the D256 mask-phase-split peel.
  • Mask band on gfx950 tiled 3D (split-KV segment kernel): same fields, validation, name tokens and body changes. The reduce kernel is mask-agnostic.
  • Routing. Spec-from-problem copies the band fields (2D before the D256 fast-route override, as Python does); the 2D and 3D gates drop their "masks are not ported to C++ yet" rejects; the problem hooks, the scalar binding (the scalar C++ builder already had the band) and the spec dicts carry both fields.
  • gfx942 is unchanged. Python's gfx942 specs have no band fields and its gate rejects non-default masks; C++ keeps the gate reject, and its gfx942 validators reject a hand-built spec with a band (C++-only message, since Python cannot express one).
  • Cleanup: the unused gfx950 tiled-2D ctx prologue copy (rocke_gfx950_attn2d_build_ctx_init) is removed; the public entry builds through its own init, and the copy had fallen behind it.
  • known_gaps.md drops the LSE section.

Stack

  1. feat(hip-kernel-provider): bring the rocKE C++ unified-attention engine to parity with Python #14522 Stopgaps: stop C++ silently misbuilding specs
  2. feat(hip-kernel-provider): port rocKE unified-attention selectors, routing and support gates to C++ #14523 Selectors, routing and support gates
  3. feat(hip-kernel-provider): assemble rocKE unified-attention specs from a problem in C++ and run selector parity in CTest #14524 Spec from problem (gfx942 2D, 3D), scalar fallback, selector parity in CTest
  4. feat(hip-kernel-provider): port the rocKE gfx950 tiled-2D V double-buffer, D256 fast path and softmax interleave to C++ #14525 gfx950 tiled 2D: V double-buffer, D256 fast path, softmax interleave
  5. feat(hip-kernel-provider): port the rocKE gfx942 tiled-2D mask-limit, sliced-K ring, phase split and HBM-direct K/V to C++ #14526 gfx942 tiled 2D: mask-limit, sliced-K ring, phase split, HBM-direct K/V
  6. feat(hip-kernel-provider): port the rocKE gfx942 4-warp GQA attention builder to C++ #14527 gfx942 4-warp GQA builder
  7. fix(hip-kernel-provider): rocKE unified-attention C++ parity follow-ups #14528 Follow-ups: gfx942 3D i64 gate, reject messages, emit_lse, CTest labels
  8. feat(hip-kernel-provider): close the remaining rocKE unified-attention C++ builder gaps #14758 i64 sliced-K ring, shared arch gate, 3D kv_layout, LDS resolver, gfx950 Q re-read and depth-3 ring, parity coverage
  9. feat(hip-kernel-provider): port the rocKE unified-attention mask band and split-KV LSE to C++ #14759 Mask band (top-left / right-bound) and split-KV LSE ← this PR

Each PR is based on the one before it. Review from 1 upward; each diff shows only its own slice.

Test plan

  • New parity configs: gfx950 tiled 2D 76-85 (band on every mask path, incl. mask-limit and the D256 fast path), gfx950 tiled 3D 21-23 (band, with sinks and fp8 K/V), and two emit_lse configs per arch in the tiled 3D families; golden entries blessed for those only, no existing entry moved
  • attention_unified_routing_test.cpp: the gfx950 2D and 3D gates admit top-left and rb5 problems
  • test_attention_routing_cpp_parity.py: LSE problems (with sinks, a non-default mask, fp8) in the gate grid, on every arch
  • Selector parity matrix: four band problems, including a D256 bf16 prefill with right_bound=-1
  • Binding tests: band round-trip, gfx950 validator messages, gfx942 reject; a scalar top-left rb5 problem lowers byte-identical to Python
  • CTest, pybind build: 39/39
  • Byte-identity gate GREEN at llvm20, llvm22, llvm23 and llvm24
  • Golden check (ll ×4 + ir canonical): no unblessed change, nothing missing
  • pre-commit's black (25.12.0) and clang-format (18) hooks, run by hand on every file this PR changes: clean (pre-commit itself is not installed locally)
  • Not run on a GPU: the LSE reduce and the band emit the same bytes as Python's, which the Python numeric tests cover (feat(rocke): optional LSE output on unified split-KV attention #13955 for LSE)

🤖 Generated with Claude Code

… and split-KV LSE to C++

JIRA ID : AICK-2712

## Summary

This is PR 9, the last of a stack of 9 that brings the rocKE C++ unified-attention engine to parity with Python (see the stack below). It sits on PR 8.

It ports the two remaining features Python has and C++ did not: the top-left / right-bound mask band on gfx950 (tiled 2D and 3D), and the optional split-KV LSE output on both arches (develop's #13955). Both were rejected by the C++ gates as "not ported"; those rejects are removed, so C++ now admits and builds the same problems as Python. PR 7's `emit_lse` stopgap is replaced.

## Changes

All paths are under `dnn-providers/hip-kernel-provider/rocke/`.

- **Split-KV LSE output (gfx942 and gfx950).**
  - The reduce spec gains `emit_lse` (default off): "lse" kernel-name suffix, a trailing `lse_ptr` param, and a lane-0 FP32 natural-log LSE store after the output pass.
  - New C twin of `_lse_store` (`lse_store` / `natural_lse_from_log2_stats`), shared by both reduce builders.
  - The C problem gains `emit_lse`; the tiled 2D and 3D gates run Python's `_reject_lse` first, with its exact messages (2D path, non-split-KV arch, sinks).
  - The problem bindings read `emit_lse` instead of refusing it (PR 7's stopgap).
- **Mask band on gfx950 tiled 2D.**
  - The shared tiled-2D spec gains `causal_top_left` and `right_bound` (defaults off / 0); the validator raises Python's errors with the same text; the kernel name gains the `tl` / `rbu` / `rb<R>` tokens.
  - Body: top-left pins `context_len` to 0; the right bound feeds `max_seq_prefix_len`, the sliding-window tile range and the per-element mask on the transposed 32x32, MFMA 32x32 and 16x16 paths, the transposed mask-limit path (`valid_tail`), and the D256 mask-phase-split peel.
- **Mask band on gfx950 tiled 3D** (split-KV segment kernel): same fields, validation, name tokens and body changes. The reduce kernel is mask-agnostic.
- **Routing.** Spec-from-problem copies the band fields (2D before the D256 fast-route override, as Python does); the 2D and 3D gates drop their "masks are not ported to C++ yet" rejects; the problem hooks, the scalar binding (the scalar C++ builder already had the band) and the spec dicts carry both fields.
- **gfx942 is unchanged.** Python's gfx942 specs have no band fields and its gate rejects non-default masks; C++ keeps the gate reject, and its gfx942 validators reject a hand-built spec with a band (C++-only message, since Python cannot express one).
- **Cleanup:** the unused gfx950 tiled-2D ctx prologue copy (`rocke_gfx950_attn2d_build_ctx_init`) is removed; the public entry builds through its own init, and the copy had fallen behind it.
- `known_gaps.md` drops the LSE section.

## Test plan

- [x] New parity configs: gfx950 tiled 2D 76-85 (band on every mask path, incl. mask-limit and the D256 fast path), gfx950 tiled 3D 21-23 (band, with sinks and fp8 K/V), and two `emit_lse` configs per arch in the tiled 3D families; golden entries blessed for those only, no existing entry moved
- [x] `attention_unified_routing_test.cpp`: the gfx950 2D and 3D gates admit top-left and rb5 problems
- [x] `test_attention_routing_cpp_parity.py`: LSE problems (with sinks, a non-default mask, fp8) in the gate grid, on every arch
- [x] Selector parity matrix: four band problems, including a D256 bf16 prefill with `right_bound=-1`
- [x] Binding tests: band round-trip, gfx950 validator messages, gfx942 reject; a scalar top-left rb5 problem lowers byte-identical to Python
- [x] CTest, pybind build: 39/39
- [x] Byte-identity gate GREEN at llvm20, llvm22, llvm23 and llvm24
- [x] Golden check (ll ×4 + ir canonical): no unblessed change, nothing missing
- [x] pre-commit's black (25.12.0) and clang-format (18) hooks, run by hand on every file this PR changes: clean (pre-commit itself is not installed locally)
- [ ] Not run on a GPU: the LSE reduce and the band emit the same bytes as Python's, which the Python numeric tests cover (#13955 for LSE)

Co-Authored-By: Claude <noreply@anthropic.com>
@amd-khushbu
amd-khushbu requested review from a team as code owners October 30, 2026 15:47
@github-actions github-actions Bot added documentation project: hip-kernel-provider rocke-lib: attention Touches rocKE library attention/FMHA kernels rocke: platform Touches rocKE platform labels Oct 30, 2026
Base automatically changed from users/khuagarw/rocke/aick-2712-cpp-parity-8-i64-ring to users/khuagarw/rocke/aick-2712-cpp-parity-1-stopgaps October 30, 2026 16:39
@amd-khushbu
amd-khushbu merged commit 8032a6f into users/khuagarw/rocke/aick-2712-cpp-parity-1-stopgaps Oct 30, 2026
74 of 82 checks passed
@amd-khushbu
amd-khushbu deleted the users/khuagarw/rocke/aick-2712-cpp-parity-9-mask-band-lse branch October 30, 2026 16:39
@amd-khushbu

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This stack is now combined into one PR, #14522, so it can be reviewed and merged as one change. GitHub shows this PR as merged because its commit is now on #14522's branch; nothing has gone into develop. This PR's change is one commit there, unchanged. Open review comments from here are listed in #14522's description and will be answered there.

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