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perf(hipblaslt): retune DGEMM TN 8K square grid-point on MI300x. - #14348

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users/sbae/retune_DGEMM_TN_8K_gfx942
Oct 26, 2026
Merged

mpanoop merged 1 commit into
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users/sbae/retune_DGEMM_TN_8K_gfx942

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@shbae

@shbae shbae commented Oct 24, 2026 •

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JIRA ID: https://amd-hub.atlassian.net/browse/ROCM-33102

Motivation

After setting hipBLASLt backend as the default backend of the rocBLAS for DGEMM on MI300x, performance regression is reported with ROCm10.2 release with DGEMM, TN, 8192 x 8192 x 8192 problem compared to the Tensile backend runs. The purpose of this PR is to fix the regression.

Technical Details

I've reproduced the issue locally on an MI300x machine, and retuned the originally assigned grid-point for the regressed problem size. I've retuned the grid-point by using --algo_method all tuning method, and confirmed that the performances of both [8192, 8192, 1, 8192] and [8192, 8192, 1, 1024] (grid-point) problem sizes are improved by the newly assigned local SolutionIndex of the GridBased lib-logic yaml file.

Test Result

The performance of M=8192, N=8192, K=8192 is measured through rocblas-bench with Tensile and hipBLASLt backend, which is shown below table:

backend TENSILE (TFLOPs) HIPBLASLT (TFLOPs) speedup
10.2 76.2 70.1 0.92x
this PR (retune [8192, 8192, 1, 1024] grid-point) 79.3 1.04x

I've also checked functional correctness locally, and all f64 & TN related hipblaslt tests PASSED:

[----------] 1658 tests from _/matmul_test (53765 ms total)

[----------] Global test environment tear-down
[==========] 1658 tests from 1 test suite ran. (53788 ms total)
[  PASSED  ] 1658 tests.
hipBLASLt version: 100500
hipBLASLt git version: 96668fc1582-dirty
command line: ./build/release/clients/hipblaslt-test --gtest_filter=*f64_r*TN*

Submission Checklist

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@shbae
shbae requested a review from nakajee October 24, 2026 00:21
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Codecov Report

✅ All modified and coverable lines are covered by tests.

Additional details and impacted files
@@           Coverage Diff            @@
##           develop   #14348   +/-   ##
========================================
  Coverage    75.87%   75.87%           
========================================
  Files         2883     2883           
  Lines       480529   480529           
  Branches     72254    72254           
========================================
  Hits        364589   364589           
  Misses       90897    90897           
  Partials     25043    25043           
Flag Coverage Δ *Carryforward flag
TensileLite-CPP 48.93% <ø> (ø) Carriedforward from 96668fc
TensileLite-Unit 83.68% <ø> (ø) Carriedforward from 96668fc
hipBLAS 90.62% <ø> (ø) Carriedforward from 96668fc
hipBLASLt 65.95% <ø> (ø)
hipCUB 82.68% <ø> (ø) Carriedforward from 96668fc
hipDNN 86.85% <ø> (ø) Carriedforward from 96668fc
hipFFT 42.56% <ø> (ø) Carriedforward from 96668fc
hipRAND 76.12% <ø> (ø) Carriedforward from 96668fc
hipSOLVER 69.67% <ø> (ø) Carriedforward from 96668fc
hipSPARSE 86.99% <ø> (ø) Carriedforward from 96668fc
rocBLAS 68.72% <ø> (ø) Carriedforward from 96668fc
rocFFT 45.68% <ø> (ø) Carriedforward from 96668fc
rocRAND 57.31% <ø> (ø) Carriedforward from 96668fc
rocSOLVER 76.74% <ø> (ø) Carriedforward from 96668fc
rocSPARSE 77.16% <ø> (ø) Carriedforward from 96668fc
rocThrust 93.15% <ø> (ø) Carriedforward from 96668fc

*This pull request uses carry forward flags. Click here to find out more.

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@pkamd
pkamd requested review from babakpst and pkamd October 26, 2026 15:11
@mpanoop
mpanoop merged commit b4fb42b into develop Oct 26, 2026
141 of 153 checks passed
@mpanoop
mpanoop deleted the users/sbae/retune_DGEMM_TN_8K_gfx942 branch October 26, 2026 16:54
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TheRock Submodule Bump Activity

Newest first

NaveenElumalaiAMD added a commit that referenced this pull request Nov 3, 2026
rocHPL shows a DGEMM performance regression on MI325X on this branch.
f64 on gfx942 currently routes to hipBLASLt on every device, so MI325X
resolves against the generic gfx942 fp64 GridBased tables, which were
tuned on MI300X.

Narrow the fp64 default back to the 228-CU MI300A, restoring the gate
introduced by PR #12724 and later widened to all gfx942 by PR #13292.
fp16/bf16 keep their existing 304-CU gate; f32, int8 and both complex
types keep the Tensile default on gfx942 (the trailing else preserves
the behaviour the previous `!is_same<Ti, double>` arm provided).

Effect, verified instantiation-by-instantiation over the seven types
this template is instantiated with (half, bfloat16, float, double,
float_complex, double_complex, int8_t):

  MI300A      228 CU -> hipBLASLt   (unchanged)
  MI300X      304 CU -> Tensile     (changed)
  MI325X      304 CU -> Tensile     (changed)
  partitioned other  -> Tensile     (changed)
  all other types / arches          (unchanged)

Note the change is not limited to the 304-CU parts: any partitioned
gfx942 (CPX/DPX/TPX) reports its partition's CU count and therefore
also moves to Tensile. Those configurations ship no fp64 logic of their
own and were previously falling back on the 304-CU tuning.

This reverts the fp64 default on MI300X, where PR #13134 and PR #14348
measured hipBLASLt wins. Reviewers should weigh that trade-off; MI300X
users can restore the previous behaviour with ROCBLAS_USE_HIPBLASLT=1,
which bypasses this gate entirely.

useHipBLASLt() also gates getAllSolutions(), so rocblas_gemm_ex_get_
solutions() now reports Tensile solution indices for fp64 on the
affected devices. Query and dispatch stay consistent, but cached
solution indices will not carry over.
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4 participants