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[hipDNN][FlyDSL] ci: build the hipDNN superbuild with FlyDSL enabled - #13888

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[hipDNN][FlyDSL] ci: build the hipDNN superbuild with FlyDSL enabled#13888
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@BradPepersAMD BradPepersAMD commented Oct 17, 2026

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Stack: #13712 (pipeline + RMSNorm) → this PR (superbuild CI flag) → #13713 (RDNA SDPA) → #13714 (CDNA SDPA). Merge after #13712.

Summary

Turns HIPKERNELPROVIDER_ENABLE_FLYDSL on in both configure steps of the hipDNN superbuild CI (.github/workflows/hipdnn-superbuild-ci.yml), so every hipDNN change builds, packs and tests the FlyDSL engines. The option itself stays OFF by default in rocm-libraries; this only changes what CI builds.

Split out of #13712 on purpose: any edit under .github/workflows/ makes the multi-arch CI's project selector run every project's tests (Unclassified non-skippable change(s) ['.github/workflows/hipdnn-superbuild-ci.yml'] - running all tests). Keeping it in its own PR lets the FlyDSL PRs be judged on the projects they touch, and isolates the run-all here.

What it exercises

Lane Effect
Windows superbuild (gfx1151) FlyDSL active: engines built, gen_descriptors --check before the pack, product pack, check_shards.py after it, FlyDSL census, unit tests.
Linux superbuild (gfx942) No effect yet: this lane packs the descriptor-packaging fixture tree (HIPKERNELPROVIDER_PRODUCTION_SOURCE_ROOT=…/examples/descriptors), so FlyDSL reports dormant. CDNA coverage is a follow-up (below).

Expected unrelated failures

Because this PR triggers run-all, the multi-arch CI runs projects these changes do not touch. On the FlyDSL stack these failed on every attempt, on Windows gfx110X only, and are not selected by any other recent run of this workflow (no baseline): rocFFT quick suite (600 s timeout), rocSPARSE quick suite (300 s timeout); intermittently rocRAND (timeout) and rocprofiler-sdk (Linux gfx94X, a different test each time). Evidence will be attached here if they recur.

Follow-up: FlyDSL on CDNA in CI

The CDNA engines (#13714) are compiled and validated locally and on MI210/MI300X/MI355X, but no CI lane runs them yet. Options under discussion: a TheRock feature flag (HIPKERNELPROVIDER_ENABLE_FLYDSL, beside HIPKERNELPROVIDER_ENABLE_ROCKE in TheRock's FLAGS.cmake) plus the kernel ingestor flag in .github/scripts/therock_matrix.py, which would run the FlyDSL GPU suites on gfx94X, gfx950 and gfx110X; and/or a production-root superbuild lane on a CDNA target.

🤖 Generated with Claude Code

@BradPepersAMD @claude
ci(hipdnn): build the superbuild CI with FlyDSL enabled
e0017fd 
Turns HIPKERNELPROVIDER_ENABLE_FLYDSL on in both superbuild configure steps. The option
stays OFF by default in rocm-libraries; the superbuild CI exercises it so the FlyDSL
engines are built, packed and tested on every hipDNN change. On the Linux gfx942 job it
reports dormant until objects for that arch are checked in; on the Windows gfx1151 job it
packs and tests the RMSNorm engine.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
This was referenced Oct 17, 2026
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@BradPepersAMD

BradPepersAMD commented Oct 17, 2026

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Superseded: FlyDSL is now ON by default in the hip-kernel-provider whenever the kernel ingestor is on (like the ASM SDPA and ML-ops engines; off with -DHIPKERNELPROVIDER_ENABLE_FLYDSL=OFF), see #13712. The hipDNN superbuild CI already enables the ingestor, so it builds and tests FlyDSL without any workflow change. Closing this PR.

BradPepersAMD added a commit that referenced this pull request Oct 21, 2026
@BradPepersAMD @claude
feat(hip-kernel-provider): FlyDSL kernels for the kernel ingestor: RM…
d7f1dec 
…SNorm forward/backward, SDPA forward (RDNA, CDNA)

Adds FlyDSL as a second kernel source for the kernel ingestor, beside rocKE:
ahead-of-time compiled code objects with generated descriptors, packed into each
architecture's kpack shard by the provider's shared packer. Neither the build
nor the runtime needs FlyDSL or a kernel compiler.

Engines (each with graph match, kernel match, score and dispatch symbols):
- hipkernel:flydsl_rmsnorm: RMSNorm forward, inference and training (inv_rms);
  bf16/f16/f32 and an f32 scale beside 16-bit data; epsilon as a kernel
  argument; baked widths chosen by measurement plus a runtime-N tier.
- hipkernel:flydsl_rmsnorm_bwd: dx and dgamma from FlyDSL's deterministic
  two-stage kernel (partial + reduce in one object; dgamma bitwise
  reproducible); baked widths and bounded runtime-N tiers.
- hipkernel:flydsl_sdpa_rdna, _rdna_decode, _aiw: SDPA forward for
  gfx11-generic and gfx12-generic (AITER's RDNA kernel ported to gfx11 WMMA,
  split-KV decode with merge, AOTriton's gfx1201 kernel).
- hipkernel:flydsl_sdpa_cdna, _cdna_decode, _cdna_dualwave: SDPA forward for
  gfx90a, gfx942 and gfx950 from FlyDSL's MFMA kernels.

Targets gfx11-generic, gfx12-generic, gfx90a, gfx942 and gfx950; 1,453 objects.
The objects, their manifests and KDPs are stored with DVC on the repository's
existing remote: git holds one FlyDSL/<op>/<target>.dvc sidecar per directory.
With FlyDSL on and a directory not pulled, configure fails with the dvc pull
command. The Windows hipDNN superbuild lane pulls them before configure.

Gated by HIPKERNELPROVIDER_ENABLE_FLYDSL (ON) under HIPDNN_ENABLE_KERNEL_INGESTOR
(OFF by default), so a default build is unchanged. gen_descriptors.py --check
(before the pack) and tools/check_shards.py (after) verify every object's SHA256,
target and input digest; regeneration is byte-reproducible with the pinned
toolchain (flydsl/REGEN.md). Vendored sources keep their upstream notices;
flydsl/THIRD_PARTY_LICENSES.md carries the FlyDSL/AITER (Apache-2.0) and
AOTriton (MIT) texts. Rules and gaps: flydsl/COVERAGE.md.

Also: KernelCompileOptions gains an arch-only constructor; TestContainer's
engine buffer bound rises from 8 to 32.

Folds in what was reviewed as #13712, #13713 and #13714; supersedes #13157
and #13888.

JIRA ID: ALMIOPEN-2953
JIRA ID: ALMIOPEN-2954
JIRA ID: ALMIOPEN-2955

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
BradPepersAMD added a commit that referenced this pull request Oct 21, 2026
@BradPepersAMD @claude
feat(hip-kernel-provider): FlyDSL kernels for the kernel ingestor: RM…
77767e4 
…SNorm forward/backward, SDPA forward (RDNA, CDNA)

Adds FlyDSL as a second kernel source for the kernel ingestor, beside rocKE:
ahead-of-time compiled code objects with generated descriptors, packed into each
architecture's kpack shard by the provider's shared packer. Neither the build
nor the runtime needs FlyDSL or a kernel compiler.

Engines (each with graph match, kernel match, score and dispatch symbols):
- hipkernel:flydsl_rmsnorm: RMSNorm forward, inference and training (inv_rms);
  bf16/f16/f32 and an f32 scale beside 16-bit data; epsilon as a kernel
  argument; baked widths chosen by measurement plus a runtime-N tier.
- hipkernel:flydsl_rmsnorm_bwd: dx and dgamma from FlyDSL's deterministic
  two-stage kernel (partial + reduce in one object; dgamma bitwise
  reproducible); baked widths and bounded runtime-N tiers.
- hipkernel:flydsl_sdpa_rdna, _rdna_decode, _aiw: SDPA forward for
  gfx11-generic and gfx12-generic (AITER's RDNA kernel ported to gfx11 WMMA,
  split-KV decode with merge, AOTriton's gfx1201 kernel).
- hipkernel:flydsl_sdpa_cdna, _cdna_decode, _cdna_dualwave: SDPA forward for
  gfx90a, gfx942 and gfx950 from FlyDSL's MFMA kernels.

Targets gfx11-generic, gfx12-generic, gfx90a, gfx942 and gfx950; 1,453 objects.
The objects, their manifests and KDPs are stored with DVC on the `ingestor`
remote, as rocKE's large descriptor files are: git holds one
FlyDSL/<op>/<target>.dvc pointer per directory. The provider's configure-time
DVC check now covers FlyDSL's pointers too (warn and ship nothing for that
target; an error under HIPKERNELPROVIDER_REQUIRE_DVC_DESCRIPTORS, which the
superbuild CI sets), and the CI's existing recursive pull fetches them.

Gated by HIPKERNELPROVIDER_ENABLE_FLYDSL (ON) under HIPDNN_ENABLE_KERNEL_INGESTOR
(OFF by default), so a default build is unchanged. gen_descriptors.py --check
(before the pack) and tools/check_shards.py (after) verify every object's SHA256,
target and input digest; regeneration is byte-reproducible with the pinned
toolchain (flydsl/REGEN.md). Vendored sources keep their upstream notices;
flydsl/THIRD_PARTY_LICENSES.md carries the FlyDSL/AITER (Apache-2.0) and
AOTriton (MIT) texts. Rules and gaps: flydsl/COVERAGE.md.

Also: KernelCompileOptions gains an arch-only constructor; TestContainer's
engine buffer bound rises from 8 to 32.

Folds in what was reviewed as #13712, #13713 and #13714; supersedes #13157
and #13888.

JIRA ID: ALMIOPEN-2953
JIRA ID: ALMIOPEN-2954
JIRA ID: ALMIOPEN-2955

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
@BradPepersAMD BradPepersAMD mentioned this pull request Oct 21, 2026
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BradPepersAMD deleted the users/brpepers/flydsl-ci-superbuild branch October 30, 2026 22:08
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