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Revert "feat(hipBLASLt): add tuned gfx942 228-CU fp16 (HSS) grid-based logic" - #13438
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Codecov Report✅ All modified and coverable lines are covered by tests. Additional details and impacted files@@ Coverage Diff @@
## develop #13438 +/- ##
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Coverage 71.89% 71.89%
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Lines 475549 475549
Branches 70268 70268
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Misses 109888 109888
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Revert "feat(hipBLASLt): add tuned gfx942 228-CU fp16 (HSS) grid-based logic" (#13438) JIRA ID : https://amd-hub.atlassian.net/browse/AIROCBLAS-1334 Reverts ROCm/rocm-libraries#12864
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…ns (#13497) JIRA ID : https://amd-hub.atlassian.net/browse/AIROCBLAS-1334 ## Motivation [#12864](#12864) was reverted by [#13438](#13438) as duplicate bloat — correctly, since its NN/TN/TT files were 100% duplicates of the generic `gfx942/GridBased` logic. Only its NT file held anything new: **73 tuned solutions + 73 grid points**, which this PR recovers without the ~18 MB of duplication. ## Technical Details One file, **+19,925 / −0**: `.../aquavanjaram/gfx942/GridBased/aquavanjaram_Cijk_Ailk_Bjlk_HSS_BH_Bias_HAS_SAV_UserArgs.yaml` — solutions `1077 → 1150`, grid points `303,206 → 303,279`, purely additive (zero deletions, new entries at indices `1077–1149`). Appended to the **generic** file rather than a `gfx942_228cu` copy (a 73-point CU-specific library would outrank the generic one and snap *all* MI300A fp16 NT shapes onto 73 points), and all 73 are set to `WorkGroupMappingXCC: 1` — a deliberate divergence from #12864's 2/4, since XCC remapping measures worse on MI300A and the launch path already forces `setWGMXCC(1)` on CU fallback. ## Test Plan `TensileLogic --check-all` on the modified file plus a full unfiltered gfx942 device-library build, then `hipblaslt-bench` at the 73 exact grid points — workload generated by `TuningDriver/workflow/hipblaslt_benchInputCreator.py` so the bench shapes *are* the new grid points — and `hipblaslt-test --gtest_filter=*smoke*`. Performance is an A/B on MI300A with the same binary, device library rebuilt per arm from unmodified `develop` vs this change. ## Test Result All 73 new solutions validated against the CPU reference at their exact grid points: max `norm_error` **4.44e-07** vs rtol `1e-04`, zero failures. ## Submission Checklist - [ ] Look over the contributing guidelines at https://github.com/ROCm/TheRock/blob/main/GOVERNANCE.md#pull-requests.
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JIRA ID : https://amd-hub.atlassian.net/browse/AIROCBLAS-1334
Reverts #12864